-----------------------------------------------------------------
[*] Initial CPU detection process of binary gpioset with CPU configuration NONE.
[*] Emulator used: qemu-mipsel-static
[*] Using root directory: /logs/s115_usermode_emulator/firmware/unblob_extracted/firmware_extract/11108416-13869836.lzma_extract/lzma.uncompressed_extract/3761304-11775640.cpio_portable_ascii_extract (1/2)
[*] Trying to emulate binary ./usr/bin/gpioset with cpu config NONE
1 mmap(NULL,4096,PROT_READ|PROT_WRITE,MAP_PRIVATE|MAP_ANONYMOUS|0x4000000,-1,0) = 0x3ffe6000
1 stat("/etc/ld.so.cache",0x4071ea98) = -1 errno=2 (No such file or directory)
1 open("/lib/libc.so.0",O_RDONLY) = 3
1 fstat(3,0x4071e194) = 0
1 mmap(NULL,4096,PROT_READ|PROT_WRITE,MAP_PRIVATE|MAP_ANONYMOUS|0x4000000,-1,0) = 0x3ffe5000
1 read(3,0x3ffe5000,4096) = 4096
1 mmap(NULL,737280,PROT_NONE,MAP_PRIVATE|MAP_ANONYMOUS,-1,0) = 0x3ff31000
1 mmap(0x3ff31000,640416,PROT_EXEC|PROT_READ,MAP_PRIVATE|MAP_FIXED,3,0) = 0x3ff31000
1 mmap(0x3ffde000,4492,PROT_READ|PROT_WRITE,MAP_PRIVATE|MAP_FIXED,3,0x9d000) = 0x3ffde000
1 mmap(0x3ffe0000,19628,PROT_READ|PROT_WRITE,MAP_PRIVATE|MAP_ANONYMOUS|MAP_FIXED,-1,0) = 0x3ffe0000
1 close(3) = 0
1 munmap(0x3ffe5000,4096) = 0
1 stat("/lib/ld-uClibc.so.0",0x4071ea88) = 0
1 mmap(NULL,4096,PROT_READ|PROT_WRITE,MAP_PRIVATE|MAP_ANONYMOUS|0x4000000,-1,0) = 0x3ff30000
1 set_thread_area(0x3ff37460) = 0
1 open("/dev/urandom",O_RDONLY) = 3
1 read(3,0x4071ec98,4) = 4
1 close(3) = 0
1 ioctl(0,TCGETS,0x4071ea78) = -1 errno=25 (Inappropriate ioctl for device)
1 ioctl(1,TCGETS,0x4071ea78) = -1 errno=25 (Inappropriate ioctl for device)
1 write(1,0x3ffe16a0,1126)Input error
Please input:./jzgpioset port bit value
Write :./jzgpioset a 12 1
Read :./jzgpioset a 12
Please input:./jzgpioset port bit INT MASK PAT1 PAT0
Write :./jzgpioset a 12 0 1 0 1
INT MASK PAT1 PAT0 Port Description
1 0 0 0 Port is low level triggered interrupt input.
1 0 0 1 Port is high level triggered interrupt input.
1 0 1 0 Port is fall edge triggered interrupt input.
1 0 1 1 Port is rise edge triggered interrupt input.
1 1 0 0 Port is low level triggered interrupt input. Interrupt is masked. Flag is recorded.
1 1 0 1 Port is high level triggered interrupt input. Interrupt is masked. Flag is recorded.
1 1 1 0 Port is fall edge triggered interrupt input. Interrupt is masked. Flag is recorded.
1 1 1 1 Port is rise edge triggered interrupt input. Interrupt is masked. Flag is recorded.
0 0 0 0 Port is pin of device 0.
0 0 0 1 Port is pin of device 1.
0 0 1 0 Port is pin of device 2.
0 0 1 1 Port is pin of device 3.
0 1 0 0 Port is GPIO output 0.
0 1 0 1 Port is GPIO output 1.
0 1 1 * Port is GPIO input.
= 1126
1 exit_group(0)
[+] CPU configuration used for gpioset: NONE
CPU_CONFIG_det\;NONE
-----------------------------------------------------------------
