[*] Binary protection state of libmbedcrypto.so.2.2.1
Partial RELRO No Canary found NX disabled DSO No RPATH No RUNPATH Symbols
[*] Function fprintf tear down of libmbedcrypto.so.2.2.1
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/unblob_extracted/firmware_extract/56048-12514271.gzip_extract/gzip.uncompressed_extract/5243916-15068666.gzip_extract/gzip.uncompressed_extract/usr/lib/libmbedcrypto.so.2.2.1 @ 0x926c */
| #include <stdint.h>
|
; (fcn) entry.fini0 () | void entry_fini0 () {
0x0000926c ldr r3, [pc, 0x68] | r3 = *(0x92d8);
0x00009270 push {r4, lr} |
0x00009274 ldr r4, [pc, 0x64] | r4 = $d;
0x00009278 add r3, pc, r3 | r3 = pc + r3;
0x0000927c ldrb r3, [r3] | r3 = *(r3);
0x00009280 add r4, pc, r4 | r4 = pc + r4;
0x00009284 cmp r3, 0 |
0x00009288 popne {r4, pc} |
0x0000928c ldr r3, [pc, 0x50] | r3 = *(0x92e0);
0x00009290 ldr r3, [r4, r3] | r3 = $d;
0x00009294 cmp r3, 0 |
| if (r3 != 0) {
0x00009298 beq 0x92a8 |
0x0000929c ldr r3, [pc, 0x44] | r3 = *(0x92e4);
0x000092a0 ldr r0, [pc, r3] | r0 = *(0x000092a8);
0x000092a4 bl 0x8598 | cxa_finalize ();
| }
0x000092a8 bl 0x91b0 | entry0 ();
0x000092ac ldr r3, [pc, 0x38] | r3 = *(0x92e8);
0x000092b0 ldr r3, [r4, r3] | r3 = *((r4 + r3));
0x000092b4 cmp r3, 0 |
| if (r3 != 0) {
0x000092b8 beq 0x92c8 |
0x000092bc ldr r0, [pc, 0x2c] | r0 = *(0x92ec);
0x000092c0 add r0, pc, r0 | r0 = pc + r0;
0x000092c4 bl 0x88ec | loc_imp_deregister_frame_info ();
| }
0x000092c8 ldr r3, [pc, 0x24] | r3 = *(0x92f0);
0x000092cc mov r2, 1 | r2 = 1;
0x000092d0 add r3, pc, r3 | r3 = pc + r3;
0x000092d4 strb r2, [r3] | *(r3) = r2;
0x000092d8 pop {r4, pc} |
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/unblob_extracted/firmware_extract/56048-12514271.gzip_extract/gzip.uncompressed_extract/5243916-15068666.gzip_extract/gzip.uncompressed_extract/usr/lib/libmbedcrypto.so.2.2.1 @ 0x1bfe0 */
| #include <stdint.h>
|
; (fcn) sym.ecp_mod_p192 () | void ecp_mod_p192 (int32_t arg1) {
| int32_t var_4h;
| int32_t var_ch;
| r0 = arg1;
0x0001bfe0 push {r4, r5, r6, r7, r8, sb, sl, fp, lr} |
0x0001bfe4 mov r1, 0xc | r1 = 0xc;
0x0001bfe8 sub sp, sp, 0xc |
0x0001bfec mov r4, r0 | r4 = r0;
0x0001bff0 bl 0x8220 | r0 = fcn_00008220 ();
0x0001bff4 cmp r0, 0 |
| if (r0 != 0) {
0x0001bff8 bne 0x1c1e8 | goto label_0;
| }
0x0001bffc ldr r2, [r4, 8] | r2 = *((r4 + 8));
0x0001c000 mov r1, r0 | r1 = r0;
0x0001c004 ldr r6, [r2, 0x18] | r6 = *((r2 + 0x18));
0x0001c008 ldr r5, [r2] | r5 = *(r2);
0x0001c00c ldr ip, [r2, 4] | ip = *((r2 + 4));
0x0001c010 add r5, r5, r6 | r5 += r6;
0x0001c014 cmp r5, r6 |
| if (r5 < r6) {
0x0001c018 movhs r3, 0 | r3 = 0;
| }
| if (r5 >= r6) {
0x0001c01c movlo r3, 1 | r3 = 1;
| }
0x0001c020 ldr lr, [r2, 0x28] |
0x0001c024 adds ip, ip, r3 |
0x0001c028 ldr r3, [r2, 0x1c] | r3 = *((r2 + 0x1c));
0x0001c02c add r7, r5, lr | r7 = r5 + lr;
| if (ip < ip) {
0x0001c030 movhs r1, 1 | r1 = 1;
| }
0x0001c034 adds ip, ip, r3 |
| if (ip < ip) {
0x0001c038 movhs r8, 1 | r8 = 1;
| }
| if (ip >= ip) {
0x0001c03c movlo r8, 0 | r8 = 0;
| }
0x0001c040 cmp r7, lr |
0x0001c044 ldr r4, [r4, 4] | r4 = *((r4 + 4));
0x0001c048 str r5, [r2] | *(r2) = r5;
| if (r7 < lr) {
0x0001c04c movhs r5, 0 | r5 = 0;
| }
| if (r7 >= lr) {
0x0001c050 movlo r5, 1 | r5 = 1;
| }
0x0001c054 adds ip, ip, r5 |
| if (ip < ip) {
0x0001c058 movhs sb, 1 | sb = 1;
| }
0x0001c05c ldr r5, [r2, 0x2c] | r5 = *((r2 + 0x2c));
| if (ip >= ip) {
0x0001c060 movlo sb, 0 | sb = 0;
| }
0x0001c064 add r1, r1, sb | r1 += sb;
0x0001c068 add r1, r1, r8 | r1 += r8;
0x0001c06c ldr r8, [r2, 8] | r8 = *((r2 + 8));
0x0001c070 add ip, ip, r5 |
0x0001c074 cmp ip, r5 |
| if (ip >= r5) {
0x0001c078 addlo r1, r1, 1 | r1++;
| }
0x0001c07c ldr sb, [r2, 0xc] | sb = *((r2 + 0xc));
0x0001c080 adds r1, r1, r8 | r1 += r8;
0x0001c084 stm r2, {r7, ip} | *(r2) = r7;
| *((r2 + 4)) = ip;
0x0001c088 ldr r7, [r2, 0x20] | r7 = *((r2 + 0x20));
0x0001c08c mov ip, 0 |
| if (r1 < r1) {
0x0001c090 movhs ip, 1 |
| }
0x0001c094 adds sb, ip, sb | sb = ip + sb;
0x0001c098 str r1, [r2, 8] | *((r2 + 8)) = r1;
0x0001c09c mov r8, 0 | r8 = 0;
| if (sb < ip) {
0x0001c0a0 movhs r8, 1 | r8 = 1;
| }
0x0001c0a4 adds r1, r1, r6 | r1 += r6;
| if (r1 < r1) {
0x0001c0a8 movhs ip, 1 |
| }
| if (r1 >= r1) {
0x0001c0ac movlo ip, 0 |
| }
0x0001c0b0 adds ip, ip, sb |
| if (ip < ip) {
0x0001c0b4 movhs sb, 1 | sb = 1;
| }
| if (ip >= ip) {
0x0001c0b8 movlo sb, 0 | sb = 0;
| }
0x0001c0bc adds ip, ip, r3 |
| if (ip < ip) {
0x0001c0c0 movhs r3, 1 | r3 = 1;
| }
| if (ip >= ip) {
0x0001c0c4 movlo r3, 0 | r3 = 0;
| }
0x0001c0c8 ldr r6, [r2, 0x24] | r6 = *((r2 + 0x24));
0x0001c0cc adds r1, r1, r7 | r1 += r7;
0x0001c0d0 str r3, [sp, 4] | var_4h = r3;
| if (r1 < r1) {
0x0001c0d4 movhs r3, 1 | r3 = 1;
| }
| if (r1 >= r1) {
0x0001c0d8 movlo r3, 0 | r3 = 0;
| }
0x0001c0dc adds ip, ip, r3 |
0x0001c0e0 add r1, r1, lr | r1 += lr;
| if (ip < ip) {
0x0001c0e4 movhs fp, 1 |
| }
| if (ip >= ip) {
0x0001c0e8 movlo fp, 0 |
| }
0x0001c0ec adds ip, ip, r6 |
| if (ip < ip) {
0x0001c0f0 movhs sl, 1 | sl = 1;
| }
| if (ip >= ip) {
0x0001c0f4 movlo sl, 0 | sl = 0;
| }
0x0001c0f8 cmp r1, lr |
| if (r1 < lr) {
0x0001c0fc movhs r3, 0 | r3 = 0;
| }
| if (r1 >= lr) {
0x0001c100 movlo r3, 1 | r3 = 1;
| }
0x0001c104 adds ip, ip, r3 |
| if (ip < ip) {
0x0001c108 movhs r3, 1 | r3 = 1;
| }
| if (ip >= ip) {
0x0001c10c movlo r3, 0 | r3 = 0;
| }
0x0001c110 add fp, fp, r3 |
0x0001c114 add ip, ip, r5 |
0x0001c118 add fp, fp, sl |
0x0001c11c cmp ip, r5 |
| if (ip >= r5) {
0x0001c120 addlo fp, fp, 1 |
| }
0x0001c124 add r8, fp, r8 | r8 = fp + r8;
0x0001c128 add sb, r8, sb | sb = r8 + sb;
0x0001c12c ldr r8, [sp, 4] | r8 = var_4h;
0x0001c130 ldr r3, [r2, 0x10] | r3 = *((r2 + 0x10));
0x0001c134 add sb, sb, r8 | sb += r8;
0x0001c138 str r1, [r2, 8] | *((r2 + 8)) = r1;
0x0001c13c ldr r1, [r2, 0x14] | r1 = *((r2 + 0x14));
0x0001c140 adds sb, sb, r3 | sb += r3;
0x0001c144 mov r3, 0 | r3 = 0;
| if (sb < sb) {
0x0001c148 movhs r3, 1 | r3 = 1;
| }
0x0001c14c adds r3, r3, r1 | r3 += r1;
0x0001c150 mov r1, 0 | r1 = 0;
| if (r3 < r3) {
0x0001c154 movhs r1, 1 | r1 = 1;
| }
0x0001c158 adds r7, sb, r7 | r7 = sb + r7;
0x0001c15c str ip, [r2, 0xc] | *((r2 + 0xc)) = ip;
| if (r7 < sb) {
0x0001c160 movhs ip, 1 |
| }
| if (r7 >= sb) {
0x0001c164 movlo ip, 0 |
| }
0x0001c168 adds r3, r3, ip | r3 += ip;
0x0001c16c add r7, lr, r7 | r7 = lr + r7;
| if (r3 < r3) {
0x0001c170 movhs ip, 1 |
| }
| if (r3 >= r3) {
0x0001c174 movlo ip, 0 |
| }
0x0001c178 adds r6, r3, r6 | r6 = r3 + r6;
| if (r6 < r3) {
0x0001c17c movhs r8, 1 | r8 = 1;
| }
| if (r6 >= r3) {
0x0001c180 movlo r8, 0 | r8 = 0;
| }
0x0001c184 cmp lr, r7 |
| if (lr > r7) {
0x0001c188 movls lr, 0 | lr = 0;
| }
| if (lr <= r7) {
0x0001c18c movhi lr, 1 | lr = 1;
| }
0x0001c190 adds r6, lr, r6 | r6 = lr + r6;
| if (r6 < lr) {
0x0001c194 movhs r3, 1 | r3 = 1;
| }
| if (r6 >= lr) {
0x0001c198 movlo r3, 0 | r3 = 0;
| }
0x0001c19c add r6, r6, r5 | r6 += r5;
0x0001c1a0 cmp r6, r5 |
| if (r6 < r5) {
0x0001c1a4 movhs r5, r3 | r5 = r3;
| }
| if (r6 >= r5) {
0x0001c1a8 addlo r5, r3, 1 | r5 = r3 + 1;
| }
0x0001c1ac add r1, r5, r1 | r1 = r5 + r1;
0x0001c1b0 add r4, r2, r4, lsl 2 | r4 = r2 + (r4 << 2);
0x0001c1b4 add r1, r1, ip | r1 += ip;
0x0001c1b8 add r3, r2, 0x1c | r3 = r2 + 0x1c;
0x0001c1bc add r1, r1, r8 | r1 += r8;
0x0001c1c0 cmp r4, r3 |
0x0001c1c4 str sb, [r2, 0x10] | *((r2 + 0x10)) = sb;
0x0001c1c8 str r6, [r2, 0x14] | *((r2 + 0x14)) = r6;
0x0001c1cc str r7, [r2, 0x10] | *((r2 + 0x10)) = r7;
0x0001c1d0 str r1, [r2, 0x18] | *((r2 + 0x18)) = r1;
| if (r4 < r3) {
0x0001c1d4 bls 0x1c1e8 | goto label_0;
| }
0x0001c1d8 mov r2, 0 | r2 = 0;
| do {
0x0001c1dc str r2, [r3], 4 | *(r3) = r2;
| r3 += 4;
0x0001c1e0 cmp r4, r3 |
0x0001c1e4 bhi 0x1c1dc |
| } while (r4 > r3);
| label_0:
0x0001c1e8 add sp, sp, 0xc |
0x0001c1ec pop {r4, r5, r6, r7, r8, sb, sl, fp, pc} |
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/unblob_extracted/firmware_extract/56048-12514271.gzip_extract/gzip.uncompressed_extract/5243916-15068666.gzip_extract/gzip.uncompressed_extract/usr/lib/libmbedcrypto.so.2.2.1 @ 0x1d570 */
| #include <stdint.h>
|
; (fcn) sym.ecp_mod_p192k1 () | void ecp_mod_p192k1 (int32_t arg1) {
| int32_t var_0h;
| int32_t var_4h;
| int32_t var_8h;
| int32_t var_ch;
| int32_t var_10h;
| int32_t var_14h;
| void * s1;
| int32_t var_44h;
| r0 = arg1;
0x0001d570 push {r4, r5, r6, r7, r8, sb, sl, fp, lr} |
0x0001d574 ldr r6, [r0, 4] | r6 = *((r0 + 4));
0x0001d578 sub sp, sp, 0x44 |
0x0001d57c cmp r6, 5 |
| if (r6 > 5) {
0x0001d580 movls r0, 0 | r0 = 0;
| }
| if (r6 < 5) {
0x0001d584 bls 0x1d630 | goto label_2;
| }
0x0001d588 ldr r3, [pc, 0x188] |
0x0001d58c sub r8, r6, 6 | r8 = r6 - 6;
0x0001d590 add r3, pc, r3 | r3 = pc + r3;
0x0001d594 mov r2, 1 | r2 = 1;
0x0001d598 mov r1, 2 | r1 = 2;
0x0001d59c add r7, sp, 0x18 | r7 += s1;
0x0001d5a0 add r3, r3, 0x10 | r3 = 0x1d724;
0x0001d5a4 cmp r8, 6 |
0x0001d5a8 mov r5, r0 | r5 = r0;
0x0001d5ac str r2, [sp, 0xc] | var_ch = r2;
0x0001d5b0 str r2, [sp] | *(sp) = r2;
0x0001d5b4 str r1, [sp, 0x10] | var_10h = r1;
0x0001d5b8 str r3, [sp, 0x14] | var_14h = r3;
0x0001d5bc str r7, [sp, 8] | var_8h = r7;
0x0001d5c0 mov r2, 0x28 | r2 = 0x28;
0x0001d5c4 mov r1, 0 | r1 = 0;
0x0001d5c8 mov r0, r7 | r0 = r7;
| if (r8 < 6) {
0x0001d5cc bls 0x1d638 | goto label_3;
| }
0x0001d5d0 bl 0x8c28 | memset (r0, r1, r2);
0x0001d5d4 ldr r4, [r5, 8] | r4 = *((r5 + 8));
0x0001d5d8 mov r2, 0x18 | r2 = 0x18;
0x0001d5dc add r1, r4, r2 | r1 = r4 + r2;
0x0001d5e0 mov r0, r7 | r0 = r7;
0x0001d5e4 bl 0x8550 | memcpy (r0, r1, r2);
0x0001d5e8 mov r3, 8 | r3 = 8;
0x0001d5ec str r3, [sp, 4] | var_4h = r3;
| label_0:
0x0001d5f0 add r2, r4, 0x14 | r2 = r4 + 0x14;
0x0001d5f4 mov r3, 6 | r3 = 6;
0x0001d5f8 mov r0, 0 | r0 = 0;
| do {
0x0001d5fc str r0, [r2, 4]! | *((r2 += 4)) = r0;
0x0001d600 ldr r1, [r5, 4] | r1 = *((r5 + 4));
0x0001d604 add r3, r3, 1 | r3++;
0x0001d608 cmp r3, r1 |
0x0001d60c blo 0x1d5fc |
| } while (r3 <= r1);
| label_1:
0x0001d610 mov r4, sp | r4 = sp;
0x0001d614 add r8, sp, 0xc | r8 += var_ch;
0x0001d618 mov r2, r8 | r2 = r8;
0x0001d61c mov r1, r4 | r1 = r4;
0x0001d620 mov r0, r4 | r0 = r4;
0x0001d624 bl 0x8694 | r0 = fcn_00008694 ();
0x0001d628 cmp r0, 0 |
| if (r0 == 0) {
0x0001d62c beq 0x1d664 | goto label_4;
| }
| label_2:
0x0001d630 add sp, sp, 0x44 |
0x0001d634 pop {r4, r5, r6, r7, r8, sb, sl, fp, pc} |
| label_3:
0x0001d638 bl 0x8c28 | memset (r0, r1, r2);
0x0001d63c ldr r4, [r5, 8] | r4 = *((r5 + 8));
0x0001d640 lsl r2, r8, 2 | r2 = r8 << 2;
0x0001d644 add r1, r4, 0x18 | r1 = r4 + 0x18;
0x0001d648 mov r0, r7 | r0 = r7;
0x0001d64c bl 0x8550 | memcpy (r0, r1, r2);
0x0001d650 cmp r6, 6 |
0x0001d654 sub r6, r6, 4 | r6 -= 4;
0x0001d658 str r6, [sp, 4] | var_4h = r6;
| if (r6 != 6) {
0x0001d65c bne 0x1d5f0 | goto label_0;
| }
0x0001d660 b 0x1d610 | goto label_1;
| label_4:
0x0001d664 mov r2, r4 | r2 = r4;
0x0001d668 mov r1, r5 | r1 = r5;
0x0001d66c mov r0, r5 | r0 = r5;
0x0001d670 bl 0x8b5c | r0 = fcn_00008b5c ();
0x0001d674 cmp r0, 0 |
| if (r0 != 0) {
0x0001d678 bne 0x1d630 | goto label_2;
| }
0x0001d67c ldr sl, [r5, 4] | sl = *((r5 + 4));
0x0001d680 mov r2, 0x28 | r2 = 0x28;
0x0001d684 sub sb, sl, 6 | sb = sl - 6;
0x0001d688 cmp sb, 6 |
0x0001d68c mov r1, 0 | r1 = 0;
0x0001d690 mov r0, r7 | r0 = r7;
| if (sb > 6) {
0x0001d694 lslls fp, sb, 2 |
| }
| if (sb <= 6) {
0x0001d698 movhi fp, 0x18 |
| }
| if (sb <= 6) {
0x0001d69c movhi sb, 6 | sb = 6;
| }
0x0001d6a0 bl 0x8c28 | memset (r0, r1, r2);
0x0001d6a4 ldr r6, [r5, 8] | r6 = *((r5 + 8));
0x0001d6a8 mov r2, fp | r2 = fp;
0x0001d6ac mov r0, r7 | r0 = r7;
0x0001d6b0 add r1, r6, 0x18 | r1 = r6 + 0x18;
0x0001d6b4 bl 0x8550 | memcpy (r0, r1, r2);
0x0001d6b8 ldr r3, [sp, 0x10] | r3 = var_10h;
0x0001d6bc cmp sl, 6 |
0x0001d6c0 add r3, r3, sb | r3 += sb;
0x0001d6c4 str r3, [sp, 4] | var_4h = r3;
| if (sl < 6) {
0x0001d6c8 bls 0x1d6ec | goto label_5;
| }
0x0001d6cc add r2, r6, 0x14 | r2 = r6 + 0x14;
0x0001d6d0 mov r3, 6 | r3 = 6;
0x0001d6d4 mov r0, 0 | r0 = 0;
| do {
0x0001d6d8 str r0, [r2, 4]! | *((r2 += 4)) = r0;
0x0001d6dc ldr r1, [r5, 4] | r1 = *((r5 + 4));
0x0001d6e0 add r3, r3, 1 | r3++;
0x0001d6e4 cmp r3, r1 |
0x0001d6e8 blo 0x1d6d8 |
| } while (r3 <= r1);
| label_5:
0x0001d6ec mov r2, r8 | r2 = r8;
0x0001d6f0 mov r1, r4 | r1 = r4;
0x0001d6f4 mov r0, r4 | r0 = r4;
0x0001d6f8 bl 0x8694 | r0 = fcn_00008694 ();
0x0001d6fc cmp r0, 0 |
| if (r0 != 0) {
0x0001d700 bne 0x1d630 | goto label_2;
| }
0x0001d704 mov r2, r4 | r2 = r4;
0x0001d708 mov r1, r5 | r1 = r5;
0x0001d70c mov r0, r5 | r0 = r5;
0x0001d710 bl 0x8b5c | fcn_00008b5c ();
0x0001d714 b 0x1d630 | goto label_2;
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/unblob_extracted/firmware_extract/56048-12514271.gzip_extract/gzip.uncompressed_extract/5243916-15068666.gzip_extract/gzip.uncompressed_extract/usr/lib/libmbedcrypto.so.2.2.1 @ 0x1c92c */
| #include <stdint.h>
|
; (fcn) sym.ecp_mod_p224k1 () | void ecp_mod_p224k1 (int32_t arg1) {
| int32_t var_0h;
| int32_t var_4h;
| int32_t var_8h;
| int32_t var_ch;
| int32_t var_10h;
| int32_t var_14h;
| void * s1;
| int32_t var_44h;
| r0 = arg1;
0x0001c92c push {r4, r5, r6, r7, r8, sb, sl, fp, lr} |
0x0001c930 ldr r6, [r0, 4] | r6 = *((r0 + 4));
0x0001c934 sub sp, sp, 0x44 |
0x0001c938 cmp r6, 6 |
| if (r6 > 6) {
0x0001c93c movls r0, 0 | r0 = 0;
| }
| if (r6 < 6) {
0x0001c940 bls 0x1c9e8 | goto label_2;
| }
0x0001c944 ldr r3, [pc, 0x184] | r3 = *(0x1cacc);
0x0001c948 sub r8, r6, 7 | r8 = r6 - 7;
0x0001c94c mov r2, 1 | r2 = 1;
0x0001c950 mov r1, 2 | r1 = 2;
0x0001c954 add r7, sp, 0x18 | r7 += s1;
0x0001c958 add r3, pc, r3 | r3 = pc + r3;
0x0001c95c cmp r8, 7 |
0x0001c960 mov r5, r0 | r5 = r0;
0x0001c964 str r2, [sp, 0xc] | var_ch = r2;
0x0001c968 str r2, [sp] | *(sp) = r2;
0x0001c96c str r1, [sp, 0x10] | var_10h = r1;
0x0001c970 str r3, [sp, 0x14] | var_14h = r3;
0x0001c974 str r7, [sp, 8] | var_8h = r7;
0x0001c978 mov r2, 0x28 | r2 = 0x28;
0x0001c97c mov r1, 0 | r1 = 0;
0x0001c980 mov r0, r7 | r0 = r7;
| if (r8 < 7) {
0x0001c984 bls 0x1c9f0 | goto label_3;
| }
0x0001c988 bl 0x8c28 | memset (r0, r1, r2);
0x0001c98c ldr r4, [r5, 8] | r4 = *((r5 + 8));
0x0001c990 mov r2, 0x1c | r2 = 0x1c;
0x0001c994 add r1, r4, r2 | r1 = r4 + r2;
0x0001c998 mov r0, r7 | r0 = r7;
0x0001c99c bl 0x8550 | memcpy (r0, r1, r2);
0x0001c9a0 mov r3, 9 | r3 = 9;
0x0001c9a4 str r3, [sp, 4] | var_4h = r3;
| label_0:
0x0001c9a8 add r2, r4, 0x18 | r2 = r4 + 0x18;
0x0001c9ac mov r3, 7 | r3 = 7;
0x0001c9b0 mov r0, 0 | r0 = 0;
| do {
0x0001c9b4 str r0, [r2, 4]! | *((r2 += 4)) = r0;
0x0001c9b8 ldr r1, [r5, 4] | r1 = *((r5 + 4));
0x0001c9bc add r3, r3, 1 | r3++;
0x0001c9c0 cmp r3, r1 |
0x0001c9c4 blo 0x1c9b4 |
| } while (r3 <= r1);
| label_1:
0x0001c9c8 mov r4, sp | r4 = sp;
0x0001c9cc add r8, sp, 0xc | r8 += var_ch;
0x0001c9d0 mov r2, r8 | r2 = r8;
0x0001c9d4 mov r1, r4 | r1 = r4;
0x0001c9d8 mov r0, r4 | r0 = r4;
0x0001c9dc bl 0x8694 | r0 = fcn_00008694 ();
0x0001c9e0 cmp r0, 0 |
| if (r0 == 0) {
0x0001c9e4 beq 0x1ca1c | goto label_4;
| }
| label_2:
0x0001c9e8 add sp, sp, 0x44 |
0x0001c9ec pop {r4, r5, r6, r7, r8, sb, sl, fp, pc} |
| label_3:
0x0001c9f0 bl 0x8c28 | memset (r0, r1, r2);
0x0001c9f4 ldr r4, [r5, 8] | r4 = *((r5 + 8));
0x0001c9f8 lsl r2, r8, 2 | r2 = r8 << 2;
0x0001c9fc add r1, r4, 0x1c | r1 = r4 + 0x1c;
0x0001ca00 mov r0, r7 | r0 = r7;
0x0001ca04 bl 0x8550 | memcpy (r0, r1, r2);
0x0001ca08 cmp r6, 7 |
0x0001ca0c sub r6, r6, 5 | r6 -= 5;
0x0001ca10 str r6, [sp, 4] | var_4h = r6;
| if (r6 != 7) {
0x0001ca14 bne 0x1c9a8 | goto label_0;
| }
0x0001ca18 b 0x1c9c8 | goto label_1;
| label_4:
0x0001ca1c mov r2, r4 | r2 = r4;
0x0001ca20 mov r1, r5 | r1 = r5;
0x0001ca24 mov r0, r5 | r0 = r5;
0x0001ca28 bl 0x8b5c | r0 = fcn_00008b5c ();
0x0001ca2c cmp r0, 0 |
| if (r0 != 0) {
0x0001ca30 bne 0x1c9e8 | goto label_2;
| }
0x0001ca34 ldr sl, [r5, 4] | sl = *((r5 + 4));
0x0001ca38 mov r2, 0x28 | r2 = 0x28;
0x0001ca3c sub sb, sl, 7 | sb = sl - 7;
0x0001ca40 cmp sb, 7 |
0x0001ca44 mov r1, 0 | r1 = 0;
0x0001ca48 mov r0, r7 | r0 = r7;
| if (sb > 7) {
0x0001ca4c lslls fp, sb, 2 |
| }
| if (sb <= 7) {
0x0001ca50 movhi fp, 0x1c |
| }
| if (sb <= 7) {
0x0001ca54 movhi sb, 7 | sb = 7;
| }
0x0001ca58 bl 0x8c28 | memset (r0, r1, r2);
0x0001ca5c ldr r6, [r5, 8] | r6 = *((r5 + 8));
0x0001ca60 mov r2, fp | r2 = fp;
0x0001ca64 mov r0, r7 | r0 = r7;
0x0001ca68 add r1, r6, 0x1c | r1 = r6 + 0x1c;
0x0001ca6c bl 0x8550 | memcpy (r0, r1, r2);
0x0001ca70 ldr r3, [sp, 0x10] | r3 = var_10h;
0x0001ca74 cmp sl, 7 |
0x0001ca78 add r3, r3, sb | r3 += sb;
0x0001ca7c str r3, [sp, 4] | var_4h = r3;
| if (sl < 7) {
0x0001ca80 bls 0x1caa4 | goto label_5;
| }
0x0001ca84 add r2, r6, 0x18 | r2 = r6 + 0x18;
0x0001ca88 mov r3, 7 | r3 = 7;
0x0001ca8c mov r0, 0 | r0 = 0;
| do {
0x0001ca90 str r0, [r2, 4]! | *((r2 += 4)) = r0;
0x0001ca94 ldr r1, [r5, 4] | r1 = *((r5 + 4));
0x0001ca98 add r3, r3, 1 | r3++;
0x0001ca9c cmp r3, r1 |
0x0001caa0 blo 0x1ca90 |
| } while (r3 <= r1);
| label_5:
0x0001caa4 mov r2, r8 | r2 = r8;
0x0001caa8 mov r1, r4 | r1 = r4;
0x0001caac mov r0, r4 | r0 = r4;
0x0001cab0 bl 0x8694 | r0 = fcn_00008694 ();
0x0001cab4 cmp r0, 0 |
| if (r0 != 0) {
0x0001cab8 bne 0x1c9e8 | goto label_2;
| }
0x0001cabc mov r2, r4 | r2 = r4;
0x0001cac0 mov r1, r5 | r1 = r5;
0x0001cac4 mov r0, r5 | r0 = r5;
0x0001cac8 bl 0x8b5c | fcn_00008b5c ();
0x0001cacc b 0x1c9e8 | goto label_2;
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/unblob_extracted/firmware_extract/56048-12514271.gzip_extract/gzip.uncompressed_extract/5243916-15068666.gzip_extract/gzip.uncompressed_extract/usr/lib/libmbedcrypto.so.2.2.1 @ 0x1cad4 */
| #include <stdint.h>
|
| #define BIT_MASK(t,v) ((t)(-((v)!= 0)))&(((t)-1)>>((sizeof(t)*CHAR_BIT)-(v)))
|
; (fcn) sym.ecp_mod_p224 () | void ecp_mod_p224 (int32_t arg1) {
| int32_t var_4h;
| int32_t var_8h;
| int32_t var_ch;
| void * s;
| int32_t var_34h;
| r0 = arg1;
0x0001cad4 push {r4, r5, r6, r7, r8, sb, sl, fp, lr} |
0x0001cad8 sub sp, sp, 0x34 |
0x0001cadc add r3, sp, 0x10 | r3 += s;
0x0001cae0 mov lr, 1 | lr = 1;
0x0001cae4 mov ip, 8 |
0x0001cae8 mov r4, r0 | r4 = r0;
0x0001caec mov r2, 0x20 | r2 = 0x20;
0x0001caf0 mov r0, r3 | r0 = r3;
0x0001caf4 mov r1, 0 | r1 = 0;
0x0001caf8 str r3, [sp, 0xc] | var_ch = r3;
0x0001cafc str lr, [sp, 4] | var_4h = lr;
0x0001cb00 str ip, [sp, 8] | var_8h = ip;
0x0001cb04 bl 0x8c28 | memset (r0, r1, r2);
0x0001cb08 mov r0, r4 | r0 = r4;
0x0001cb0c mov r1, 0xe | r1 = 0xe;
0x0001cb10 bl 0x8220 | r0 = fcn_00008220 ();
0x0001cb14 subs r5, r0, 0 | r5 = r0 - 0;
| if (r5 != r0) {
0x0001cb18 bne 0x1cd5c | goto label_6;
| }
0x0001cb1c ldr r3, [r4, 8] | r3 = *((r4 + 8));
0x0001cb20 ldr r2, [r3] | r2 = *(r3);
0x0001cb24 ldr sl, [r3, 0x1c] | sl = *((r3 + 0x1c));
0x0001cb28 ldr r1, [r3, 0x2c] | r1 = *((r3 + 0x2c));
0x0001cb2c cmp r2, sl |
0x0001cb30 sub r0, r2, sl | r0 = r2 - sl;
| if (r2 < sl) {
0x0001cb34 movhs r2, 0 | r2 = 0;
| }
| if (r2 >= sl) {
0x0001cb38 movlo r2, 1 | r2 = 1;
| }
0x0001cb3c cmp r1, r0 |
| if (r1 <= r0) {
0x0001cb40 addhi r2, r2, 1 | r2++;
| }
0x0001cb44 rsb r2, r2, 0 | r2 -= ;
0x0001cb48 sub r0, r0, r1 | r0 -= r1;
0x0001cb4c cmp r2, 0 |
0x0001cb50 str r0, [r3] | *(r3) = r0;
0x0001cb54 ldr ip, [r3, 4] | ip = *((r3 + 4));
| if (r2 != 0) {
0x0001cb58 moveq r0, r5 | r0 = r5;
| }
| if (r2 != 0) {
0x0001cb5c bne 0x1cd7c | goto label_7;
| }
| label_1:
0x0001cb60 ldr r8, [r3, 0x20] | r8 = *((r3 + 0x20));
0x0001cb64 ldr r2, [r3, 0x30] | r2 = *((r3 + 0x30));
0x0001cb68 cmp r8, ip |
| if (r8 <= ip) {
0x0001cb6c subhi r0, r0, 1 | r0--;
| }
0x0001cb70 sub ip, ip, r8 |
0x0001cb74 cmp r2, ip |
| if (r2 <= ip) {
0x0001cb78 subhi r0, r0, 1 | r0--;
| }
0x0001cb7c lsl r0, r0, 0x18 | r0 <<= 0x18;
0x0001cb80 asr r0, r0, 0x18 | r0 >>= 0x18;
0x0001cb84 sub ip, ip, r2 |
0x0001cb88 cmp r0, 0 |
0x0001cb8c str ip, [r3, 4] | *((r3 + 4)) = ip;
0x0001cb90 ldr r6, [r3, 8] | r6 = *((r3 + 8));
| if (r0 != 0) {
0x0001cb94 moveq ip, r0 |
| }
| if (r0 != 0) {
0x0001cb98 bne 0x1cd94 | goto label_8;
| }
| label_2:
0x0001cb9c ldr lr, [r3, 0x24] |
0x0001cba0 ldr r0, [r3, 0x34] | r0 = *((r3 + 0x34));
0x0001cba4 cmp lr, r6 |
| if (lr <= r6) {
0x0001cba8 subhi ip, ip, 1 |
| }
0x0001cbac sub r6, r6, lr | r6 -= lr;
0x0001cbb0 cmp r0, r6 |
| if (r0 <= r6) {
0x0001cbb4 subhi ip, ip, 1 |
| }
0x0001cbb8 lsl ip, ip, 0x18 |
0x0001cbbc asr ip, ip, 0x18 |
0x0001cbc0 sub r6, r6, r0 | r6 -= r0;
0x0001cbc4 cmp ip, 0 |
0x0001cbc8 str r6, [r3, 8] | *((r3 + 8)) = r6;
0x0001cbcc ldr fp, [r3, 0xc] | fp = *((r3 + 0xc));
| if (ip != 0) {
0x0001cbd0 moveq r6, ip | r6 = ip;
| }
| if (ip != 0) {
0x0001cbd4 bne 0x1cdac | goto label_9;
| }
| label_3:
0x0001cbd8 ldr ip, [r3, 0x28] | ip = *((r3 + 0x28));
0x0001cbdc ldr sb, [r3, 0x10] | sb = *((r3 + 0x10));
0x0001cbe0 cmp ip, fp |
0x0001cbe4 sub r7, sl, ip | r7 = sl - ip;
0x0001cbe8 add r7, r7, fp | r7 += fp;
| if (ip > fp) {
0x0001cbec movls fp, 0 |
| }
| if (ip <= fp) {
0x0001cbf0 movhi fp, 1 |
| }
0x0001cbf4 cmp sl, r7 |
0x0001cbf8 rsbls sl, fp, 0 | __asm ("rsbls sl, fp, 0");
0x0001cbfc rsbhi sl, fp, 1 | __asm ("rsbhi sl, fp, 1");
0x0001cc00 adds r7, r1, r7 | r7 = r1 + r7;
0x0001cc04 add r6, r6, sl | r6 += sl;
| if (r7 < r1) {
0x0001cc08 movhs sl, 1 | sl = 1;
| }
| if (r7 >= r1) {
0x0001cc0c movlo sl, 0 | sl = 0;
| }
0x0001cc10 add r6, r6, sl | r6 += sl;
0x0001cc14 lsl r6, r6, 0x18 | r6 <<= 0x18;
0x0001cc18 asr r6, r6, 0x18 | r6 >>= 0x18;
0x0001cc1c adds sl, sb, r6 | sl = sb + r6;
| if (sl < sb) {
0x0001cc20 movhs fp, 1 |
| }
| if (sl >= sb) {
0x0001cc24 movlo fp, 0 |
| }
0x0001cc28 cmp r6, 0 |
0x0001cc2c str r7, [r3, 0xc] | *((r3 + 0xc)) = r7;
| if (r6 < 0) {
0x0001cc30 movge sb, fp | sb = fp;
| }
| if (r6 < 0) {
0x0001cc34 blt 0x1cdc4 | goto label_10;
| }
| label_4:
0x0001cc38 sub r6, r8, r1 | r6 = r8 - r1;
0x0001cc3c cmp r1, sl |
0x0001cc40 add r6, r6, sl | r6 += sl;
| if (r1 > sl) {
0x0001cc44 movls r1, 0 | r1 = 0;
| }
| if (r1 <= sl) {
0x0001cc48 movhi r1, 1 | r1 = 1;
| }
0x0001cc4c cmp r8, r6 |
0x0001cc50 rsbls r1, r1, 0 | __asm ("rsbls r1, r1, 0");
0x0001cc54 rsbhi r1, r1, 1 | __asm ("rsbhi r1, r1, 1");
0x0001cc58 adds r6, r2, r6 | r6 = r2 + r6;
| if (r6 < r2) {
0x0001cc5c movhs r7, 1 | r7 = 1;
| }
| if (r6 >= r2) {
0x0001cc60 movlo r7, 0 | r7 = 0;
| }
0x0001cc64 and r1, r1, 0xff | r1 &= 0xff;
0x0001cc68 add r1, r1, r7 | r1 += r7;
0x0001cc6c add r1, r1, sb | r1 += sb;
0x0001cc70 ldr r8, [r3, 0x14] | r8 = *((r3 + 0x14));
0x0001cc74 lsl r1, r1, 0x18 | r1 <<= 0x18;
0x0001cc78 asr r1, r1, 0x18 | r1 >>= 0x18;
0x0001cc7c adds r7, r8, r1 | r7 = r8 + r1;
| if (r7 < r8) {
0x0001cc80 movhs sb, 1 | sb = 1;
| }
| if (r7 >= r8) {
0x0001cc84 movlo sb, 0 | sb = 0;
| }
0x0001cc88 cmp r1, 0 |
0x0001cc8c str r6, [r3, 0x10] | *((r3 + 0x10)) = r6;
| if (r1 < 0) {
0x0001cc90 movge r1, sb | r1 = sb;
| }
| if (r1 < 0) {
0x0001cc94 blt 0x1cdd8 | goto label_11;
| }
| label_5:
0x0001cc98 sub r6, lr, r2 | r6 = lr - r2;
0x0001cc9c cmp r2, r7 |
0x0001cca0 add r6, r6, r7 | r6 += r7;
| if (r2 > r7) {
0x0001cca4 movls r2, 0 | r2 = 0;
| }
| if (r2 <= r7) {
0x0001cca8 movhi r2, 1 | r2 = 1;
| }
0x0001ccac cmp lr, r6 |
0x0001ccb0 rsbls r2, r2, 0 | __asm ("rsbls r2, r2, 0");
0x0001ccb4 rsbhi r2, r2, 1 | __asm ("rsbhi r2, r2, 1");
0x0001ccb8 adds r6, r0, r6 | r6 = r0 + r6;
| if (r6 < r0) {
0x0001ccbc movhs lr, 1 | lr = 1;
| }
| if (r6 >= r0) {
0x0001ccc0 movlo lr, 0 | lr = 0;
| }
0x0001ccc4 and r2, r2, 0xff | r2 &= 0xff;
0x0001ccc8 add r2, r2, lr | r2 += lr;
0x0001cccc add r2, r2, r1 | r2 += r1;
0x0001ccd0 ldr r1, [r3, 0x18] | r1 = *((r3 + 0x18));
0x0001ccd4 lsl r2, r2, 0x18 | r2 <<= 0x18;
0x0001ccd8 asr r2, r2, 0x18 | r2 >>= 0x18;
0x0001ccdc adds r7, r1, r2 | r7 = r1 + r2;
| if (r7 < r1) {
0x0001cce0 movhs lr, 1 | lr = 1;
| }
| if (r7 >= r1) {
0x0001cce4 movlo lr, 0 | lr = 0;
| }
0x0001cce8 cmp r2, 0 |
0x0001ccec str r6, [r3, 0x14] | *((r3 + 0x14)) = r6;
| if (r2 < 0) {
0x0001ccf0 movge r2, lr | r2 = lr;
| }
| if (r2 < 0) {
0x0001ccf4 blt 0x1cd68 | goto label_12;
| }
| label_0:
0x0001ccf8 sub r1, ip, r0 | r1 = ip - r0;
0x0001ccfc cmp r0, r7 |
0x0001cd00 add r1, r1, r7 | r1 += r7;
| if (r0 > r7) {
0x0001cd04 movls r0, 0 | r0 = 0;
| }
| if (r0 <= r7) {
0x0001cd08 movhi r0, 1 | r0 = 1;
| }
0x0001cd0c cmp ip, r1 |
0x0001cd10 rsbls ip, r0, 0 | __asm ("rsbls ip, r0, 0");
0x0001cd14 rsbhi ip, r0, 1 | __asm ("rsbhi ip, r0, 1");
0x0001cd18 add r2, ip, r2 | r2 = ip + r2;
0x0001cd1c bic r0, r2, r2, asr 31 | r0 = BIT_MASK (r2, r2);
0x0001cd20 str r1, [r3, 0x18] | *((r3 + 0x18)) = r1;
0x0001cd24 str r0, [r3, 0x1c] | *((r3 + 0x1c)) = r0;
0x0001cd28 ldr r1, [r4, 4] | r1 = *((r4 + 4));
0x0001cd2c cmp r1, 8 |
| if (r1 < 8) {
0x0001cd30 bls 0x1cd54 | goto label_13;
| }
0x0001cd34 add r3, r3, 0x1c | r3 += 0x1c;
0x0001cd38 mov r1, 8 | r1 = 8;
0x0001cd3c mov ip, 0 |
| do {
0x0001cd40 str ip, [r3, 4]! | *((r3 += 4)) = ip;
0x0001cd44 ldr r0, [r4, 4] | r0 = *((r4 + 4));
0x0001cd48 add r1, r1, 1 | r1++;
0x0001cd4c cmp r0, r1 |
0x0001cd50 bhi 0x1cd40 |
| } while (r0 > r1);
| label_13:
0x0001cd54 cmp r2, 0 |
| if (r2 >= 0) {
0x0001cd58 blt 0x1cdec |
| label_6:
0x0001cd5c mov r0, r5 | r0 = r5;
0x0001cd60 add sp, sp, 0x34 |
0x0001cd64 pop {r4, r5, r6, r7, r8, sb, sl, fp, pc} |
| label_12:
0x0001cd68 rsb r2, r2, 0 | r2 -= ;
0x0001cd6c cmp r1, r2 |
| if (r1 < r2) {
0x0001cd70 movhs r2, 0 | r2 = 0;
| }
| if (r1 >= r2) {
0x0001cd74 mvnlo r2, 0 | r2 = ~0;
| }
0x0001cd78 b 0x1ccf8 | goto label_0;
| label_7:
0x0001cd7c rsb r0, r2, 0 | r0 = r2 - ;
0x0001cd80 cmp ip, r0 |
| if (ip >= r0) {
0x0001cd84 movlo r0, 0xff | r0 = 0xff;
| }
| if (ip < r0) {
0x0001cd88 movhs r0, 0 | r0 = 0;
| }
0x0001cd8c add ip, ip, r2 |
0x0001cd90 b 0x1cb60 | goto label_1;
| label_8:
0x0001cd94 rsb ip, r0, 0 |
0x0001cd98 cmp r6, ip |
| if (r6 >= ip) {
0x0001cd9c movlo ip, 0xff |
| }
| if (r6 < ip) {
0x0001cda0 movhs ip, 0 |
| }
0x0001cda4 add r6, r6, r0 | r6 += r0;
0x0001cda8 b 0x1cb9c | goto label_2;
| label_9:
0x0001cdac rsb r6, ip, 0 | r6 = ip - ;
0x0001cdb0 cmp fp, r6 |
| if (fp >= r6) {
0x0001cdb4 movlo r6, 0xff | r6 = 0xff;
| }
| if (fp < r6) {
0x0001cdb8 movhs r6, 0 | r6 = 0;
| }
0x0001cdbc add fp, fp, ip |
0x0001cdc0 b 0x1cbd8 | goto label_3;
| label_10:
0x0001cdc4 rsb r6, r6, 0 | r6 -= ;
0x0001cdc8 cmp sb, r6 |
| if (sb < r6) {
0x0001cdcc movhs sb, 0 | sb = 0;
| }
| if (sb >= r6) {
0x0001cdd0 mvnlo sb, 0 | sb = ~0;
| }
0x0001cdd4 b 0x1cc38 | goto label_4;
| label_11:
0x0001cdd8 rsb r1, r1, 0 | r1 -= ;
0x0001cddc cmp r8, r1 |
| if (r8 < r1) {
0x0001cde0 movhs r1, 0 | r1 = 0;
| }
| if (r8 >= r1) {
0x0001cde4 mvnlo r1, 0 | r1 = ~0;
| }
0x0001cde8 b 0x1cc98 | goto label_5;
| }
0x0001cdec ldr r3, [sp, 8] | r3 = var_8h;
0x0001cdf0 ldr r1, [sp, 0xc] | r1 = var_ch;
0x0001cdf4 sub r3, r3, 0xc0000001 | r3 -= 0xc0000001;
0x0001cdf8 rsb r2, r2, 0 | r2 -= ;
0x0001cdfc str r2, [r1, r3, lsl 2] | offset_0 = r3 << 2;
| *((r1 + offset_0)) = r2;
0x0001ce00 mov r0, r4 | r0 = r4;
0x0001ce04 mov r2, r4 | r2 = r4;
0x0001ce08 add r1, sp, 4 | r1 += var_4h;
0x0001ce0c bl 0x90b4 | r0 = fcn_000090b4 ();
0x0001ce10 cmp r0, 0 |
| if (r0 != 0) {
0x0001ce14 mvneq r3, 0 | r3 = ~0;
| }
0x0001ce18 mov r0, r5 | r0 = r5;
| if (r0 != 0) {
0x0001ce1c streq r3, [r4] | *(r4) = r3;
| }
0x0001ce20 add sp, sp, 0x34 |
0x0001ce24 pop {r4, r5, r6, r7, r8, sb, sl, fp, pc} |
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/unblob_extracted/firmware_extract/56048-12514271.gzip_extract/gzip.uncompressed_extract/5243916-15068666.gzip_extract/gzip.uncompressed_extract/usr/lib/libmbedcrypto.so.2.2.1 @ 0x1c1f0 */
| #include <stdint.h>
|
| #define BIT_MASK(t,v) ((t)(-((v)!= 0)))&(((t)-1)>>((sizeof(t)*CHAR_BIT)-(v)))
|
; (fcn) sym.ecp_mod_p384 () | void ecp_mod_p384 (int32_t arg1) {
| int32_t var_0h;
| int32_t var_4h;
| int32_t var_8h;
| int32_t var_ch;
| int32_t var_10h;
| int32_t var_14h;
| int32_t var_18h;
| void * s;
| int32_t var_54h;
| r0 = arg1;
0x0001c1f0 push {r4, r5, r6, r7, r8, sb, sl, fp, lr} |
0x0001c1f4 sub sp, sp, 0x54 |
0x0001c1f8 add r3, sp, 0x1c | r3 += s;
0x0001c1fc mov ip, 0xd |
0x0001c200 mov r6, r0 | r6 = r0;
0x0001c204 mov r2, 0x34 | r2 = 0x34;
0x0001c208 mov r0, r3 | r0 = r3;
0x0001c20c mov r1, 0 | r1 = 0;
0x0001c210 mov r5, 1 | r5 = 1;
0x0001c214 str r3, [sp, 0x18] | var_18h = r3;
0x0001c218 str ip, [sp, 0x14] | var_14h = ip;
0x0001c21c str r5, [sp, 0x10] | var_10h = r5;
0x0001c220 bl 0x8c28 | memset (r0, r1, r2);
0x0001c224 mov r0, r6 | r0 = r6;
0x0001c228 mov r1, 0x18 | r1 = 0x18;
0x0001c22c bl 0x8220 | r0 = fcn_00008220 ();
0x0001c230 subs r3, r0, 0 | r3 = r0 - 0;
0x0001c234 str r3, [sp, 8] | var_8h = r3;
| if (r3 != r0) {
0x0001c238 bne 0x1c8d0 | goto label_1;
| }
0x0001c23c mov lr, r3 | lr = r3;
0x0001c240 ldr r3, [r6, 8] | r3 = *((r6 + 8));
0x0001c244 ldr r2, [r3] | r2 = *(r3);
0x0001c248 ldr r8, [r3, 0x30] | r8 = *((r3 + 0x30));
0x0001c24c ldr ip, [r3, 0x54] | ip = *((r3 + 0x54));
0x0001c250 ldr r1, [r3, 0x50] | r1 = *((r3 + 0x50));
0x0001c254 adds r2, r2, r8 | r2 += r8;
| if (r2 < r2) {
0x0001c258 movhs lr, r5 | lr = r5;
| }
0x0001c25c adds r2, ip, r2 | r2 = ip + r2;
| if (r2 < ip) {
0x0001c260 movhs r4, 1 | r4 = 1;
| }
| if (r2 >= ip) {
0x0001c264 movlo r4, 0 | r4 = 0;
| }
0x0001c268 adds r0, r1, r2 | r0 = r1 + r2;
0x0001c26c ldr r2, [r3, 0x5c] | r2 = *((r3 + 0x5c));
0x0001c270 add r4, r4, lr | r4 += lr;
| if (r0 < r1) {
0x0001c274 movhs lr, 1 | lr = 1;
| }
| if (r0 >= r1) {
0x0001c278 movlo lr, 0 | lr = 0;
| }
0x0001c27c add r4, r4, lr | r4 += lr;
0x0001c280 cmp r2, r0 |
| if (r2 > r0) {
0x0001c284 movls lr, r4 | lr = r4;
| }
| if (r2 <= r0) {
0x0001c288 subhi lr, r4, 1 | lr = r4 - 1;
| }
0x0001c28c cmn lr, 1 |
0x0001c290 sub r0, r0, r2 | r0 -= r2;
0x0001c294 str r0, [r3] | *(r3) = r0;
0x0001c298 ldr r4, [r3, 4] | r4 = *((r3 + 4));
| if (lr == 1) {
0x0001c29c beq 0x1c8dc | goto label_2;
| }
0x0001c2a0 adds r4, r4, lr | r4 += lr;
| if (r4 < r4) {
0x0001c2a4 movhs sb, 1 | sb = 1;
| }
| if (r4 >= r4) {
0x0001c2a8 movlo sb, 0 | sb = 0;
| }
| label_0:
0x0001c2ac ldr r7, [r3, 0x34] | r7 = *((r3 + 0x34));
0x0001c2b0 ldr r0, [r3, 0x58] | r0 = *((r3 + 0x58));
0x0001c2b4 adds r4, r7, r4 | r4 = r7 + r4;
| if (r4 < r7) {
0x0001c2b8 movhs lr, 1 | lr = 1;
| }
| if (r4 >= r7) {
0x0001c2bc movlo lr, 0 | lr = 0;
| }
0x0001c2c0 adds r4, r0, r4 | r4 = r0 + r4;
| if (r4 < r0) {
0x0001c2c4 movhs r5, 1 | r5 = 1;
| }
| if (r4 >= r0) {
0x0001c2c8 movlo r5, 0 | r5 = 0;
| }
0x0001c2cc add lr, lr, sb | lr += sb;
0x0001c2d0 adds r4, r2, r4 | r4 = r2 + r4;
0x0001c2d4 add lr, lr, r5 | lr += r5;
0x0001c2d8 and lr, lr, 0xff | lr &= 0xff;
| if (r4 < r2) {
0x0001c2dc movhs r5, 1 | r5 = 1;
| }
| if (r4 >= r2) {
0x0001c2e0 movlo r5, 0 | r5 = 0;
| }
0x0001c2e4 add lr, lr, r5 | lr += r5;
0x0001c2e8 cmp r8, r4 |
| if (r8 <= r4) {
0x0001c2ec subhi lr, lr, 1 | lr--;
| }
0x0001c2f0 sub r5, r4, r8 | r5 = r4 - r8;
0x0001c2f4 cmp r1, r5 |
| if (r1 <= r5) {
0x0001c2f8 subhi lr, lr, 1 | lr--;
| }
0x0001c2fc ldr sb, [r3, 8] | sb = *((r3 + 8));
0x0001c300 lsl lr, lr, 0x18 | lr <<= 0x18;
0x0001c304 asr lr, lr, 0x18 | lr >>= 0x18;
0x0001c308 adds r4, sb, lr | r4 = sb + lr;
| if (r4 < sb) {
0x0001c30c movhs fp, 1 |
| }
| if (r4 >= sb) {
0x0001c310 movlo fp, 0 |
| }
0x0001c314 sub r5, r5, r1 | r5 -= r1;
0x0001c318 cmp lr, 0 |
0x0001c31c str r5, [r3, 4] | *((r3 + 4)) = r5;
| if (lr < 0) {
0x0001c320 movge sl, fp | sl = fp;
| }
| if (lr < 0) {
0x0001c324 bge 0x1c338 |
0x0001c328 rsb sl, lr, 0 | sl = lr - ;
0x0001c32c cmp sb, sl |
| if (sb < sl) {
0x0001c330 movhs sl, 0 | sl = 0;
| }
| if (sb < sl) {
0x0001c334 mvnlo sl, 0 | sl = ~0;
| goto label_3;
| }
| }
| label_3:
0x0001c338 ldr r5, [r3, 0x38] | r5 = *((r3 + 0x38));
0x0001c33c ldr sb, [r3, 0xc] | sb = *((r3 + 0xc));
0x0001c340 adds r4, r5, r4 | r4 = r5 + r4;
| if (r4 < r5) {
0x0001c344 movhs fp, 1 |
| }
| if (r4 >= r5) {
0x0001c348 movlo fp, 0 |
| }
0x0001c34c adds r4, r2, r4 | r4 = r2 + r4;
| if (r4 < r2) {
0x0001c350 movhs lr, 1 | lr = 1;
| }
| if (r4 >= r2) {
0x0001c354 movlo lr, 0 | lr = 0;
| }
0x0001c358 add lr, lr, fp | lr += fp;
0x0001c35c cmp r7, r4 |
| if (r7 <= r4) {
0x0001c360 subhi lr, lr, 1 | lr--;
| }
0x0001c364 sub r4, r4, r7 | r4 -= r7;
0x0001c368 cmp ip, r4 |
| if (ip > r4) {
0x0001c36c movls fp, lr |
| }
| if (ip <= r4) {
0x0001c370 subhi fp, lr, 1 |
| }
0x0001c374 add fp, fp, sl |
0x0001c378 adds lr, sb, fp | lr = sb + fp;
0x0001c37c sub r4, r4, ip | r4 -= ip;
| if (lr < sb) {
0x0001c380 movhs sl, 1 | sl = 1;
| }
| if (lr >= sb) {
0x0001c384 movlo sl, 0 | sl = 0;
| }
0x0001c388 cmp fp, 0 |
0x0001c38c str r4, [r3, 8] | *((r3 + 8)) = r4;
| if (fp < 0) {
0x0001c390 bge 0x1c3a4 |
0x0001c394 rsb sl, fp, 0 | sl = fp - ;
0x0001c398 cmp sb, sl |
| if (sb < sl) {
0x0001c39c movhs sl, 0 | sl = 0;
| }
| if (sb < sl) {
0x0001c3a0 mvnlo sl, 0 | sl = ~0;
| goto label_4;
| }
| }
| label_4:
0x0001c3a4 ldr r4, [r3, 0x3c] | r4 = *((r3 + 0x3c));
0x0001c3a8 ldr fp, [r3, 0x10] | fp = *((r3 + 0x10));
0x0001c3ac adds lr, r4, lr | lr = r4 + lr;
0x0001c3b0 str r4, [sp] | *(sp) = r4;
| if (lr < r4) {
0x0001c3b4 movhs r4, 1 | r4 = 1;
| }
| if (lr >= r4) {
0x0001c3b8 movlo r4, 0 | r4 = 0;
| }
0x0001c3bc adds lr, r8, lr | lr = r8 + lr;
| if (lr < r8) {
0x0001c3c0 movhs sb, 1 | sb = 1;
| }
| if (lr >= r8) {
0x0001c3c4 movlo sb, 0 | sb = 0;
| }
0x0001c3c8 adds lr, r1, lr | lr = r1 + lr;
0x0001c3cc add r4, sb, r4 | r4 = sb + r4;
| if (lr < r1) {
0x0001c3d0 movhs sb, 1 | sb = 1;
| }
| if (lr >= r1) {
0x0001c3d4 movlo sb, 0 | sb = 0;
| }
0x0001c3d8 adds lr, ip, lr | lr = ip + lr;
0x0001c3dc add r4, r4, sb | r4 += sb;
| if (lr < ip) {
0x0001c3e0 movhs sb, 1 | sb = 1;
| }
| if (lr >= ip) {
0x0001c3e4 movlo sb, 0 | sb = 0;
| }
0x0001c3e8 add r4, r4, sb | r4 += sb;
0x0001c3ec cmp r5, lr |
| if (r5 <= lr) {
0x0001c3f0 subhi r4, r4, 1 | r4--;
| }
0x0001c3f4 sub lr, lr, r5 | lr -= r5;
0x0001c3f8 cmp r0, lr |
| if (r0 <= lr) {
0x0001c3fc subhi r4, r4, 1 | r4--;
| }
0x0001c400 sub lr, lr, r0 | lr -= r0;
0x0001c404 cmp r2, lr |
| if (r2 <= lr) {
0x0001c408 subhi r4, r4, 1 | r4--;
| }
0x0001c40c add r4, r4, sl | r4 += sl;
0x0001c410 lsl sb, r4, 0x18 | sb = r4 << 0x18;
0x0001c414 asr sb, sb, 0x18 | sb >>= 0x18;
0x0001c418 adds r4, fp, sb | r4 = fp + sb;
0x0001c41c sub lr, lr, r2 | lr -= r2;
| if (r4 < fp) {
0x0001c420 movhs sl, 1 | sl = 1;
| }
| if (r4 >= fp) {
0x0001c424 movlo sl, 0 | sl = 0;
| }
0x0001c428 cmp sb, 0 |
0x0001c42c str lr, [r3, 0xc] |
| if (sb < 0) {
0x0001c430 bge 0x1c444 |
0x0001c434 rsb sl, sb, 0 | sl = sb - ;
0x0001c438 cmp fp, sl |
| if (fp < sl) {
0x0001c43c movhs sl, 0 | sl = 0;
| }
| if (fp < sl) {
0x0001c440 mvnlo sl, 0 | sl = ~0;
| goto label_5;
| }
| }
| label_5:
0x0001c444 ldr fp, [r3, 0x40] | fp = *((r3 + 0x40));
0x0001c448 adds r4, ip, r4 | r4 = ip + r4;
| if (r4 < ip) {
0x0001c44c movhs lr, 1 | lr = 1;
| }
| if (r4 >= ip) {
0x0001c450 movlo lr, 0 | lr = 0;
| }
0x0001c454 adds r4, ip, r4 | r4 = ip + r4;
| if (r4 < ip) {
0x0001c458 movhs sb, 1 | sb = 1;
| }
| if (r4 >= ip) {
0x0001c45c movlo sb, 0 | sb = 0;
| }
0x0001c460 adds r4, fp, r4 | r4 = fp + r4;
0x0001c464 add sb, sb, lr | sb += lr;
| if (r4 < fp) {
0x0001c468 movhs lr, 1 | lr = 1;
| }
| if (r4 >= fp) {
0x0001c46c movlo lr, 0 | lr = 0;
| }
0x0001c470 adds r4, r7, r4 | r4 = r7 + r4;
0x0001c474 add sb, sb, lr | sb += lr;
0x0001c478 str fp, [sp, 4] | var_4h = fp;
| if (r4 < r7) {
0x0001c47c movhs fp, 1 |
| }
| if (r4 >= r7) {
0x0001c480 movlo fp, 0 |
| }
0x0001c484 adds r4, r8, r4 | r4 = r8 + r4;
| if (r4 < r8) {
0x0001c488 movhs lr, 1 | lr = 1;
| }
| if (r4 >= r8) {
0x0001c48c movlo lr, 0 | lr = 0;
| }
0x0001c490 add sb, sb, fp | sb += fp;
0x0001c494 adds r4, r1, r4 | r4 = r1 + r4;
0x0001c498 add sb, sb, lr | sb += lr;
0x0001c49c ldr r8, [sp] | r8 = *(sp);
| if (r4 < r1) {
0x0001c4a0 movhs lr, 1 | lr = 1;
| }
| if (r4 >= r1) {
0x0001c4a4 movlo lr, 0 | lr = 0;
| }
0x0001c4a8 adds r4, r0, r4 | r4 = r0 + r4;
0x0001c4ac add sb, sb, lr | sb += lr;
| if (r4 < r0) {
0x0001c4b0 movhs lr, 1 | lr = 1;
| }
| if (r4 >= r0) {
0x0001c4b4 movlo lr, 0 | lr = 0;
| }
0x0001c4b8 add lr, sb, lr | lr = sb + lr;
0x0001c4bc cmp r8, r4 |
| if (r8 <= r4) {
0x0001c4c0 subhi lr, lr, 1 | lr--;
| }
0x0001c4c4 sub r4, r4, r8 | r4 -= r8;
0x0001c4c8 cmp r2, r4 |
| if (r2 <= r4) {
0x0001c4cc subhi lr, lr, 1 | lr--;
| }
0x0001c4d0 sub r4, r4, r2 | r4 -= r2;
0x0001c4d4 cmp r2, r4 |
| if (r2 <= r4) {
0x0001c4d8 subhi lr, lr, 1 | lr--;
| }
0x0001c4dc add lr, lr, sl | lr += sl;
0x0001c4e0 ldr sb, [r3, 0x14] | sb = *((r3 + 0x14));
0x0001c4e4 lsl lr, lr, 0x18 | lr <<= 0x18;
0x0001c4e8 asr lr, lr, 0x18 | lr >>= 0x18;
0x0001c4ec adds r8, sb, lr | r8 = sb + lr;
| if (r8 < sb) {
0x0001c4f0 movhs sl, 1 | sl = 1;
| }
| if (r8 >= sb) {
0x0001c4f4 movlo sl, 0 | sl = 0;
| }
0x0001c4f8 sub r4, r4, r2 | r4 -= r2;
0x0001c4fc cmp lr, 0 |
0x0001c500 str r4, [r3, 0x10] | *((r3 + 0x10)) = r4;
| if (lr < 0) {
0x0001c504 movge lr, sl | lr = sl;
| }
| if (lr < 0) {
0x0001c508 bge 0x1c51c |
0x0001c50c rsb lr, lr, 0 | lr -= ;
0x0001c510 cmp sb, lr |
| if (sb < lr) {
0x0001c514 movhs lr, 0 | lr = 0;
| }
| if (sb < lr) {
0x0001c518 mvnlo lr, 0 | lr = ~0;
| goto label_6;
| }
| }
| label_6:
0x0001c51c ldr sb, [r3, 0x44] | sb = *((r3 + 0x44));
0x0001c520 adds r8, r0, r8 | r8 = r0 + r8;
| if (r8 < r0) {
0x0001c524 movhs sl, 1 | sl = 1;
| }
| if (r8 >= r0) {
0x0001c528 movlo sl, 0 | sl = 0;
| }
0x0001c52c adds r8, r0, r8 | r8 = r0 + r8;
| if (r8 < r0) {
0x0001c530 movhs r4, 1 | r4 = 1;
| }
| if (r8 >= r0) {
0x0001c534 movlo r4, 0 | r4 = 0;
| }
0x0001c538 adds r8, sb, r8 | r8 = sb + r8;
| if (r8 < sb) {
0x0001c53c movhs fp, 1 |
| }
| if (r8 >= sb) {
0x0001c540 movlo fp, 0 |
| }
0x0001c544 add r4, r4, sl | r4 += sl;
0x0001c548 adds r8, r5, r8 | r8 = r5 + r8;
0x0001c54c add r4, r4, fp | r4 += fp;
| if (r8 < r5) {
0x0001c550 movhs fp, 1 |
| }
| if (r8 >= r5) {
0x0001c554 movlo fp, 0 |
| }
0x0001c558 adds r7, r7, r8 | r7 += r8;
0x0001c55c add fp, r4, fp |
| if (r7 < r7) {
0x0001c560 movhs r4, 1 | r4 = 1;
| }
| if (r7 >= r7) {
0x0001c564 movlo r4, 0 | r4 = 0;
| }
0x0001c568 adds r7, ip, r7 | r7 = ip + r7;
| if (r7 < ip) {
0x0001c56c movhs r8, 1 | r8 = 1;
| }
| if (r7 >= ip) {
0x0001c570 movlo r8, 0 | r8 = 0;
| }
0x0001c574 add r4, fp, r4 | r4 = fp + r4;
0x0001c578 adds r7, r2, r7 | r7 = r2 + r7;
0x0001c57c add r4, r4, r8 | r4 += r8;
| if (r7 < r2) {
0x0001c580 movhs r8, 1 | r8 = 1;
| }
| if (r7 >= r2) {
0x0001c584 movlo r8, 0 | r8 = 0;
| }
0x0001c588 add r8, r4, r8 | r8 = r4 + r8;
0x0001c58c ldr r4, [sp, 4] | r4 = var_4h;
0x0001c590 cmp r4, r7 |
| if (r4 <= r7) {
0x0001c594 subhi r8, r8, 1 | r8--;
| }
0x0001c598 add lr, r8, lr | lr = r8 + lr;
0x0001c59c ldr r8, [r3, 0x18] | r8 = *((r3 + 0x18));
0x0001c5a0 lsl lr, lr, 0x18 | lr <<= 0x18;
0x0001c5a4 asr lr, lr, 0x18 | lr >>= 0x18;
0x0001c5a8 adds sl, r8, lr | sl = r8 + lr;
0x0001c5ac sub r7, r7, r4 | r7 -= r4;
| if (sl < r8) {
0x0001c5b0 movhs r4, 1 | r4 = 1;
| }
| if (sl >= r8) {
0x0001c5b4 movlo r4, 0 | r4 = 0;
| }
0x0001c5b8 cmp lr, 0 |
0x0001c5bc str r7, [r3, 0x14] | *((r3 + 0x14)) = r7;
| if (lr < 0) {
0x0001c5c0 movge lr, r4 | lr = r4;
| }
| if (lr < 0) {
0x0001c5c4 bge 0x1c5d8 |
0x0001c5c8 rsb lr, lr, 0 | lr -= ;
0x0001c5cc cmp r8, lr |
| if (r8 < lr) {
0x0001c5d0 movhs lr, 0 | lr = 0;
| }
| if (r8 < lr) {
0x0001c5d4 mvnlo lr, 0 | lr = ~0;
| goto label_7;
| }
| }
| label_7:
0x0001c5d8 adds sl, r2, sl | sl = r2 + sl;
| if (sl < r2) {
0x0001c5dc movhs r4, 1 | r4 = 1;
| }
| if (sl >= r2) {
0x0001c5e0 movlo r4, 0 | r4 = 0;
| }
0x0001c5e4 adds sl, r2, sl | sl = r2 + sl;
| if (sl < r2) {
0x0001c5e8 movhs r7, 1 | r7 = 1;
| }
| if (sl >= r2) {
0x0001c5ec movlo r7, 0 | r7 = 0;
| }
0x0001c5f0 ldr r8, [r3, 0x48] | r8 = *((r3 + 0x48));
0x0001c5f4 add r7, r7, r4 | r7 += r4;
0x0001c5f8 ldr r4, [sp] | r4 = *(sp);
0x0001c5fc adds sl, r8, sl | sl = r8 + sl;
| if (sl < r8) {
0x0001c600 movhs fp, 1 |
| }
| if (sl >= r8) {
0x0001c604 movlo fp, 0 |
| }
0x0001c608 adds sl, r4, sl | sl = r4 + sl;
| if (sl < r4) {
0x0001c60c movhs r4, 1 | r4 = 1;
| }
| if (sl >= r4) {
0x0001c610 movlo r4, 0 | r4 = 0;
| }
0x0001c614 add r7, r7, fp | r7 += fp;
0x0001c618 adds sl, r5, sl | sl = r5 + sl;
0x0001c61c add r7, r7, r4 | r7 += r4;
| if (sl < r5) {
0x0001c620 movhs r4, 1 | r4 = 1;
| }
| if (sl >= r5) {
0x0001c624 movlo r4, 0 | r4 = 0;
| }
0x0001c628 adds sl, r0, sl | sl = r0 + sl;
0x0001c62c add r7, r7, r4 | r7 += r4;
| if (sl < r0) {
0x0001c630 movhs r4, 1 | r4 = 1;
| }
| if (sl >= r0) {
0x0001c634 movlo r4, 0 | r4 = 0;
| }
0x0001c638 add r4, r7, r4 | r4 = r7 + r4;
0x0001c63c cmp sb, sl |
| if (sb <= sl) {
0x0001c640 subhi r4, r4, 1 | r4--;
| }
0x0001c644 add r4, r4, lr | r4 += lr;
0x0001c648 ldr r7, [r3, 0x1c] | r7 = *((r3 + 0x1c));
0x0001c64c lsl r4, r4, 0x18 | r4 <<= 0x18;
0x0001c650 asr r4, r4, 0x18 | r4 >>= 0x18;
0x0001c654 adds lr, r7, r4 | lr = r7 + r4;
| if (lr < r7) {
0x0001c658 movhs r5, 1 | r5 = 1;
| }
| if (lr >= r7) {
0x0001c65c movlo r5, 0 | r5 = 0;
| }
0x0001c660 sub sl, sl, sb | sl -= sb;
0x0001c664 cmp r4, 0 |
0x0001c668 str sl, [r3, 0x18] | *((r3 + 0x18)) = sl;
| if (r4 < 0) {
0x0001c66c movge fp, r5 |
| }
| if (r4 < 0) {
0x0001c670 bge 0x1c684 |
0x0001c674 rsb r5, r4, 0 | r5 = r4 - ;
0x0001c678 cmp r7, r5 |
| if (r7 < r5) {
0x0001c67c movhs fp, 0 |
| }
| if (r7 < r5) {
0x0001c680 mvnlo fp, 0 | goto label_8;
| }
| }
| label_8:
0x0001c684 ldr r7, [r3, 0x4c] | r7 = *((r3 + 0x4c));
0x0001c688 ldr r5, [sp, 4] | r5 = var_4h;
0x0001c68c adds lr, r7, lr | lr = r7 + lr;
| if (lr < r7) {
0x0001c690 movhs r4, 1 | r4 = 1;
| }
| if (lr >= r7) {
0x0001c694 movlo r4, 0 | r4 = 0;
| }
0x0001c698 str r4, [sp, 0xc] | var_ch = r4;
0x0001c69c ldr r4, [sp] | r4 = *(sp);
0x0001c6a0 adds lr, r5, lr | lr = r5 + lr;
| if (lr < r5) {
0x0001c6a4 movhs r5, 1 | r5 = 1;
| }
| if (lr >= r5) {
0x0001c6a8 movlo r5, 0 | r5 = 0;
| }
0x0001c6ac adds lr, r4, lr | lr = r4 + lr;
0x0001c6b0 ldr r4, [sp, 0xc] | r4 = var_ch;
0x0001c6b4 ldr sl, [r3, 0x20] | sl = *((r3 + 0x20));
0x0001c6b8 add r4, r5, r4 | r4 = r5 + r4;
| if (lr < r4) {
0x0001c6bc movhs r5, 1 | r5 = 1;
| }
| if (lr >= r4) {
0x0001c6c0 movlo r5, 0 | r5 = 0;
| }
0x0001c6c4 adds lr, r2, lr | lr = r2 + lr;
0x0001c6c8 add r4, r4, r5 | r4 += r5;
| if (lr < r2) {
0x0001c6cc movhs r5, 1 | r5 = 1;
| }
| if (lr >= r2) {
0x0001c6d0 movlo r5, 0 | r5 = 0;
| }
0x0001c6d4 add r5, r4, r5 | r5 = r4 + r5;
0x0001c6d8 cmp r8, lr |
| if (r8 <= lr) {
0x0001c6dc subhi r5, r5, 1 | r5--;
| }
0x0001c6e0 add r5, r5, fp | r5 += fp;
0x0001c6e4 adds r4, sl, r5 | r4 = sl + r5;
0x0001c6e8 sub lr, lr, r8 | lr -= r8;
| if (r4 < sl) {
0x0001c6ec movhs fp, 1 |
| }
| if (r4 >= sl) {
0x0001c6f0 movlo fp, 0 |
| }
0x0001c6f4 cmp r5, 0 |
0x0001c6f8 str lr, [r3, 0x1c] |
| if (r5 < 0) {
0x0001c6fc bge 0x1c710 |
0x0001c700 rsb fp, r5, 0 |
0x0001c704 cmp sl, fp |
| if (sl < fp) {
0x0001c708 movhs fp, 0 |
| }
| if (sl < fp) {
0x0001c70c mvnlo fp, 0 | goto label_9;
| }
| }
| label_9:
0x0001c710 ldr sl, [sp, 4] | sl = var_4h;
0x0001c714 adds r4, r1, r4 | r4 = r1 + r4;
| if (r4 < r1) {
0x0001c718 movhs r5, 1 | r5 = 1;
| }
| if (r4 >= r1) {
0x0001c71c movlo r5, 0 | r5 = 0;
| }
0x0001c720 adds r4, sb, r4 | r4 = sb + r4;
| if (r4 < sb) {
0x0001c724 movhs lr, 1 | lr = 1;
| }
| if (r4 >= sb) {
0x0001c728 movlo lr, 0 | lr = 0;
| }
0x0001c72c adds r4, sl, r4 | r4 = sl + r4;
0x0001c730 add sl, lr, r5 | sl = lr + r5;
| if (r4 < sl) {
0x0001c734 movhs lr, 1 | lr = 1;
| }
| if (r4 >= sl) {
0x0001c738 movlo lr, 0 | lr = 0;
| }
0x0001c73c add sl, sl, lr | sl += lr;
0x0001c740 ldr r5, [r3, 0x24] | r5 = *((r3 + 0x24));
0x0001c744 cmp r7, r4 |
| if (r7 <= r4) {
0x0001c748 subhi sl, sl, 1 | sl--;
| }
0x0001c74c add sl, sl, fp | sl += fp;
0x0001c750 adds lr, r5, sl | lr = r5 + sl;
0x0001c754 sub r4, r4, r7 | r4 -= r7;
| if (lr < r5) {
0x0001c758 movhs fp, 1 |
| }
| if (lr >= r5) {
0x0001c75c movlo fp, 0 |
| }
0x0001c760 cmp sl, 0 |
0x0001c764 str r4, [r3, 0x20] | *((r3 + 0x20)) = r4;
| if (sl < 0) {
0x0001c768 bge 0x1c77c |
0x0001c76c rsb fp, sl, 0 |
0x0001c770 cmp r5, fp |
| if (r5 < fp) {
0x0001c774 movhs fp, 0 |
| }
| if (r5 < fp) {
0x0001c778 mvnlo fp, 0 | goto label_10;
| }
| }
| label_10:
0x0001c77c adds lr, ip, lr | lr = ip + lr;
| if (lr < ip) {
0x0001c780 movhs r4, 1 | r4 = 1;
| }
| if (lr >= ip) {
0x0001c784 movlo r4, 0 | r4 = 0;
| }
0x0001c788 adds lr, r8, lr | lr = r8 + lr;
| if (lr < r8) {
0x0001c78c movhs r5, 1 | r5 = 1;
| }
| if (lr >= r8) {
0x0001c790 movlo r5, 0 | r5 = 0;
| }
0x0001c794 adds sb, sb, lr | sb += lr;
0x0001c798 add r5, r5, r4 | r5 += r4;
| if (sb < sb) {
0x0001c79c movhs r4, 1 | r4 = 1;
| }
| if (sb >= sb) {
0x0001c7a0 movlo r4, 0 | r4 = 0;
| }
0x0001c7a4 add r5, r5, r4 | r5 += r4;
0x0001c7a8 ldr sl, [r3, 0x28] | sl = *((r3 + 0x28));
0x0001c7ac cmp r1, sb |
| if (r1 <= sb) {
0x0001c7b0 subhi r5, r5, 1 | r5--;
| }
0x0001c7b4 add fp, r5, fp |
0x0001c7b8 adds r5, sl, fp | r5 = sl + fp;
| if (r5 < sl) {
0x0001c7bc movhs lr, 1 | lr = 1;
| }
| if (r5 >= sl) {
0x0001c7c0 movlo lr, 0 | lr = 0;
| }
0x0001c7c4 sub sb, sb, r1 | sb -= r1;
0x0001c7c8 cmp fp, 0 |
0x0001c7cc str sb, [r3, 0x24] | *((r3 + 0x24)) = sb;
| if (fp < 0) {
0x0001c7d0 movge r4, lr | r4 = lr;
| }
| if (fp < 0) {
0x0001c7d4 bge 0x1c7e8 |
0x0001c7d8 rsb fp, fp, 0 |
0x0001c7dc cmp sl, fp |
| if (sl < fp) {
0x0001c7e0 movhs r4, 0 | r4 = 0;
| }
| if (sl < fp) {
0x0001c7e4 mvnlo r4, 0 | r4 = ~0;
| goto label_11;
| }
| }
| label_11:
0x0001c7e8 adds r5, r0, r5 | r5 = r0 + r5;
| if (r5 < r0) {
0x0001c7ec movhs sb, 1 | sb = 1;
| }
| if (r5 >= r0) {
0x0001c7f0 movlo sb, 0 | sb = 0;
| }
0x0001c7f4 adds r5, r7, r5 | r5 = r7 + r5;
| if (r5 < r7) {
0x0001c7f8 movhs lr, 1 | lr = 1;
| }
| if (r5 >= r7) {
0x0001c7fc movlo lr, 0 | lr = 0;
| }
0x0001c800 adds r8, r8, r5 | r8 += r5;
| if (r8 < r8) {
0x0001c804 movhs r5, 1 | r5 = 1;
| }
| if (r8 >= r8) {
0x0001c808 movlo r5, 0 | r5 = 0;
| }
0x0001c80c add lr, lr, sb | lr += sb;
0x0001c810 add lr, lr, r5 | lr += r5;
0x0001c814 ldr r5, [r3, 0x2c] | r5 = *((r3 + 0x2c));
0x0001c818 cmp ip, r8 |
| if (ip <= r8) {
0x0001c81c subhi lr, lr, 1 | lr--;
| }
0x0001c820 add lr, lr, r4 | lr += r4;
0x0001c824 adds r4, r5, lr | r4 = r5 + lr;
0x0001c828 sub r8, r8, ip | r8 -= ip;
| if (r4 < r5) {
0x0001c82c movhs ip, 1 |
| }
| if (r4 >= r5) {
0x0001c830 movlo ip, 0 |
| }
0x0001c834 cmp lr, 0 |
0x0001c838 str r8, [r3, 0x28] | *((r3 + 0x28)) = r8;
| if (lr < 0) {
0x0001c83c movge r5, ip | r5 = ip;
| }
| if (lr < 0) {
0x0001c840 bge 0x1c854 |
0x0001c844 rsb lr, lr, 0 | lr -= ;
0x0001c848 cmp r5, lr |
| if (r5 < lr) {
0x0001c84c movhs r5, 0 | r5 = 0;
| }
| if (r5 < lr) {
0x0001c850 mvnlo r5, 0 | r5 = ~0;
| goto label_12;
| }
| }
| label_12:
0x0001c854 adds r2, r2, r4 | r2 += r4;
| if (r2 < r2) {
0x0001c858 movhs ip, 1 |
| }
| if (r2 >= r2) {
0x0001c85c movlo ip, 0 |
| }
0x0001c860 adds r2, r1, r2 | r2 = r1 + r2;
| if (r2 < r1) {
0x0001c864 movhs lr, 1 | lr = 1;
| }
| if (r2 >= r1) {
0x0001c868 movlo lr, 0 | lr = 0;
| }
0x0001c86c adds r2, r7, r2 | r2 = r7 + r2;
| if (r2 < r7) {
0x0001c870 movhs r1, 1 | r1 = 1;
| }
| if (r2 >= r7) {
0x0001c874 movlo r1, 0 | r1 = 0;
| }
0x0001c878 add lr, lr, ip | lr += ip;
0x0001c87c add lr, lr, r1 | lr += r1;
0x0001c880 cmp r0, r2 |
| if (r0 <= r2) {
0x0001c884 subhi lr, lr, 1 | lr--;
| }
0x0001c888 add lr, lr, r5 | lr += r5;
0x0001c88c bic r1, lr, lr, asr 31 | r1 = BIT_MASK (lr, lr);
0x0001c890 sub r2, r2, r0 | r2 -= r0;
0x0001c894 str r2, [r3, 0x2c] | *((r3 + 0x2c)) = r2;
0x0001c898 str r1, [r3, 0x30] | *((r3 + 0x30)) = r1;
0x0001c89c ldr r2, [r6, 4] | r2 = *((r6 + 4));
0x0001c8a0 cmp r2, 0xd |
| if (r2 < 0xd) {
0x0001c8a4 bls 0x1c8c8 | goto label_13;
| }
0x0001c8a8 add r3, r3, 0x30 | r3 += 0x30;
0x0001c8ac mov r2, 0xd | r2 = 0xd;
0x0001c8b0 mov r0, 0 | r0 = 0;
| do {
0x0001c8b4 str r0, [r3, 4]! | *((r3 += 4)) = r0;
0x0001c8b8 ldr r1, [r6, 4] | r1 = *((r6 + 4));
0x0001c8bc add r2, r2, 1 | r2++;
0x0001c8c0 cmp r1, r2 |
0x0001c8c4 bhi 0x1c8b4 |
| } while (r1 > r2);
| label_13:
0x0001c8c8 cmp lr, 0 |
| if (lr >= 0) {
0x0001c8cc blt 0x1c8f0 |
| label_1:
0x0001c8d0 ldr r0, [sp, 8] | r0 = var_8h;
0x0001c8d4 add sp, sp, 0x54 |
0x0001c8d8 pop {r4, r5, r6, r7, r8, sb, sl, fp, pc} |
| label_2:
0x0001c8dc cmp r4, 0 |
| if (r4 == 0) {
0x0001c8e0 movne sb, 0 | sb = 0;
| }
| if (r4 != 0) {
0x0001c8e4 mvneq sb, 0 | sb = ~0;
| }
0x0001c8e8 sub r4, r4, 1 | r4--;
0x0001c8ec b 0x1c2ac | goto label_0;
| }
0x0001c8f0 ldr r3, [sp, 0x14] | r3 = var_14h;
0x0001c8f4 ldr r2, [sp, 0x18] | r2 = var_18h;
0x0001c8f8 sub r3, r3, 0xc0000001 | r3 -= 0xc0000001;
0x0001c8fc rsb lr, lr, 0 | lr -= ;
0x0001c900 str lr, [r2, r3, lsl 2] |
0x0001c904 add r1, sp, 0x10 | r1 += var_10h;
0x0001c908 mov r2, r6 | r2 = r6;
0x0001c90c mov r0, r6 | r0 = r6;
0x0001c910 bl 0x90b4 | r0 = fcn_000090b4 ();
0x0001c914 cmp r0, 0 |
0x0001c918 ldr r0, [sp, 8] | r0 = var_8h;
| if (r0 != 0) {
0x0001c91c mvneq r3, 0 | r3 = ~0;
| }
| if (r0 != 0) {
0x0001c920 streq r3, [r6] | *(r6) = r3;
| }
0x0001c924 add sp, sp, 0x54 |
0x0001c928 pop {r4, r5, r6, r7, r8, sb, sl, fp, pc} |
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/unblob_extracted/firmware_extract/56048-12514271.gzip_extract/gzip.uncompressed_extract/5243916-15068666.gzip_extract/gzip.uncompressed_extract/usr/lib/libmbedcrypto.so.2.2.1 @ 0x14710 */
| #include <stdint.h>
|
; (fcn) sym.mbedtls_ctr_drbg_reseed () | void mbedtls_ctr_drbg_reseed (int32_t arg1, int32_t arg2) {
| void * s;
| int32_t var_184h;
| r0 = arg1;
| r1 = arg2;
0x00014710 push {r4, r5, r6, r7, r8, sb, lr} |
0x00014714 ldr r6, [r0, 0x18] | r6 = *((r0 + 0x18));
0x00014718 sub sp, sp, 0x184 |
0x0001471c add r3, r6, r2 | r3 = r6 + r2;
0x00014720 cmp r3, 0x180 |
| if (r3 > 0x180) {
0x00014724 bhi 0x147bc | goto label_1;
| }
0x00014728 mov r5, sp | r5 = sp;
0x0001472c mov r4, r0 | r4 = r0;
0x00014730 mov r8, r1 | r8 = r1;
0x00014734 mov r7, r2 | r7 = r2;
0x00014738 mov r1, 0 | r1 = 0;
0x0001473c mov r2, 0x180 | r2 = 0x180;
0x00014740 mov r0, r5 | r0 = r5;
0x00014744 bl 0x8c28 | memset (r0, r1, r2);
0x00014748 mov r2, r6 | r2 = r6;
0x0001474c mov r1, r5 | r1 = r5;
0x00014750 ldr r3, [r4, 0x138] | r3 = *((r4 + 0x138));
0x00014754 ldr r0, [r4, 0x13c] | r0 = *((r4 + 0x13c));
0x00014758 blx r3 | r0 = uint32_t (*r3)(uint32_t, uint32_t, uint32_t, uint32_t) (r0, r1, r2, r3);
0x0001475c subs sb, r0, 0 | sb = r0 - 0;
| if (sb != r0) {
0x00014760 bne 0x147c4 | goto label_2;
| }
0x00014764 cmp r8, 0 |
0x00014768 cmpne r7, 0 | __asm ("cmpne r7, 0");
0x0001476c ldr r6, [r4, 0x18] | r6 = *((r4 + 0x18));
0x00014770 bne 0x147a4 |
| while (1) {
0x00014774 mov r2, r6 | r2 = r6;
0x00014778 mov r1, r5 | r1 = r5;
0x0001477c mov r0, r5 | r0 = r5;
0x00014780 bl 0x143fc | block_cipher_df ();
0x00014784 mov r1, r5 | r1 = r5;
0x00014788 mov r0, r4 | r0 = r4;
0x0001478c bl 0x145b4 | ctr_drbg_update_internal ();
0x00014790 mov r3, 1 | r3 = 1;
0x00014794 str r3, [r4, 0x10] | *((r4 + 0x10)) = r3;
| label_0:
0x00014798 mov r0, sb | r0 = sb;
0x0001479c add sp, sp, 0x184 |
0x000147a0 pop {r4, r5, r6, r7, r8, sb, pc} |
0x000147a4 add r0, r5, r6 | r0 = r5 + r6;
0x000147a8 mov r1, r8 | r1 = r8;
0x000147ac mov r2, r7 | r2 = r7;
0x000147b0 bl 0x8550 | memcpy (r0, r1, r2);
0x000147b4 add r6, r6, r7 | r6 += r7;
0x000147b8 b 0x14774 |
| }
| label_1:
0x000147bc mvn sb, 0x37 | sb = ~0x37;
0x000147c0 b 0x14798 | goto label_0;
| label_2:
0x000147c4 mvn sb, 0x33 | sb = ~0x33;
0x000147c8 b 0x14798 | goto label_0;
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/unblob_extracted/firmware_extract/56048-12514271.gzip_extract/gzip.uncompressed_extract/5243916-15068666.gzip_extract/gzip.uncompressed_extract/usr/lib/libmbedcrypto.so.2.2.1 @ 0x22178 */
| #include <stdint.h>
|
; (fcn) sym.mbedtls_md_file () | void mbedtls_md_file (int32_t arg1, int32_t arg2) {
| int32_t var_ch;
| int32_t var_8h;
| void * ptr;
| int32_t var_410h;
| int32_t var_4h;
| r0 = arg1;
| r1 = arg2;
0x00022178 push {r4, r5, r6, r7, r8, sb, lr} |
0x0002217c subs r5, r0, 0 | r5 = r0 - 0;
0x00022180 sub sp, sp, 0x410 |
0x00022184 sub sp, sp, 4 |
| if (r5 == r0) {
0x00022188 beq 0x22254 | goto label_1;
| }
0x0002218c mov r0, r1 | r0 = r1;
0x00022190 ldr r1, [pc, 0xcc] | r1 = *(0x22260);
0x00022194 mov r7, r2 | r7 = r2;
0x00022198 add r1, pc, r1 | r1 = pc + r1;
0x0002219c bl 0x91a4 | r0 = fopen64 ();
0x000221a0 subs r6, r0, 0 | r6 = r0 - 0;
| if (r6 == r0) {
0x000221a4 beq 0x2225c | goto label_2;
| }
0x000221a8 add r4, sp, 0x10 | r4 += ptr;
0x000221ac sub r8, r4, 0xc | r8 -= var_ch;
0x000221b0 mov r0, r8 | r0 = r8;
0x000221b4 bl 0x8958 | fcn_00008958 ();
0x000221b8 mov r0, r8 | r0 = r8;
0x000221bc mov r2, 0 | r2 = 0;
0x000221c0 mov r1, r5 | r1 = r5;
0x000221c4 bl 0x8ba4 | fcn_00008ba4 ();
0x000221c8 subs sb, r0, 0 | sb -= var_ch;
| if (sb != var_ch) {
0x000221cc bne 0x2222c | goto label_3;
| }
0x000221d0 ldr r3, [r5, 0x10] | r3 = *((r5 + 0x10));
0x000221d4 ldr r0, [sp, 8] | r0 = var_8h;
0x000221d8 blx r3 | uint32_t (*r3)(uint32_t, uint32_t) (r0, r3);
0x000221dc b 0x221ec |
| while (r2 != ptr) {
0x000221e0 ldr r3, [r5, 0x14] | r3 = *((r5 + 0x14));
0x000221e4 ldr r0, [sp, 8] | r0 = var_8h;
0x000221e8 blx r3 | uint32_t (*r3)(uint32_t, uint32_t) (r0, r3);
0x000221ec mov r2, 0x400 | r2 = 0x400;
0x000221f0 mov r1, 1 | r1 = 1;
0x000221f4 mov r3, r6 | r3 = r6;
0x000221f8 mov r0, r4 | r0 = r4;
0x000221fc bl 0x8b98 | fread (r0, r1, r2, r3);
0x00022200 mov r1, r4 | r1 = r4;
0x00022204 subs r2, r0, 0 | r2 -= ptr;
0x00022208 bne 0x221e0 |
| }
0x0002220c mov r0, r6 | r0 = r6;
0x00022210 bl 0x89dc | r0 = ferror (r0);
0x00022214 subs sb, r0, 0 | sb = r0 - 0;
| if (sb != r0) {
0x00022218 bne 0x2224c | goto label_4;
| }
0x0002221c ldr r3, [r5, 0x18] | r3 = *((r5 + 0x18));
0x00022220 mov r1, r7 | r1 = r7;
0x00022224 ldr r0, [sp, 8] | r0 = var_8h;
0x00022228 blx r3 | uint32_t (*r3)(uint32_t, uint32_t, uint32_t) (r0, r1, r3);
| do {
| label_3:
0x0002222c mov r0, r6 | r0 = r6;
0x00022230 bl 0x8c70 | fclose (r0);
0x00022234 mov r0, r8 | r0 = r8;
0x00022238 bl 0x9108 | fcn_00009108 ();
| label_0:
0x0002223c mov r0, sb | r0 = sb;
0x00022240 add sp, sp, 0x410 |
0x00022244 add sp, sp, 4 |
0x00022248 pop {r4, r5, r6, r7, r8, sb, pc} |
| label_4:
0x0002224c ldr sb, [pc, 0x14] | sb = *(0x00022268);
0x00022250 b 0x2222c |
| } while (1);
| label_1:
0x00022254 ldr sb, [pc, 0x10] | sb = *(0x0002226c);
0x00022258 b 0x2223c | goto label_0;
| label_2:
0x0002225c ldr sb, [pc, 4] | sb = *(0x00022268);
0x00022260 b 0x2223c | goto label_0;
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/unblob_extracted/firmware_extract/56048-12514271.gzip_extract/gzip.uncompressed_extract/5243916-15068666.gzip_extract/gzip.uncompressed_extract/usr/lib/libmbedcrypto.so.2.2.1 @ 0x2f928 */
| #include <stdint.h>
|
; (fcn) sym.mbedtls_sha512_process () | void mbedtls_sha512_process (int32_t arg1, int32_t arg2) {
| int32_t var_0h;
| int32_t var_4h;
| int32_t var_8h;
| int32_t var_ch;
| int32_t var_10h;
| int32_t var_14h;
| int32_t var_18h;
| int32_t var_18h_2;
| int32_t var_20h;
| int32_t var_24h;
| int32_t var_28h;
| int32_t var_28h_2;
| int32_t var_30h;
| int32_t var_30h_2;
| int32_t var_38h;
| int32_t var_38h_2;
| int32_t var_40h;
| int32_t var_44h;
| int32_t var_48h;
| int32_t var_4ch;
| int32_t var_50h;
| int32_t var_54h;
| int32_t var_58h;
| int32_t var_5ch;
| int32_t var_60h;
| int32_t var_64h;
| int32_t var_68h;
| int32_t var_6ch;
| int32_t var_70h;
| int32_t var_74h;
| int32_t var_78h;
| int32_t var_7ch;
| int32_t var_80h;
| int32_t var_84h;
| int32_t var_88h;
| int32_t var_8ch;
| int32_t var_90h;
| int32_t var_94h;
| int32_t var_98h;
| int32_t var_9ch;
| int32_t var_a0h;
| int32_t var_a4h;
| int32_t var_a8h;
| int32_t var_ach;
| int32_t var_b0h;
| int32_t var_b4h;
| int32_t var_b8h;
| int32_t var_bch;
| int32_t var_c0h;
| int32_t var_c4h;
| int32_t var_c8h;
| int32_t var_cch;
| int32_t var_d0h;
| int32_t var_d4h;
| int32_t var_d8h;
| int32_t var_dch;
| int32_t var_e0h;
| int32_t var_e4h;
| int32_t var_e8h;
| int32_t var_ech;
| int32_t var_f0h;
| int32_t var_f4h;
| int32_t var_f8h;
| int32_t var_fch;
| int32_t var_100h;
| int32_t var_104h;
| int32_t var_108h;
| int32_t var_10ch;
| int32_t var_110h;
| int32_t var_114h;
| int32_t var_118h;
| int32_t var_11ch;
| int32_t var_120h;
| int32_t var_124h;
| int32_t var_128h;
| int32_t var_12ch;
| int32_t var_130h;
| int32_t var_134h;
| int32_t var_138h;
| int32_t var_13ch;
| int32_t var_140h;
| int32_t var_144h;
| int32_t var_148h;
| int32_t var_14ch;
| int32_t var_150h;
| int32_t var_154h;
| int32_t var_158h;
| int32_t var_15ch;
| int32_t var_160h;
| int32_t var_164h;
| int32_t var_168h;
| int32_t var_16ch;
| int32_t var_170h;
| int32_t var_174h;
| int32_t var_178h;
| int32_t var_17ch;
| int32_t var_180h;
| int32_t var_184h;
| int32_t var_188h;
| int32_t var_18ch;
| int32_t var_190h;
| int32_t var_194h;
| int32_t var_198h;
| int32_t var_19ch;
| int32_t var_1a0h;
| int32_t var_1a4h;
| int32_t var_1a8h;
| int32_t var_1ach;
| int32_t var_1b0h;
| int32_t var_1b4h;
| int32_t var_1b8h;
| int32_t var_1bch;
| int32_t var_1c4h;
| int32_t var_1c8h;
| int32_t var_0h_16;
| int32_t var_1d0h;
| int32_t var_0h_15;
| int32_t var_1d8h;
| int32_t var_0h_14;
| int32_t var_1e0h;
| int32_t var_0h_13;
| int32_t var_1e8h;
| int32_t var_0h_12;
| int32_t var_1f0h;
| int32_t var_0h_11;
| int32_t var_1f8h;
| int32_t var_0h_10;
| int32_t var_200h;
| int32_t var_0h_6;
| int32_t var_208h;
| int32_t var_0h_7;
| int32_t var_210h;
| int32_t var_0h_8;
| int32_t var_218h;
| int32_t var_0h_9;
| int32_t var_220h;
| int32_t var_224h;
| int32_t var_228h;
| int32_t var_0h_2;
| int32_t var_230h;
| int32_t var_0h_3;
| int32_t var_238h;
| int32_t var_0h_4;
| int32_t var_240h;
| int32_t var_0h_5;
| int32_t var_248h;
| int32_t var_8h_2;
| int32_t var_8h_4;
| int32_t var_ch_2;
| int32_t var_48h_2;
| int32_t var_48h_3;
| int32_t var_70h_2;
| int32_t var_74h_2;
| int32_t var_78h_2;
| int32_t var_78h_3;
| int32_t var_440h;
| int32_t var_8h_3;
| int32_t var_4c0h;
| int32_t var_ch_3;
| r0 = arg1;
| r1 = arg2;
0x0002f928 push {r4, r5, r6, r7, r8, sb, sl, fp, lr} |
0x0002f92c sub sp, sp, 0x4c0 |
0x0002f930 sub sp, sp, 0xc |
0x0002f934 add r3, r1, 0x80 | r3 = r1 + 0x80;
0x0002f938 mov ip, r1 |
0x0002f93c add lr, sp, 0x240 | lr += var_240h;
0x0002f940 str r0, [sp, 0x224] | var_224h = r0;
0x0002f944 strd sl, fp, [sp, 0x28] | __asm ("strd sl, fp, [var_0hx28]");
0x0002f948 str r3, [sp, 0x20] | var_20h = r3;
| do {
0x0002f94c ldrb r0, [ip, 1] | r0 = *((ip + 1));
0x0002f950 ldrb r2, [ip] | r2 = *(ip);
0x0002f954 ldrb r4, [ip, 7] | r4 = *((ip + 7));
0x0002f958 mov r6, 0 | r6 = 0;
0x0002f95c lsl r5, r0, 0x10 | r5 = r0 << 0x10;
0x0002f960 ldrb r0, [ip, 2] | r0 = *((ip + 2));
0x0002f964 lsl r7, r2, 0x18 | r7 = r2 << 0x18;
0x0002f968 orr r2, r6, r6 | r2 = r6 | r6;
0x0002f96c ldrb sb, [ip, 3] | sb = *((ip + 3));
0x0002f970 orr r3, r5, r7 | r3 = r5 | r7;
0x0002f974 orr sl, r2, r4 | sl = r2 | r4;
0x0002f978 mov r5, 0 | r5 = 0;
0x0002f97c ldrb r4, [ip, 4] | r4 = *((ip + 4));
0x0002f980 orr fp, r3, r5 |
0x0002f984 lsl r5, r0, 8 | r5 = r0 << 8;
0x0002f988 orr r2, sl, r6 | r2 = sl | r6;
0x0002f98c orr r3, fp, r5 | r3 = fp | r5;
0x0002f990 orr r5, r3, sb | r5 = r3 | sb;
0x0002f994 lsr r1, r4, 8 | r1 = r4 >> 8;
0x0002f998 mov sl, r4 | sl = r4;
0x0002f99c orr r4, r2, r6 | r4 = r2 | r6;
0x0002f9a0 strd r4, r5, [sp, 0x18] | __asm ("strd r4, r5, [var_18h]");
0x0002f9a4 ldrb r8, [ip, 5] | r8 = *((ip + 5));
0x0002f9a8 ldrd r2, r3, [sp, 0x18] | __asm ("ldrd r2, r3, [var_18h]");
0x0002f9ac ldrb r6, [ip, 6] | r6 = *((ip + 6));
0x0002f9b0 orr r3, r3, r1 | r3 |= r1;
0x0002f9b4 lsr r5, r8, 0x10 | r5 = r8 >> 0x10;
0x0002f9b8 lsr r1, r6, 0x18 | r1 = r6 >> 0x18;
0x0002f9bc orr sb, r3, r5 | sb = r3 | r5;
0x0002f9c0 lsl r0, sl, 0x18 | r0 = sl << 0x18;
0x0002f9c4 orr r3, sb, r1 | r3 = sb | r1;
0x0002f9c8 ldr r1, [sp, 0x20] | r1 = var_20h;
0x0002f9cc orr r2, r2, r0 | r2 |= r0;
0x0002f9d0 lsl r4, r8, 0x10 | r4 = r8 << 0x10;
0x0002f9d4 orr r8, r2, r4 | r8 = r2 | r4;
0x0002f9d8 lsl r0, r6, 8 | r0 = r6 << 8;
0x0002f9dc add ip, ip, 8 |
0x0002f9e0 orr r2, r8, r0 | r2 = r8 | r0;
0x0002f9e4 cmp r1, ip |
0x0002f9e8 strd r2, r3, [lr, 8]! | __asm ("strd r2, r3, [var_8h_2]!");
0x0002f9ec bne 0x2f94c |
| } while (r1 != ip);
0x0002f9f0 add r7, sp, 0x440 | r7 += var_440h;
0x0002f9f4 add r6, sp, 0x248 | r6 += var_248h;
0x0002f9f8 add r7, r7, 8 | r7 += var_8h_3;
0x0002f9fc str r6, [sp, 0x30] | var_30h = r6;
| do {
0x0002fa00 ldr r4, [r6, 0x74] | r4 = var_74h_2;
0x0002fa04 ldr r1, [r6, 0x70] | r1 = var_70h_2;
0x0002fa08 lsl r0, r4, 3 | r0 = r4 << 3;
0x0002fa0c orr r0, r0, r1, lsr 29 | r0 |= (r1 >> 29);
0x0002fa10 str r0, [sp, 0xc] | var_ch = r0;
0x0002fa14 lsl r0, r1, 3 | r0 = r1 << 3;
0x0002fa18 orr r0, r0, r4, lsr 29 | r0 |= (r4 >> 29);
0x0002fa1c str r0, [sp, 8] | var_8h = r0;
0x0002fa20 lsr r0, r4, 0x13 | r0 = r4 >> 0x13;
0x0002fa24 lsr r5, r1, 0x13 | r5 = r1 >> 0x13;
0x0002fa28 lsr r2, r1, 6 | r2 = r1 >> 6;
0x0002fa2c orr r1, r0, r1, lsl 13 | r1 = r0 | (r1 << 13);
0x0002fa30 str r1, [sp, 4] | var_4h = r1;
0x0002fa34 ldrd r0, r1, [r6, 0x48] | __asm ("ldrd r0, r1, [var_48h_2]");
0x0002fa38 ldr lr, [r6, 8] | lr = var_8h_4;
0x0002fa3c orr r5, r5, r4, lsl 13 | r5 |= (r4 << 13);
0x0002fa40 str r5, [sp] | *(sp) = r5;
0x0002fa44 orr r2, r2, r4, lsl 26 | r2 |= (r4 << 26);
0x0002fa48 lsr r3, r4, 6 | r3 = r4 >> 6;
0x0002fa4c strd r0, r1, [sp, 0x18] | __asm ("strd r0, r1, [var_18h]");
0x0002fa50 ldr ip, [r6, 0xc] | ip = var_ch_2;
0x0002fa54 ldrd r0, r1, [sp, 8] | __asm ("ldrd r0, r1, [var_ch]");
0x0002fa58 ldrd r4, r5, [sp] | __asm ("ldrd r4, r5, [sp]");
0x0002fa5c lsr r8, lr, 7 | r8 = lr >> 7;
0x0002fa60 eor r4, r4, r0 | r4 ^= r0;
0x0002fa64 eor r5, r5, r1 | r5 ^= r1;
0x0002fa68 eor r4, r4, r2 | r4 ^= r2;
0x0002fa6c eor r5, r5, r3 | r5 ^= r3;
0x0002fa70 ldrd r0, r1, [sp, 0x18] | __asm ("ldrd r0, r1, [var_18h]");
0x0002fa74 ldrd r2, r3, [r6] | __asm ("ldrd r2, r3, [r6]");
0x0002fa78 orr r8, r8, ip, lsl 25 | r8 |= (ip << 25);
0x0002fa7c adds r0, r0, r2 | r0 += r2;
0x0002fa80 adc r1, r1, r3 | __asm ("adc r1, r1, r3");
0x0002fa84 lsr r3, lr, 1 | r3 = lr >> 1;
0x0002fa88 orr r3, r3, ip, lsl 31 | r3 |= (ip << 31);
0x0002fa8c str r3, [sp, 0x10] | var_10h = r3;
0x0002fa90 lsr r3, lr, 8 | r3 = lr >> 8;
0x0002fa94 orr sl, r3, ip, lsl 24 | sl = r3 | (ip << 24);
0x0002fa98 lsr r3, ip, 1 | r3 = ip >> 1;
0x0002fa9c orr r3, r3, lr, lsl 31 | r3 |= (lr << 31);
0x0002faa0 adds r0, r0, r4 | r0 += r4;
0x0002faa4 str r3, [sp, 0x14] | var_14h = r3;
0x0002faa8 adc r1, r1, r5 | __asm ("adc r1, r1, r5");
0x0002faac ldrd r4, r5, [sp, 0x10] | __asm ("ldrd r4, r5, [var_10h]");
0x0002fab0 lsr sb, ip, 7 | sb = ip >> 7;
0x0002fab4 lsr ip, ip, 8 |
0x0002fab8 eor r4, r4, sl | r4 ^= sl;
0x0002fabc orr fp, ip, lr, lsl 24 |
0x0002fac0 eor r5, r5, fp | r5 ^= fp;
0x0002fac4 eor r2, r4, r8 | r2 = r4 ^ r8;
0x0002fac8 adds r4, r2, r0 | r4 = r2 + r0;
0x0002facc add r6, r6, 8 | r6 += var_8h_4;
0x0002fad0 eor r3, r5, sb | r3 = r5 ^ sb;
0x0002fad4 adc r5, r3, r1 | __asm ("adc r5, r3, r1");
0x0002fad8 cmp r7, r6 |
0x0002fadc strd r4, r5, [r6, 0x78] | __asm ("strd r4, r5, [var_78h_2]");
0x0002fae0 bne 0x2fa00 |
| } while (r7 != r6);
0x0002fae4 ldr r3, [sp, 0x224] | r3 = var_224h;
0x0002fae8 add r2, sp, 0x228 | r2 += var_228h;
0x0002faec ldrd r6, r7, [r3, 0x10] | __asm ("ldrd r6, r7, [r3, 0x10]");
0x0002faf0 ldr ip, [pc, 0x170] | ip = *(0x2fc64);
0x0002faf4 ldrd r0, r1, [r3, 0x18] | __asm ("ldrd r0, r1, [r3, 0x18]");
0x0002faf8 ldrd r8, sb, [r3, 0x20] | __asm ("ldrd r8, sb, [r3, 0x20]");
0x0002fafc strd r6, r7, [r2] | __asm ("strd r6, r7, [r2]");
0x0002fb00 ldrd sl, fp, [r3, 0x28] | __asm ("ldrd sl, fp, [r3, 0x28]");
0x0002fb04 add r2, sp, 0x230 | r2 += var_230h;
0x0002fb08 strd r0, r1, [r2] | __asm ("strd r0, r1, [r2]");
0x0002fb0c ldrd r4, r5, [r3, 0x30] | __asm ("ldrd r4, r5, [r3, 0x30]");
0x0002fb10 add r2, sp, 0x238 | r2 += var_238h;
0x0002fb14 strd r8, sb, [r2] | __asm ("strd r8, sb, [r2]");
0x0002fb18 add r2, sp, 0x240 | r2 += var_240h;
0x0002fb1c strd sl, fp, [r2] | __asm ("strd sl, fp, [r2]");
0x0002fb20 add r2, sp, 0x200 | r2 += var_200h;
0x0002fb24 strd r4, r5, [r2] | __asm ("strd r4, r5, [r2]");
0x0002fb28 ldrd r4, r5, [r3, 0x38] | __asm ("ldrd r4, r5, [r3, 0x38]");
0x0002fb2c add r2, sp, 0x208 | r2 += var_208h;
0x0002fb30 strd r4, r5, [r2] | __asm ("strd r4, r5, [r2]");
0x0002fb34 ldrd r4, r5, [r3, 0x40] | __asm ("ldrd r4, r5, [r3, 0x40]");
0x0002fb38 add r2, sp, 0x210 | r2 += var_210h;
0x0002fb3c strd r4, r5, [r2] | __asm ("strd r4, r5, [r2]");
0x0002fb40 ldrd r2, r3, [r3, 0x48] | __asm ("ldrd r2, r3, [r3, 0x48]");
0x0002fb44 add r5, pc, 0xdc | r5 = pc + 0xdc;
0x0002fb48 ldrd r4, r5, [r5] | __asm ("ldrd r4, r5, [r5]");
0x0002fb4c add lr, sp, 0x218 | lr += var_218h;
0x0002fb50 strd r2, r3, [lr] | __asm ("strd r2, r3, [lr]");
0x0002fb54 add r3, sp, 0x1f8 | r3 += var_1f8h;
0x0002fb58 strd r4, r5, [r3] | __asm ("strd r4, r5, [r3]");
0x0002fb5c add r5, pc, 0xcc | r5 = pc + 0xcc;
0x0002fb60 ldrd r4, r5, [r5] | __asm ("ldrd r4, r5, [r5]");
0x0002fb64 add r3, sp, 0x1f0 | r3 += var_1f0h;
0x0002fb68 strd r4, r5, [r3] | __asm ("strd r4, r5, [r3]");
0x0002fb6c add r5, pc, 0xc4 | r5 = pc + 0xc4;
0x0002fb70 ldrd r4, r5, [r5] | __asm ("ldrd r4, r5, [r5]");
0x0002fb74 add r3, sp, 0x1e8 | r3 += var_1e8h;
0x0002fb78 strd r4, r5, [r3] | __asm ("strd r4, r5, [r3]");
0x0002fb7c add r5, pc, 0xbc | r5 = pc + 0xbc;
0x0002fb80 ldrd r4, r5, [r5] | __asm ("ldrd r4, r5, [r5]");
0x0002fb84 add r3, sp, 0x1e0 | r3 += var_1e0h;
0x0002fb88 strd r4, r5, [r3] | __asm ("strd r4, r5, [r3]");
0x0002fb8c add r5, pc, 0xb4 | r5 = pc + 0xb4;
0x0002fb90 ldrd r4, r5, [r5] | __asm ("ldrd r4, r5, [r5]");
0x0002fb94 add r3, sp, 0x1d8 | r3 += var_1d8h;
0x0002fb98 strd r4, r5, [r3] | __asm ("strd r4, r5, [r3]");
0x0002fb9c add r5, pc, 0xac | r5 = pc + 0xac;
0x0002fba0 ldrd r4, r5, [r5] | __asm ("ldrd r4, r5, [r5]");
0x0002fba4 add r3, sp, 0x1d0 | r3 += var_1d0h;
0x0002fba8 strd r4, r5, [r3] | __asm ("strd r4, r5, [r3]");
0x0002fbac add r5, pc, 0xa4 | r5 = pc + 0xa4;
0x0002fbb0 ldrd r4, r5, [r5] | __asm ("ldrd r4, r5, [r5]");
0x0002fbb4 add r3, sp, 0x1c8 | r3 += var_1c8h;
0x0002fbb8 strd r4, r5, [r3] | __asm ("strd r4, r5, [r3]");
0x0002fbbc mov r2, r8 | r2 = r8;
0x0002fbc0 mov r3, sb | r3 = sb;
0x0002fbc4 strd r2, r3, [sp, 0x20] | __asm ("strd r2, r3, [var_20h]");
0x0002fbc8 add r3, sp, 0x200 | r3 += var_200h;
0x0002fbcc ldrd r2, r3, [r3] | __asm ("ldrd r2, r3, [r3]");
0x0002fbd0 add ip, pc, ip |
0x0002fbd4 strd r2, r3, [sp, 0x18] | __asm ("strd r2, r3, [var_18h]");
0x0002fbd8 add r3, sp, 0x208 | r3 += var_208h;
0x0002fbdc ldrd r2, r3, [r3] | __asm ("ldrd r2, r3, [r3]");
0x0002fbe0 mov r8, sl | r8 = sl;
0x0002fbe4 strd r2, r3, [sp, 8] | __asm ("strd r2, r3, [var_ch]");
0x0002fbe8 add r3, sp, 0x210 | r3 += var_210h;
0x0002fbec mov sb, fp | sb = fp;
0x0002fbf0 str ip, [sp, 0x1c4] | var_1c4h = ip;
0x0002fbf4 strd r0, r1, [sp, 0x28] | __asm ("strd r0, r1, [var_28h]");
0x0002fbf8 ldrd sl, fp, [r3] | __asm ("ldrd sl, fp, [r3]");
0x0002fbfc ldrd r2, r3, [lr] | __asm ("ldrd r2, r3, [lr]");
0x0002fc00 ldr lr, [sp, 0x30] | lr = var_30h;
0x0002fc04 strd r2, r3, [sp, 0x38] | __asm ("strd r2, r3, [var_38h]");
0x0002fc08 add r3, ip, 0x240 | r3 = ip + 0x240;
0x0002fc0c add r5, pc, 0x4c | r5 = pc + 0x4c;
0x0002fc10 ldrd r4, r5, [r5] | __asm ("ldrd r4, r5, [r5]");
0x0002fc14 str r3, [sp, 0x220] | var_220h = r3;
0x0002fc18 strd r6, r7, [sp, 0x10] | __asm ("strd r6, r7, [var_10h]");
0x0002fc1c strd r8, sb, [sp] | __asm ("strd r8, sb, [sp]");
0x0002fc20 b 0x2fccc |
| while (r2 != r3) {
0x0002fc6c ldrd r0, r1, [r3, 0x48] | __asm ("ldrd r0, r1, [r3, 0x48]");
0x0002fc70 add r2, sp, 0x1c8 | r2 += var_1c8h;
0x0002fc74 strd r0, r1, [r2] | __asm ("strd r0, r1, [r2]");
0x0002fc78 ldrd r0, r1, [r3, 0x50] | __asm ("ldrd r0, r1, [r3, 0x50]");
0x0002fc7c add r2, sp, 0x1d0 | r2 += var_1d0h;
0x0002fc80 strd r0, r1, [r2] | __asm ("strd r0, r1, [r2]");
0x0002fc84 ldrd r0, r1, [r3, 0x58] | __asm ("ldrd r0, r1, [r3, 0x58]");
0x0002fc88 add r2, sp, 0x1d8 | r2 += var_1d8h;
0x0002fc8c strd r0, r1, [r2] | __asm ("strd r0, r1, [r2]");
0x0002fc90 ldrd r0, r1, [r3, 0x60] | __asm ("ldrd r0, r1, [r3, 0x60]");
0x0002fc94 add r2, sp, 0x1e0 | r2 += var_1e0h;
0x0002fc98 strd r0, r1, [r2] | __asm ("strd r0, r1, [r2]");
0x0002fc9c ldrd r0, r1, [r3, 0x68] | __asm ("ldrd r0, r1, [r3, 0x68]");
0x0002fca0 add r2, sp, 0x1e8 | r2 += var_1e8h;
0x0002fca4 strd r0, r1, [r2] | __asm ("strd r0, r1, [r2]");
0x0002fca8 ldrd r0, r1, [r3, 0x70] | __asm ("ldrd r0, r1, [r3, 0x70]");
0x0002fcac add r2, sp, 0x1f0 | r2 += var_1f0h;
0x0002fcb0 strd r0, r1, [r2] | __asm ("strd r0, r1, [r2]");
0x0002fcb4 ldrd r0, r1, [r3, 0x78] | __asm ("ldrd r0, r1, [r3, 0x78]");
0x0002fcb8 ldrd r4, r5, [r3, 0x40] | __asm ("ldrd r4, r5, [r3, 0x40]");
0x0002fcbc add r2, sp, 0x1f8 | r2 += var_1f8h;
0x0002fcc0 add r3, r3, 0x40 | r3 += 0x40;
0x0002fcc4 strd r0, r1, [r2] | __asm ("strd r0, r1, [r2]");
0x0002fcc8 str r3, [sp, 0x1c4] | var_1c4h = r3;
0x0002fccc ldrd r6, r7, [sp, 0x18] | __asm ("ldrd r6, r7, [var_18h]");
0x0002fcd0 add lr, lr, 0x40 | lr += 0x40;
0x0002fcd4 lsr r2, r6, 0xe | r2 = r6 >> 0xe;
0x0002fcd8 orr r2, r2, r7, lsl 18 | r2 |= (r7 << 18);
0x0002fcdc lsr r3, r6, 0x12 | r3 = r6 >> 0x12;
0x0002fce0 str r2, [sp, 0x40] | var_40h = r2;
0x0002fce4 orr r3, r3, r7, lsl 14 | r3 |= (r7 << 14);
0x0002fce8 lsr r1, r7, 0xe | r1 = r7 >> 0xe;
0x0002fcec lsr r2, r7, 0x12 | r2 = r7 >> 0x12;
0x0002fcf0 str r3, [sp, 0x48] | var_48h = r3;
0x0002fcf4 orr r1, r1, r6, lsl 18 | r1 |= (r6 << 18);
0x0002fcf8 orr r2, r2, r6, lsl 14 | r2 |= (r6 << 14);
0x0002fcfc lsl r3, r7, 0x17 | r3 = r7 << 0x17;
0x0002fd00 str r1, [sp, 0x44] | var_44h = r1;
0x0002fd04 str r2, [sp, 0x4c] | var_4ch = r2;
0x0002fd08 orr r3, r3, r6, lsr 9 | r3 |= (r6 >> 9);
0x0002fd0c ldrd r8, sb, [sp, 0x48] | __asm ("ldrd r8, sb, [var_48h]");
0x0002fd10 str r3, [sp, 0x54] | var_54h = r3;
0x0002fd14 ldrd r0, r1, [sp, 8] | __asm ("ldrd r0, r1, [var_ch]");
0x0002fd18 ldrd r2, r3, [sp, 0x40] | __asm ("ldrd r2, r3, [var_40h]");
0x0002fd1c lsl ip, r6, 0x17 |
0x0002fd20 orr ip, ip, r7, lsr 9 |
0x0002fd24 eor r0, r0, sl | r0 ^= sl;
0x0002fd28 eor r1, r1, fp | r1 ^= fp;
0x0002fd2c eor r2, r2, r8 | r2 ^= r8;
0x0002fd30 eor r3, r3, sb | r3 ^= sb;
0x0002fd34 str ip, [sp, 0x50] | var_50h = ip;
0x0002fd38 mov sb, r7 | sb = r7;
0x0002fd3c mov r8, r6 | r8 = r6;
0x0002fd40 and r8, r8, r0 | r8 &= r0;
0x0002fd44 and sb, sb, r1 | sb &= r1;
0x0002fd48 ldrd r0, r1, [sp, 0x50] | __asm ("ldrd r0, r1, [var_54h]");
0x0002fd4c eor r0, r0, r2 | r0 ^= r2;
0x0002fd50 eor r1, r1, r3 | r1 ^= r3;
0x0002fd54 mov r6, r0 | r6 = r0;
0x0002fd58 eor r0, r8, sl | r0 = r8 ^ sl;
0x0002fd5c adds r2, r6, r0 | r2 = r6 + r0;
0x0002fd60 mov r7, r1 | r7 = r1;
0x0002fd64 eor r1, sb, fp | r1 = sb ^ fp;
0x0002fd68 adc r3, r7, r1 | __asm ("adc r3, r7, r1");
0x0002fd6c ldrd r0, r1, [lr, -0x40] | __asm ("ldrd r0, r1, [lr, -0x40]");
0x0002fd70 ldrd r8, sb, [sp, 0x10] | __asm ("ldrd r8, sb, [var_10h]");
0x0002fd74 adds r0, r0, r2 | r0 += r2;
0x0002fd78 adc r1, r1, r3 | __asm ("adc r1, r1, r3");
0x0002fd7c mov r2, r0 | r2 = r0;
0x0002fd80 mov r3, r1 | r3 = r1;
0x0002fd84 ldrd r0, r1, [sp, 0x38] | __asm ("ldrd r0, r1, [var_38h]");
0x0002fd88 adds r0, r0, r2 | r0 += r2;
0x0002fd8c adc r1, r1, r3 | __asm ("adc r1, r1, r3");
0x0002fd90 ldrd r2, r3, [sp] | __asm ("ldrd r2, r3, [sp]");
0x0002fd94 adds r6, r0, r4 | r6 = r0 + r4;
0x0002fd98 adc r7, r1, r5 | __asm ("adc r7, r1, r5");
0x0002fd9c adds r2, r2, r6 | r2 += r6;
0x0002fda0 adc r3, r3, r7 | __asm ("adc r3, r3, r7");
0x0002fda4 ldrd r4, r5, [lr, -0x38] | __asm ("ldrd r4, r5, [lr, -0x38]");
0x0002fda8 strd r6, r7, [sp, 0x30] | __asm ("strd r6, r7, [var_30h]");
0x0002fdac lsr r0, r2, 0xe | r0 = r2 >> 0xe;
0x0002fdb0 mov r7, r3 | r7 = r3;
0x0002fdb4 lsr r1, r8, 0x1c | r1 = r8 >> 0x1c;
0x0002fdb8 orr ip, r0, r7, lsl 18 |
0x0002fdbc orr r1, r1, sb, lsl 4 | r1 |= (sb << 4);
0x0002fdc0 lsr r0, r7, 0xe | r0 = r7 >> 0xe;
0x0002fdc4 mov r6, r2 | r6 = r2;
0x0002fdc8 str r0, [sp, 0x10] | var_10h = r0;
0x0002fdcc str ip, [sp, 0x70] | var_70h = ip;
0x0002fdd0 str r1, [sp, 0x58] | var_58h = r1;
0x0002fdd4 lsr ip, r7, 0x12 |
0x0002fdd8 lsl r1, r8, 0x1e | r1 = r8 << 0x1e;
0x0002fddc lsr r2, r2, 0x12 | r2 >>= 0x12;
0x0002fde0 orr r2, r2, r7, lsl 14 | r2 |= (r7 << 14);
0x0002fde4 lsr r0, sb, 0x1c | r0 = sb >> 0x1c;
0x0002fde8 strd r4, r5, [sp] | __asm ("strd r4, r5, [sp]");
0x0002fdec ldr r4, [sp, 0x10] | r4 = var_10h;
0x0002fdf0 orr ip, ip, r6, lsl 14 |
0x0002fdf4 orr r1, r1, sb, lsr 2 | r1 |= (sb >> 2);
0x0002fdf8 lsl r3, sb, 0x1e | r3 = sb << 0x1e;
0x0002fdfc orr r3, r3, r8, lsr 2 | r3 |= (r8 >> 2);
0x0002fe00 str r2, [sp, 0x78] | var_78h = r2;
0x0002fe04 str ip, [sp, 0x7c] | var_7ch = ip;
0x0002fe08 lsl r2, r7, 0x17 | r2 = r7 << 0x17;
0x0002fe0c orr ip, r0, r8, lsl 4 |
0x0002fe10 str r1, [sp, 0x60] | var_60h = r1;
0x0002fe14 ldrd r0, r1, [sp, 0x28] | __asm ("ldrd r0, r1, [var_28h]");
0x0002fe18 orr r2, r2, r6, lsr 9 | r2 |= (r6 >> 9);
0x0002fe1c str r3, [sp, 0x64] | var_64h = r3;
0x0002fe20 lsl r3, sb, 0x19 | r3 = sb << 0x19;
0x0002fe24 orr r5, r4, r6, lsl 18 | r5 = r4 | (r6 << 18);
0x0002fe28 orr r3, r3, r8, lsr 7 | r3 |= (r8 >> 7);
0x0002fe2c str r2, [sp, 0x84] | var_84h = r2;
0x0002fe30 lsl r2, r6, 0x17 | r2 = r6 << 0x17;
0x0002fe34 mov r4, r8 | r4 = r8;
0x0002fe38 str r5, [sp, 0x74] | var_74h = r5;
0x0002fe3c str ip, [sp, 0x5c] | var_5ch = ip;
0x0002fe40 mov r5, sb | r5 = sb;
0x0002fe44 lsl ip, r8, 0x19 |
0x0002fe48 str r3, [sp, 0x6c] | var_6ch = r3;
0x0002fe4c orr r8, r8, r0 | r8 |= r0;
0x0002fe50 orr r3, r2, r7, lsr 9 | r3 = r2 | (r7 >> 9);
0x0002fe54 orr sb, sb, r1 | sb |= r1;
0x0002fe58 mov r0, r8 | r0 = r8;
0x0002fe5c mov r1, sb | r1 = sb;
0x0002fe60 strd r4, r5, [sp, 0x10] | __asm ("strd r4, r5, [var_10h]");
0x0002fe64 str r3, [sp, 0x80] | var_80h = r3;
0x0002fe68 ldrd r2, r3, [sp, 0x60] | __asm ("ldrd r2, r3, [var_60h]");
0x0002fe6c ldrd r8, sb, [sp, 0x10] | __asm ("ldrd r8, sb, [var_10h]");
0x0002fe70 ldrd r4, r5, [sp, 0x58] | __asm ("ldrd r4, r5, [var_58h]");
0x0002fe74 eor r5, r5, r3 | r5 ^= r3;
0x0002fe78 orr r3, ip, sb, lsr 7 | r3 = ip | (sb >> 7);
0x0002fe7c eor r4, r4, r2 | r4 ^= r2;
0x0002fe80 str r3, [sp, 0x68] | var_68h = r3;
0x0002fe84 ldrd r2, r3, [sp, 0x20] | __asm ("ldrd r2, r3, [var_20h]");
0x0002fe88 and r2, r2, r0 | r2 &= r0;
0x0002fe8c and r3, r3, r1 | r3 &= r1;
0x0002fe90 mov r0, r2 | r0 = r2;
0x0002fe94 mov r1, r3 | r1 = r3;
0x0002fe98 ldrd r2, r3, [sp, 0x28] | __asm ("ldrd r2, r3, [var_28h]");
0x0002fe9c and r8, r8, r2 | r8 &= r2;
0x0002fea0 and sb, sb, r3 | sb &= r3;
0x0002fea4 mov r2, r8 | r2 = r8;
0x0002fea8 mov r3, sb | r3 = sb;
0x0002feac ldrd r8, sb, [sp] | __asm ("ldrd r8, sb, [sp]");
0x0002feb0 adds r8, r8, sl | r8 += sl;
0x0002feb4 adc sb, sb, fp | __asm ("adc sb, sb, fp");
0x0002feb8 strd r8, sb, [sp, 0x38] | __asm ("strd r8, sb, [var_38h]");
0x0002febc ldrd sl, fp, [sp, 0x18] | __asm ("ldrd sl, fp, [var_18h]");
0x0002fec0 ldrd r8, sb, [sp, 8] | __asm ("ldrd r8, sb, [var_ch]");
0x0002fec4 eor sl, sl, r8 | sl ^= r8;
0x0002fec8 eor fp, fp, sb |
0x0002fecc mov r8, r6 | r8 = r6;
0x0002fed0 mov sb, r7 | sb = r7;
0x0002fed4 and r8, r8, sl | r8 &= sl;
0x0002fed8 and sb, sb, fp | sb &= fp;
0x0002fedc mov sl, r8 | sl = r8;
0x0002fee0 mov fp, sb |
0x0002fee4 ldrd r8, sb, [sp, 8] | __asm ("ldrd r8, sb, [var_ch]");
0x0002fee8 eor r8, r8, sl | r8 ^= sl;
0x0002feec eor sb, sb, fp | sb ^= fp;
0x0002fef0 mov sl, r8 | sl = r8;
0x0002fef4 mov fp, sb |
0x0002fef8 ldrd r8, sb, [sp, 0x68] | __asm ("ldrd r8, sb, [var_6ch]");
0x0002fefc eor r8, r8, r4 | r8 ^= r4;
0x0002ff00 eor sb, sb, r5 | sb ^= r5;
0x0002ff04 mov r4, r8 | r4 = r8;
0x0002ff08 mov r5, sb | r5 = sb;
0x0002ff0c orr r8, r2, r0 | r8 = r2 | r0;
0x0002ff10 orr sb, r3, r1 | sb = r3 | r1;
0x0002ff14 ldrd r2, r3, [sp, 0x38] | __asm ("ldrd r2, r3, [var_38h]");
0x0002ff18 ldrd r0, r1, [sp, 0x70] | __asm ("ldrd r0, r1, [var_70h]");
0x0002ff1c adds r2, r2, sl | r2 += sl;
0x0002ff20 adc r3, r3, fp | __asm ("adc r3, r3, fp");
0x0002ff24 ldrd sl, fp, [sp, 0x78] | __asm ("ldrd sl, fp, [var_78h]");
0x0002ff28 strd r8, sb, [sp] | __asm ("strd r8, sb, [sp]");
0x0002ff2c strd r2, r3, [sp, 0x38] | __asm ("strd r2, r3, [var_38h]");
0x0002ff30 ldrd r2, r3, [sp] | __asm ("ldrd r2, r3, [sp]");
0x0002ff34 eor r0, r0, sl | r0 ^= sl;
0x0002ff38 eor r1, r1, fp | r1 ^= fp;
0x0002ff3c mov r8, r0 | r8 = r0;
0x0002ff40 mov sb, r1 | sb = r1;
0x0002ff44 ldrd r0, r1, [sp, 0x80] | __asm ("ldrd r0, r1, [var_84h]");
0x0002ff48 adds r2, r2, r4 | r2 += r4;
0x0002ff4c ldrd sl, fp, [sp, 0x38] | __asm ("ldrd sl, fp, [var_38h]");
0x0002ff50 adc r3, r3, r5 | __asm ("adc r3, r3, r5");
0x0002ff54 ldrd r4, r5, [sp, 0x30] | __asm ("ldrd r4, r5, [var_30h]");
0x0002ff58 eor r0, r0, r8 | r0 ^= r8;
0x0002ff5c adds sl, sl, r0 | sl += r0;
0x0002ff60 eor r1, r1, sb | r1 ^= sb;
0x0002ff64 adc fp, fp, r1 | __asm ("adc fp, fp, r1");
0x0002ff68 adds r4, r4, r2 | r4 += r2;
0x0002ff6c adc r5, r5, r3 | __asm ("adc r5, r5, r3");
0x0002ff70 add r3, sp, 0x1c8 | r3 += var_1c8h;
0x0002ff74 ldrd r0, r1, [r3] | __asm ("ldrd r0, r1, [r3]");
0x0002ff78 ldrd r8, sb, [sp, 0x20] | __asm ("ldrd r8, sb, [var_20h]");
0x0002ff7c adds r0, r0, sl | r0 += sl;
0x0002ff80 adc r1, r1, fp | __asm ("adc r1, r1, fp");
0x0002ff84 lsr r2, r4, 0x1c | r2 = r4 >> 0x1c;
0x0002ff88 adds sl, r0, r8 | sl = r0 + r8;
0x0002ff8c adc fp, r1, sb | __asm ("adc fp, r1, sb");
0x0002ff90 strd r0, r1, [sp, 0x38] | __asm ("strd r0, r1, [var_38h]");
0x0002ff94 orr r1, r2, r5, lsl 4 | r1 = r2 | (r5 << 4);
0x0002ff98 lsl r3, r5, 0x1e | r3 = r5 << 0x1e;
0x0002ff9c str r1, [sp, 0x88] | var_88h = r1;
0x0002ffa0 lsl r1, r5, 0x19 | r1 = r5 << 0x19;
0x0002ffa4 mov sb, fp | sb = fp;
0x0002ffa8 orr r3, r3, r4, lsr 2 | r3 |= (r4 >> 2);
0x0002ffac lsr r2, sl, 0xe | r2 = sl >> 0xe;
0x0002ffb0 orr r1, r1, r4, lsr 7 | r1 |= (r4 >> 7);
0x0002ffb4 lsr ip, r5, 0x1c |
0x0002ffb8 mov r8, sl | r8 = sl;
0x0002ffbc lsl r0, r4, 0x1e | r0 = r4 << 0x1e;
0x0002ffc0 orr ip, ip, r4, lsl 4 |
0x0002ffc4 str r3, [sp, 0x94] | var_94h = r3;
0x0002ffc8 str r1, [sp, 0x9c] | var_9ch = r1;
0x0002ffcc lsr r3, sl, 0x12 | r3 = sl >> 0x12;
0x0002ffd0 orr r1, r2, sb, lsl 18 | r1 = r2 | (sb << 18);
0x0002ffd4 orr r3, r3, sb, lsl 14 | r3 |= (sb << 14);
0x0002ffd8 lsr r2, sb, 0x12 | r2 = sb >> 0x12;
0x0002ffdc strd r8, sb, [sp, 0x20] | __asm ("strd r8, sb, [var_20h]");
0x0002ffe0 str ip, [sp, 0x8c] | var_8ch = ip;
0x0002ffe4 mov r8, r4 | r8 = r4;
0x0002ffe8 orr ip, r0, r5, lsr 2 |
0x0002ffec str r1, [sp, 0xa0] | var_a0h = r1;
0x0002fff0 lsl r0, r4, 0x19 | r0 = r4 << 0x19;
0x0002fff4 lsr r1, sb, 0xe | r1 = sb >> 0xe;
0x0002fff8 mov sb, r5 | sb = r5;
0x0002fffc str ip, [sp, 0x90] | var_90h = ip;
0x00030000 str r3, [sp, 0xa8] | var_a8h = r3;
0x00030004 orr ip, r0, sb, lsr 7 |
0x00030008 ldr r3, [sp, 0x24] | r3 = var_24h;
0x0003000c ldrd sl, fp, [sp, 0x10] | __asm ("ldrd sl, fp, [var_10h]");
0x00030010 strd r8, sb, [sp] | __asm ("strd r8, sb, [sp]");
0x00030014 ldrd r8, sb, [sp, 0x20] | __asm ("ldrd r8, sb, [var_20h]");
0x00030018 orr sl, sl, r4 | sl |= r4;
0x0003001c orr r1, r1, r8, lsl 18 | r1 |= (r8 << 18);
0x00030020 orr fp, fp, r5 |
0x00030024 mov r4, sl | r4 = sl;
0x00030028 mov r5, fp | r5 = fp;
0x0003002c str r1, [sp, 0xa4] | var_a4h = r1;
0x00030030 ldrd sl, fp, [sp, 0x90] | __asm ("ldrd sl, fp, [var_94h]");
0x00030034 ldrd r0, r1, [sp, 0x88] | __asm ("ldrd r0, r1, [var_88h]");
0x00030038 lsl r3, r3, 0x17 | r3 <<= 0x17;
0x0003003c orr r3, r3, r8, lsr 9 | r3 |= (r8 >> 9);
0x00030040 eor r0, r0, sl | r0 ^= sl;
0x00030044 eor r1, r1, fp | r1 ^= fp;
0x00030048 str ip, [sp, 0x98] | var_98h = ip;
0x0003004c str r3, [sp, 0xb4] | var_b4h = r3;
0x00030050 orr ip, r2, r8, lsl 14 |
0x00030054 mov sb, r1 | sb = r1;
0x00030058 lsl r3, r8, 0x17 | r3 = r8 << 0x17;
0x0003005c mov r8, r0 | r8 = r0;
0x00030060 ldrd r0, r1, [sp, 0x28] | __asm ("ldrd r0, r1, [var_28h]");
0x00030064 strd r6, r7, [sp, 0x30] | __asm ("strd r6, r7, [var_30h]");
0x00030068 and r0, r0, r4 | r0 &= r4;
0x0003006c and r1, r1, r5 | r1 &= r5;
0x00030070 mov r4, r0 | r4 = r0;
0x00030074 mov r5, r1 | r5 = r1;
0x00030078 ldrd r0, r1, [sp, 0x18] | __asm ("ldrd r0, r1, [var_18h]");
0x0003007c str ip, [sp, 0xac] | var_ach = ip;
0x00030080 eor r0, r0, r6 | r0 ^= r6;
0x00030084 eor r1, r1, r7 | r1 ^= r7;
0x00030088 ldrd r6, r7, [sp, 0x20] | __asm ("ldrd r6, r7, [var_20h]");
0x0003008c add ip, sp, 0x1d0 |
0x00030090 mov sl, r6 | sl = r6;
0x00030094 mov fp, r7 |
0x00030098 orr r3, r3, r7, lsr 9 | r3 |= (r7 >> 9);
0x0003009c and sl, sl, r0 | sl &= r0;
0x000300a0 and fp, fp, r1 |
0x000300a4 mov r0, sl | r0 = sl;
0x000300a8 mov r1, fp | r1 = fp;
0x000300ac str r3, [sp, 0xb0] | var_b0h = r3;
0x000300b0 ldrd sl, fp, [sp, 0x10] | __asm ("ldrd sl, fp, [var_10h]");
0x000300b4 ldrd r2, r3, [sp] | __asm ("ldrd r2, r3, [sp]");
0x000300b8 ldrd r6, r7, [sp, 0xa8] | __asm ("ldrd r6, r7, [var_a8h]");
0x000300bc and sl, sl, r2 | sl &= r2;
0x000300c0 and fp, fp, r3 |
0x000300c4 mov r2, sl | r2 = sl;
0x000300c8 mov r3, fp | r3 = fp;
0x000300cc orr r2, r2, r4 | r2 |= r4;
0x000300d0 ldrd sl, fp, [sp, 0x98] | __asm ("ldrd sl, fp, [var_9ch]");
0x000300d4 orr r3, r3, r5 | r3 |= r5;
0x000300d8 ldrd r4, r5, [sp, 0x18] | __asm ("ldrd r4, r5, [var_18h]");
0x000300dc eor sl, sl, r8 | sl ^= r8;
0x000300e0 eor r4, r4, r0 | r4 ^= r0;
0x000300e4 eor r5, r5, r1 | r5 ^= r1;
0x000300e8 eor fp, fp, sb |
0x000300ec ldrd r0, r1, [lr, -0x30] | __asm ("ldrd r0, r1, [lr, -0x30]");
0x000300f0 ldrd r8, sb, [sp, 8] | __asm ("ldrd r8, sb, [var_ch]");
0x000300f4 adds r0, r0, r8 | r0 += r8;
0x000300f8 adc r1, r1, sb | __asm ("adc r1, r1, sb");
0x000300fc adds sl, sl, r2 | sl += r2;
0x00030100 ldrd r8, sb, [sp, 0xa0] | __asm ("ldrd r8, sb, [var_a0h]");
0x00030104 adc fp, fp, r3 | __asm ("adc fp, fp, r3");
0x00030108 mov r2, sl | r2 = sl;
0x0003010c mov r3, fp | r3 = fp;
0x00030110 ldrd sl, fp, [sp, 0xb0] | __asm ("ldrd sl, fp, [var_b4h]");
0x00030114 eor r8, r8, r6 | r8 ^= r6;
0x00030118 eor sb, sb, r7 | sb ^= r7;
0x0003011c eor sl, sl, r8 | sl ^= r8;
0x00030120 ldrd r6, r7, [sp, 0x38] | __asm ("ldrd r6, r7, [var_38h]");
0x00030124 mov r8, sl | r8 = sl;
0x00030128 eor fp, fp, sb |
0x0003012c adds sl, r0, r4 | sl = r0 + r4;
0x00030130 mov sb, fp | sb = fp;
0x00030134 adc fp, r1, r5 | __asm ("adc fp, r1, r5");
0x00030138 ldrd r4, r5, [ip] | __asm ("ldrd r4, r5, [ip]");
0x0003013c adds r6, r6, r2 | r6 += r2;
0x00030140 adc r7, r7, r3 | __asm ("adc r7, r7, r3");
0x00030144 adds r0, sl, r8 | r0 = sl + r8;
0x00030148 adc r1, fp, sb | __asm ("adc r1, fp, sb");
0x0003014c lsr r2, r6, 0x1c | r2 = r6 >> 0x1c;
0x00030150 adds r4, r4, r0 | r4 += r0;
0x00030154 adc r5, r5, r1 | __asm ("adc r5, r5, r1");
0x00030158 lsl r3, r7, 0x1e | r3 = r7 << 0x1e;
0x0003015c orr r1, r2, r7, lsl 4 | r1 = r2 | (r7 << 4);
0x00030160 orr r3, r3, r6, lsr 2 | r3 |= (r6 >> 2);
0x00030164 str r1, [sp, 0xb8] | var_b8h = r1;
0x00030168 lsr r1, r7, 0x1c | r1 = r7 >> 0x1c;
0x0003016c lsl r2, r6, 0x1e | r2 = r6 << 0x1e;
0x00030170 orr r1, r1, r6, lsl 4 | r1 |= (r6 << 4);
0x00030174 str r3, [sp, 0xc4] | var_c4h = r3;
0x00030178 lsl r3, r7, 0x19 | r3 = r7 << 0x19;
0x0003017c ldrd sl, fp, [sp, 0x28] | __asm ("ldrd sl, fp, [var_28h]");
0x00030180 orr r3, r3, r6, lsr 7 | r3 |= (r6 >> 7);
0x00030184 str r1, [sp, 0xbc] | var_bch = r1;
0x00030188 orr r1, r2, r7, lsr 2 | r1 = r2 | (r7 >> 2);
0x0003018c strd r4, r5, [sp, 0x38] | __asm ("strd r4, r5, [var_38h]");
0x00030190 str r1, [sp, 0xc0] | var_c0h = r1;
0x00030194 str r3, [sp, 0xcc] | var_cch = r3;
0x00030198 ldrd r2, r3, [sp] | __asm ("ldrd r2, r3, [sp]");
0x0003019c adds sl, sl, r4 | sl += r4;
0x000301a0 adc fp, fp, r5 | __asm ("adc fp, fp, r5");
0x000301a4 mov r4, r6 | r4 = r6;
0x000301a8 mov r5, r7 | r5 = r7;
0x000301ac lsl ip, r6, 0x19 |
0x000301b0 orr r7, r7, r3 | r7 |= r3;
0x000301b4 orr r6, r6, r2 | r6 |= r2;
0x000301b8 mov r8, r6 | r8 = r6;
0x000301bc mov sb, r7 | sb = r7;
0x000301c0 strd r8, sb, [sp] | __asm ("strd r8, sb, [sp]");
0x000301c4 ldrd r6, r7, [sp, 0xc0] | __asm ("ldrd r6, r7, [var_c4h]");
0x000301c8 ldrd r8, sb, [sp, 0xb8] | __asm ("ldrd r8, sb, [var_b8h]");
0x000301cc strd r4, r5, [sp, 8] | __asm ("strd r4, r5, [var_ch]");
0x000301d0 eor r8, r8, r6 | r8 ^= r6;
0x000301d4 eor sb, sb, r7 | sb ^= r7;
0x000301d8 orr ip, ip, r5, lsr 7 |
0x000301dc ldrd r6, r7, [sp, 0x10] | __asm ("ldrd r6, r7, [var_10h]");
0x000301e0 mov r4, r8 | r4 = r8;
0x000301e4 mov r5, sb | r5 = sb;
0x000301e8 ldrd r8, sb, [sp] | __asm ("ldrd r8, sb, [sp]");
0x000301ec str ip, [sp, 0xc8] | var_c8h = ip;
0x000301f0 and r8, r8, r6 | r8 &= r6;
0x000301f4 and sb, sb, r7 | sb &= r7;
0x000301f8 strd r8, sb, [sp, 0x28] | __asm ("strd r8, sb, [var_28h]");
0x000301fc ldrd r8, sb, [sp, 8] | __asm ("ldrd r8, sb, [var_ch]");
0x00030200 strd r2, r3, [sp] | __asm ("strd r2, r3, [sp]");
0x00030204 and r8, r8, r2 | r8 &= r2;
0x00030208 and sb, sb, r3 | sb &= r3;
0x0003020c mov r2, r8 | r2 = r8;
0x00030210 mov r3, sb | r3 = sb;
0x00030214 ldrd r8, sb, [sp, 0xc8] | __asm ("ldrd r8, sb, [var_cch]");
0x00030218 lsr r1, sl, 0x12 | r1 = sl >> 0x12;
0x0003021c lsr r0, sl, 0xe | r0 = sl >> 0xe;
0x00030220 orr r1, r1, fp, lsl 14 | r1 |= (fp << 14);
0x00030224 eor r8, r8, r4 | r8 ^= r4;
0x00030228 eor sb, sb, r5 | sb ^= r5;
0x0003022c orr ip, r0, fp, lsl 18 |
0x00030230 str r1, [sp, 0xd8] | var_d8h = r1;
0x00030234 lsr r0, fp, 0xe | r0 = fp >> 0xe;
0x00030238 mov r4, r8 | r4 = r8;
0x0003023c mov r5, sb | r5 = sb;
0x00030240 lsr r1, fp, 0x12 | r1 = fp >> 0x12;
0x00030244 ldrd r8, sb, [sp, 0x28] | __asm ("ldrd r8, sb, [var_28h]");
0x00030248 orr r7, r0, sl, lsl 18 | r7 = r0 | (sl << 18);
0x0003024c str ip, [sp, 0xd0] | var_d0h = ip;
0x00030250 orr r1, r1, sl, lsl 14 | r1 |= (sl << 14);
0x00030254 lsl ip, fp, 0x17 |
0x00030258 str r7, [sp, 0xd4] | var_d4h = r7;
0x0003025c str r1, [sp, 0xdc] | var_dch = r1;
0x00030260 ldrd r6, r7, [sp, 0x30] | __asm ("ldrd r6, r7, [var_30h]");
0x00030264 ldrd r0, r1, [sp, 0x20] | __asm ("ldrd r0, r1, [var_20h]");
0x00030268 orr ip, ip, sl, lsr 9 |
0x0003026c str ip, [sp, 0xe4] | var_e4h = ip;
0x00030270 orr r8, r8, r2 | r8 |= r2;
0x00030274 lsl ip, sl, 0x17 |
0x00030278 orr sb, sb, r3 | sb |= r3;
0x0003027c strd r8, sb, [sp, 0x30] | __asm ("strd r8, sb, [var_30h]");
0x00030280 orr r3, ip, fp, lsr 9 | r3 = ip | (fp >> 9);
0x00030284 eor r0, r0, r6 | r0 ^= r6;
0x00030288 eor r1, r1, r7 | r1 ^= r7;
0x0003028c str r3, [sp, 0xe0] | var_e0h = r3;
0x00030290 mov r8, sl | r8 = sl;
0x00030294 ldrd r2, r3, [sp, 0x30] | __asm ("ldrd r2, r3, [var_30h]");
0x00030298 mov sb, fp | sb = fp;
0x0003029c and r8, r8, r0 | r8 &= r0;
0x000302a0 and sb, sb, r1 | sb &= r1;
0x000302a4 mov r0, r8 | r0 = r8;
0x000302a8 mov r1, sb | r1 = sb;
0x000302ac strd sl, fp, [sp, 0x28] | __asm ("strd sl, fp, [var_0hx28]");
0x000302b0 ldrd r8, sb, [sp, 0xd0] | __asm ("ldrd r8, sb, [var_d0h]");
0x000302b4 ldrd sl, fp, [sp, 0xd8] | __asm ("ldrd sl, fp, [var_d8h]");
0x000302b8 adds r2, r2, r4 | r2 += r4;
0x000302bc adc r3, r3, r5 | __asm ("adc r3, r3, r5");
0x000302c0 mov r4, r6 | r4 = r6;
0x000302c4 mov r5, r7 | r5 = r7;
0x000302c8 eor r8, r8, sl | r8 ^= sl;
0x000302cc eor sb, sb, fp | sb ^= fp;
0x000302d0 mov sl, r6 | sl = r6;
0x000302d4 mov fp, r7 |
0x000302d8 eor r4, r4, r0 | r4 ^= r0;
0x000302dc ldrd r6, r7, [lr, -0x28] | __asm ("ldrd r6, r7, [lr, -0x28]");
0x000302e0 eor r5, r5, r1 | r5 ^= r1;
0x000302e4 ldrd r0, r1, [sp, 0x18] | __asm ("ldrd r0, r1, [var_18h]");
0x000302e8 adds r0, r0, r6 | r0 += r6;
0x000302ec adc r1, r1, r7 | __asm ("adc r1, r1, r7");
0x000302f0 ldrd r6, r7, [sp, 0x38] | __asm ("ldrd r6, r7, [var_38h]");
0x000302f4 strd r0, r1, [sp, 0x18] | __asm ("strd r0, r1, [var_18h]");
0x000302f8 adds r6, r6, r2 | r6 += r2;
0x000302fc adc r7, r7, r3 | __asm ("adc r7, r7, r3");
0x00030300 ldrd r2, r3, [sp, 0x18] | __asm ("ldrd r2, r3, [var_18h]");
0x00030304 ldrd r0, r1, [sp, 0xe0] | __asm ("ldrd r0, r1, [var_e4h]");
0x00030308 adds r2, r2, r4 | r2 += r4;
0x0003030c adc r3, r3, r5 | __asm ("adc r3, r3, r5");
0x00030310 eor r0, r0, r8 | r0 ^= r8;
0x00030314 eor r1, r1, sb | r1 ^= sb;
0x00030318 mov r8, r0 | r8 = r0;
0x0003031c mov sb, r1 | sb = r1;
0x00030320 mov r0, r2 | r0 = r2;
0x00030324 mov r1, r3 | r1 = r3;
0x00030328 lsr r2, r6, 0x1c | r2 = r6 >> 0x1c;
0x0003032c lsl r3, r7, 0x1e | r3 = r7 << 0x1e;
0x00030330 adds r8, r8, r0 | r8 += r0;
0x00030334 orr ip, r2, r7, lsl 4 |
0x00030338 orr r3, r3, r6, lsr 2 | r3 |= (r6 >> 2);
0x0003033c add r4, sp, 0x1d8 | r4 += var_1d8h;
0x00030340 str ip, [sp, 0xe8] | var_e8h = ip;
0x00030344 mov r0, r6 | r0 = r6;
0x00030348 adc sb, sb, r1 | __asm ("adc sb, sb, r1");
0x0003034c lsr r2, r7, 0x1c | r2 = r7 >> 0x1c;
0x00030350 mov r1, r7 | r1 = r7;
0x00030354 str r3, [sp, 0xf4] | var_f4h = r3;
0x00030358 lsl ip, r6, 0x1e |
0x0003035c lsl r3, r7, 0x19 | r3 = r7 << 0x19;
0x00030360 ldrd r6, r7, [r4] | __asm ("ldrd r6, r7, [r4]");
0x00030364 orr r3, r3, r0, lsr 7 | r3 |= (r0 >> 7);
0x00030368 adds r6, r6, r8 | r6 += r8;
0x0003036c adc r7, r7, sb | __asm ("adc r7, r7, sb");
0x00030370 mov r8, r0 | r8 = r0;
0x00030374 mov sb, r1 | sb = r1;
0x00030378 orr r5, r2, r0, lsl 4 | r5 = r2 | (r0 << 4);
0x0003037c orr ip, ip, r1, lsr 2 |
0x00030380 str r3, [sp, 0xfc] | var_fch = r3;
0x00030384 lsl r3, r0, 0x19 | r3 = r0 << 0x19;
0x00030388 ldrd r0, r1, [sp, 0x10] | __asm ("ldrd r0, r1, [var_10h]");
0x0003038c str r5, [sp, 0xec] | var_ech = r5;
0x00030390 ldrd r4, r5, [sp, 8] | __asm ("ldrd r4, r5, [var_ch]");
0x00030394 adds r0, r0, r6 | r0 += r6;
0x00030398 adc r1, r1, r7 | __asm ("adc r1, r1, r7");
0x0003039c strd r6, r7, [sp, 0x30] | __asm ("strd r6, r7, [var_30h]");
0x000303a0 orr r4, r4, r8 | r4 |= r8;
0x000303a4 mov r6, r0 | r6 = r0;
0x000303a8 mov r7, r1 | r7 = r1;
0x000303ac orr r5, r5, sb | r5 |= sb;
0x000303b0 str ip, [sp, 0xf0] | var_f0h = ip;
0x000303b4 mov r0, r4 | r0 = r4;
0x000303b8 mov r1, r5 | r1 = r5;
0x000303bc mov r4, r6 | r4 = r6;
0x000303c0 orr r3, r3, sb, lsr 7 | r3 |= (sb >> 7);
0x000303c4 mov r5, r7 | r5 = r7;
0x000303c8 strd r4, r5, [sp, 0x10] | __asm ("strd r4, r5, [var_10h]");
0x000303cc str r3, [sp, 0xf8] | var_f8h = r3;
0x000303d0 lsr ip, r4, 0x12 |
0x000303d4 ldrd r2, r3, [sp, 0xf0] | __asm ("ldrd r2, r3, [var_f4h]");
0x000303d8 ldrd r4, r5, [sp, 0xe8] | __asm ("ldrd r4, r5, [var_e8h]");
0x000303dc strd r8, sb, [sp, 0x18] | __asm ("strd r8, sb, [var_18h]");
0x000303e0 eor r4, r4, r2 | r4 ^= r2;
0x000303e4 eor r5, r5, r3 | r5 ^= r3;
0x000303e8 mov r2, r8 | r2 = r8;
0x000303ec mov r3, sb | r3 = sb;
0x000303f0 ldrd r8, sb, [sp, 8] | __asm ("ldrd r8, sb, [var_ch]");
0x000303f4 lsr r6, r6, 0xe | r6 >>= 0xe;
0x000303f8 and r8, r8, r2 | r8 &= r2;
0x000303fc and sb, sb, r3 | sb &= r3;
0x00030400 mov r2, r8 | r2 = r8;
0x00030404 mov r3, sb | r3 = sb;
0x00030408 ldrd r8, sb, [sp] | __asm ("ldrd r8, sb, [sp]");
0x0003040c and r8, r8, r0 | r8 &= r0;
0x00030410 and sb, sb, r1 | sb &= r1;
0x00030414 strd r8, sb, [sp, 0x38] | __asm ("strd r8, sb, [var_38h]");
0x00030418 ldrd r8, sb, [sp, 0x10] | __asm ("ldrd r8, sb, [var_10h]");
0x0003041c orr r1, r6, sb, lsl 18 | r1 = r6 | (sb << 18);
0x00030420 str r1, [sp, 0x100] | var_100h = r1;
0x00030424 orr r1, ip, sb, lsl 14 | r1 = ip | (sb << 14);
0x00030428 str r1, [sp, 0x108] | var_108h = r1;
0x0003042c ldrd r0, r1, [sp, 0xf8] | __asm ("ldrd r0, r1, [var_fch]");
0x00030430 lsr r7, sb, 0xe | r7 = sb >> 0xe;
0x00030434 eor r0, r0, r4 | r0 ^= r4;
0x00030438 eor r1, r1, r5 | r1 ^= r5;
0x0003043c strd r0, r1, [sp, 0x10] | __asm ("strd r0, r1, [var_10h]");
0x00030440 ldrd r0, r1, [sp, 0x38] | __asm ("ldrd r0, r1, [var_38h]");
0x00030444 ldrd r4, r5, [sp, 0x28] | __asm ("ldrd r4, r5, [var_28h]");
0x00030448 orr r0, r0, r2 | r0 |= r2;
0x0003044c orr r1, r1, r3 | r1 |= r3;
0x00030450 ldrd r2, r3, [sp, 0x20] | __asm ("ldrd r2, r3, [var_20h]");
0x00030454 lsr r6, sb, 0x12 | r6 = sb >> 0x12;
0x00030458 eor r2, r2, r4 | r2 ^= r4;
0x0003045c lsl ip, sb, 0x17 |
0x00030460 mov r4, r8 | r4 = r8;
0x00030464 eor r3, r3, r5 | r3 ^= r5;
0x00030468 orr r7, r7, r8, lsl 18 | r7 |= (r8 << 18);
0x0003046c mov r5, sb | r5 = sb;
0x00030470 orr r6, r6, r4, lsl 14 | r6 |= (r4 << 14);
0x00030474 orr ip, ip, r4, lsr 9 |
0x00030478 str r7, [sp, 0x104] | var_104h = r7;
0x0003047c str r6, [sp, 0x10c] | var_10ch = r6;
0x00030480 mov r7, r5 | r7 = r5;
0x00030484 mov r6, r4 | r6 = r4;
0x00030488 str ip, [sp, 0x114] | var_114h = ip;
0x0003048c lsl ip, r4, 0x17 |
0x00030490 ldrd r4, r5, [sp, 0x10] | __asm ("ldrd r4, r5, [var_10h]");
0x00030494 strd r6, r7, [sp, 0x10] | __asm ("strd r6, r7, [var_10h]");
0x00030498 adds r4, r4, r0 | r4 += r0;
0x0003049c adc r5, r5, r1 | __asm ("adc r5, r5, r1");
0x000304a0 mov r1, r7 | r1 = r7;
0x000304a4 and r1, r1, r3 | r1 &= r3;
0x000304a8 mov r3, r1 | r3 = r1;
0x000304ac mov r0, r6 | r0 = r6;
0x000304b0 orr r1, ip, r7, lsr 9 | r1 = ip | (r7 >> 9);
0x000304b4 ldrd r6, r7, [sp, 0x30] | __asm ("ldrd r6, r7, [var_30h]");
0x000304b8 and r0, r0, r2 | r0 &= r2;
0x000304bc adds r6, r6, r4 | r6 += r4;
0x000304c0 mov r2, r0 | r2 = r0;
0x000304c4 str r1, [sp, 0x110] | var_110h = r1;
0x000304c8 ldrd r0, r1, [lr, -0x20] | __asm ("ldrd r0, r1, [lr, -0x20]");
0x000304cc adc r7, r7, r5 | __asm ("adc r7, r7, r5");
0x000304d0 mov r5, r7 | r5 = r7;
0x000304d4 mov r4, r6 | r4 = r6;
0x000304d8 ldrd r6, r7, [sp, 0x20] | __asm ("ldrd r6, r7, [var_20h]");
0x000304dc adds r0, r0, sl | r0 += sl;
0x000304e0 adc r1, r1, fp | __asm ("adc r1, r1, fp");
0x000304e4 mov r8, r0 | r8 = r0;
0x000304e8 mov sb, r1 | sb = r1;
0x000304ec eor r6, r6, r2 | r6 ^= r2;
0x000304f0 add ip, sp, 0x108 |
0x000304f4 add r1, sp, 0x100 | r1 += var_100h;
0x000304f8 ldrd sl, fp, [ip] | __asm ("ldrd sl, fp, [ip]");
0x000304fc adds r6, r6, r8 | r6 += r8;
0x00030500 ldrd r0, r1, [r1] | __asm ("ldrd r0, r1, [r1]");
0x00030504 eor r7, r7, r3 | r7 ^= r3;
0x00030508 add r3, sp, 0x110 | r3 += var_110h;
0x0003050c adc r7, r7, sb | __asm ("adc r7, r7, sb");
0x00030510 ldrd r8, sb, [r3] | __asm ("ldrd r8, sb, [r3]");
0x00030514 eor r1, r1, fp | r1 ^= fp;
0x00030518 eor r0, r0, sl | r0 ^= sl;
0x0003051c eor sb, sb, r1 | sb ^= r1;
0x00030520 mov sl, r4 | sl = r4;
0x00030524 lsr r4, r4, 0x1c | r4 >>= 0x1c;
0x00030528 mov fp, r5 |
0x0003052c orr r3, r4, r5, lsl 4 | r3 = r4 | (r5 << 4);
0x00030530 lsl ip, r5, 0x1e |
0x00030534 mov r1, sb | r1 = sb;
0x00030538 eor r8, r8, r0 | r8 ^= r0;
0x0003053c mov sb, r5 | sb = r5;
0x00030540 lsr r5, r5, 0x1c | r5 >>= 0x1c;
0x00030544 mov r0, r8 | r0 = r8;
0x00030548 lsl r4, sl, 0x1e | r4 = sl << 0x1e;
0x0003054c orr r5, r5, sl, lsl 4 | r5 |= (sl << 4);
0x00030550 adds r2, r6, r0 | r2 = r6 + r0;
0x00030554 str r5, [sp, 0x11c] | var_11ch = r5;
0x00030558 add r0, sp, 0x1e0 | r0 += var_1e0h;
0x0003055c orr r5, r4, fp, lsr 2 | r5 = r4 | (fp >> 2);
0x00030560 str r5, [sp, 0x120] | var_120h = r5;
0x00030564 ldrd r4, r5, [r0] | __asm ("ldrd r4, r5, [r0]");
0x00030568 str r3, [sp, 0x118] | var_118h = r3;
0x0003056c orr r3, ip, sl, lsr 2 | r3 = ip | (sl >> 2);
0x00030570 str r3, [sp, 0x124] | var_124h = r3;
0x00030574 adc r3, r7, r1 | __asm ("adc r3, r7, r1");
0x00030578 adds r4, r4, r2 | r4 += r2;
0x0003057c lsl r1, sl, 0x19 | r1 = sl << 0x19;
0x00030580 adc r5, r5, r3 | __asm ("adc r5, r5, r3");
0x00030584 orr r3, r1, sb, lsr 7 | r3 = r1 | (sb >> 7);
0x00030588 str r3, [sp, 0x128] | var_128h = r3;
0x0003058c add r3, sp, 0x118 | r3 += var_118h;
0x00030590 ldrd r0, r1, [r3] | __asm ("ldrd r0, r1, [r3]");
0x00030594 add r3, sp, 0x120 | r3 += var_120h;
0x00030598 ldrd r2, r3, [r3] | __asm ("ldrd r2, r3, [r3]");
0x0003059c lsl ip, fp, 0x19 |
0x000305a0 mov r8, sl | r8 = sl;
0x000305a4 orr ip, ip, sl, lsr 7 |
0x000305a8 ldrd sl, fp, [sp, 0x18] | __asm ("ldrd sl, fp, [var_18h]");
0x000305ac eor r0, r0, r2 | r0 ^= r2;
0x000305b0 eor r1, r1, r3 | r1 ^= r3;
0x000305b4 mov r6, r4 | r6 = r4;
0x000305b8 mov r7, r5 | r7 = r5;
0x000305bc orr r4, sl, r8 | r4 = sl | r8;
0x000305c0 orr r5, fp, sb | r5 = fp | sb;
0x000305c4 mov r2, r0 | r2 = r0;
0x000305c8 mov r3, r1 | r3 = r1;
0x000305cc mov r0, sl | r0 = sl;
0x000305d0 mov r1, fp | r1 = fp;
0x000305d4 strd r4, r5, [sp, 0x38] | __asm ("strd r4, r5, [var_38h]");
0x000305d8 and r0, r0, r8 | r0 &= r8;
0x000305dc and r1, r1, sb | r1 &= sb;
0x000305e0 ldrd r4, r5, [sp] | __asm ("ldrd r4, r5, [sp]");
0x000305e4 ldrd sl, fp, [sp, 8] | __asm ("ldrd sl, fp, [var_ch]");
0x000305e8 strd r0, r1, [sp] | __asm ("strd r0, r1, [sp]");
0x000305ec ldrd r0, r1, [sp, 0x38] | __asm ("ldrd r0, r1, [var_38h]");
0x000305f0 strd r8, sb, [sp, 0x30] | __asm ("strd r8, sb, [var_30h]");
0x000305f4 and r1, r1, fp | r1 &= fp;
0x000305f8 and r0, r0, sl | r0 &= sl;
0x000305fc mov sb, r1 | sb = r1;
0x00030600 add r1, sp, 0x128 | r1 += var_128h;
0x00030604 str ip, [sp, 0x12c] | var_12ch = ip;
0x00030608 mov r8, r0 | r8 = r0;
0x0003060c ldrd r0, r1, [r1] | __asm ("ldrd r0, r1, [r1]");
0x00030610 adds r4, r4, r6 | r4 += r6;
0x00030614 eor r0, r0, r2 | r0 ^= r2;
0x00030618 eor r1, r1, r3 | r1 ^= r3;
0x0003061c mov r2, r0 | r2 = r0;
0x00030620 mov r3, r1 | r3 = r1;
0x00030624 ldrd r0, r1, [sp] | __asm ("ldrd r0, r1, [sp]");
0x00030628 adc r5, r5, r7 | __asm ("adc r5, r5, r7");
0x0003062c orr r0, r0, r8 | r0 |= r8;
0x00030630 lsr ip, r4, 0xe |
0x00030634 orr r1, r1, sb | r1 |= sb;
0x00030638 mov r8, r0 | r8 = r0;
0x0003063c adds r8, r8, r2 | r8 += r2;
0x00030640 mov sl, r4 | sl = r4;
0x00030644 mov sb, r1 | sb = r1;
0x00030648 lsr r4, r4, 0x12 | r4 >>= 0x12;
0x0003064c orr r1, ip, r5, lsl 18 | r1 = ip | (r5 << 18);
0x00030650 adc sb, sb, r3 | __asm ("adc sb, sb, r3");
0x00030654 str r1, [sp, 0x130] | var_130h = r1;
0x00030658 ldrd r2, r3, [sp, 0x10] | __asm ("ldrd r2, r3, [var_10h]");
0x0003065c orr r1, r4, r5, lsl 14 | r1 = r4 | (r5 << 14);
0x00030660 mov r4, sl | r4 = sl;
0x00030664 ldrd sl, fp, [sp, 0x28] | __asm ("ldrd sl, fp, [var_28h]");
0x00030668 lsr r0, r5, 0x12 | r0 = r5 >> 0x12;
0x0003066c eor r2, r2, sl | r2 ^= sl;
0x00030670 eor r3, r3, fp | r3 ^= fp;
0x00030674 strd r2, r3, [sp, 0x28] | __asm ("strd r2, r3, [var_28h]");
0x00030678 str r1, [sp, 0x138] | var_138h = r1;
0x0003067c orr r3, r0, r4, lsl 14 | r3 = r0 | (r4 << 14);
0x00030680 lsl r1, r5, 0x17 | r1 = r5 << 0x17;
0x00030684 adds r2, r8, r6 | r2 = r8 + r6;
0x00030688 lsr ip, r5, 0xe |
0x0003068c str r3, [sp, 0x13c] | var_13ch = r3;
0x00030690 orr r3, r1, r4, lsr 9 | r3 = r1 | (r4 >> 9);
0x00030694 lsl r1, r4, 0x17 | r1 = r4 << 0x17;
0x00030698 orr ip, ip, r4, lsl 18 |
0x0003069c orr r1, r1, r5, lsr 9 | r1 |= (r5 >> 9);
0x000306a0 str r3, [sp, 0x144] | var_144h = r3;
0x000306a4 adc r3, sb, r7 | __asm ("adc r3, sb, r7");
0x000306a8 ldrd r8, sb, [sp, 0x28] | __asm ("ldrd r8, sb, [var_28h]");
0x000306ac strd r2, r3, [sp] | __asm ("strd r2, r3, [sp]");
0x000306b0 str ip, [sp, 0x134] | var_134h = ip;
0x000306b4 str r1, [sp, 0x140] | var_140h = r1;
0x000306b8 ldrd r0, r1, [sp] | __asm ("ldrd r0, r1, [sp]");
0x000306bc and r8, r8, r4 | r8 &= r4;
0x000306c0 ldrd r6, r7, [sp, 0x20] | __asm ("ldrd r6, r7, [var_20h]");
0x000306c4 mov r2, r8 | r2 = r8;
0x000306c8 lsl ip, r1, 0x1e |
0x000306cc mov r8, r4 | r8 = r4;
0x000306d0 lsr r4, r0, 0x1c | r4 = r0 >> 0x1c;
0x000306d4 ldrd r0, r1, [lr, -0x18] | __asm ("ldrd r0, r1, [lr, -0x18]");
0x000306d8 and sb, sb, r5 | sb &= r5;
0x000306dc adds r0, r0, r6 | r0 += r6;
0x000306e0 adc r1, r1, r7 | __asm ("adc r1, r1, r7");
0x000306e4 mov r3, sb | r3 = sb;
0x000306e8 mov r7, r1 | r7 = r1;
0x000306ec mov r1, fp | r1 = fp;
0x000306f0 mov r6, r0 | r6 = r0;
0x000306f4 eor r1, r1, r3 | r1 ^= r3;
0x000306f8 mov r0, sl | r0 = sl;
0x000306fc mov sb, r5 | sb = r5;
0x00030700 mov r3, r1 | r3 = r1;
0x00030704 eor r0, r0, r2 | r0 ^= r2;
0x00030708 add r5, sp, 0x138 | r5 += var_138h;
0x0003070c add r1, sp, 0x130 | r1 += var_130h;
0x00030710 mov r2, r0 | r2 = r0;
0x00030714 strd sl, fp, [sp, 0x28] | __asm ("strd sl, fp, [var_0hx28]");
0x00030718 ldrd r0, r1, [r1] | __asm ("ldrd r0, r1, [r1]");
0x0003071c ldrd sl, fp, [r5] | __asm ("ldrd sl, fp, [r5]");
0x00030720 strd r8, sb, [sp, 0x38] | __asm ("strd r8, sb, [var_38h]");
0x00030724 eor r0, r0, sl | r0 ^= sl;
0x00030728 eor r1, r1, fp | r1 ^= fp;
0x0003072c ldrd sl, fp, [sp] | __asm ("ldrd sl, fp, [sp]");
0x00030730 orr r5, r4, fp, lsl 4 | r5 = r4 | (fp << 4);
0x00030734 orr ip, ip, sl, lsr 2 |
0x00030738 lsl r4, sl, 0x1e | r4 = sl << 0x1e;
0x0003073c adds sl, r2, r6 | sl = r2 + r6;
0x00030740 str r5, [sp, 0x148] | var_148h = r5;
0x00030744 str ip, [sp, 0x154] | var_154h = ip;
0x00030748 lsr r5, fp, 0x1c | r5 = fp >> 0x1c;
0x0003074c lsl ip, fp, 0x19 |
0x00030750 adc fp, r3, r7 | __asm ("adc fp, r3, r7");
0x00030754 add r3, sp, 0x140 | r3 += var_140h;
0x00030758 ldrd r2, r3, [r3] | __asm ("ldrd r2, r3, [r3]");
0x0003075c ldrd r6, r7, [sp] | __asm ("ldrd r6, r7, [sp]");
0x00030760 eor r3, r3, r1 | r3 ^= r1;
0x00030764 mov r1, r3 | r1 = r3;
0x00030768 orr r3, r5, r6, lsl 4 | r3 = r5 | (r6 << 4);
0x0003076c str r3, [sp, 0x14c] | var_14ch = r3;
0x00030770 orr r3, r4, r7, lsr 2 | r3 = r4 | (r7 >> 2);
0x00030774 ldrd r4, r5, [sp, 0x30] | __asm ("ldrd r4, r5, [var_30h]");
0x00030778 eor r2, r2, r0 | r2 ^= r0;
0x0003077c adds r2, sl, r2 | r2 = sl + r2;
0x00030780 str r3, [sp, 0x150] | var_150h = r3;
0x00030784 orr r3, ip, r6, lsr 7 | r3 = ip | (r6 >> 7);
0x00030788 str r3, [sp, 0x15c] | var_15ch = r3;
0x0003078c lsl ip, r6, 0x19 |
0x00030790 adc r3, fp, r1 | __asm ("adc r3, fp, r1");
0x00030794 orr r1, r7, r5 | r1 = r7 | r5;
0x00030798 mov fp, r1 |
0x0003079c orr r1, ip, r7, lsr 7 | r1 = ip | (r7 >> 7);
0x000307a0 str r1, [sp, 0x158] | var_158h = r1;
0x000307a4 add r1, sp, 0x1e8 | r1 += var_1e8h;
0x000307a8 orr r0, r6, r4 | r0 = r6 | r4;
0x000307ac ldrd r6, r7, [r1] | __asm ("ldrd r6, r7, [r1]");
0x000307b0 add r1, sp, 0x150 | r1 += var_150h;
0x000307b4 adds r6, r6, r2 | r6 += r2;
0x000307b8 adc r7, r7, r3 | __asm ("adc r7, r7, r3");
0x000307bc add r3, sp, 0x148 | r3 += var_148h;
0x000307c0 mov sl, r0 | sl = r0;
0x000307c4 ldrd r2, r3, [r3] | __asm ("ldrd r2, r3, [r3]");
0x000307c8 ldrd r0, r1, [r1] | __asm ("ldrd r0, r1, [r1]");
0x000307cc eor r2, r2, r0 | r2 ^= r0;
0x000307d0 eor r3, r3, r1 | r3 ^= r1;
0x000307d4 mov r0, r2 | r0 = r2;
0x000307d8 mov r1, r3 | r1 = r3;
0x000307dc ldrd r2, r3, [sp] | __asm ("ldrd r2, r3, [sp]");
0x000307e0 and r2, r2, r4 | r2 &= r4;
0x000307e4 and r3, r3, r5 | r3 &= r5;
0x000307e8 mov r4, r2 | r4 = r2;
0x000307ec mov r5, r3 | r5 = r3;
0x000307f0 ldrd r2, r3, [sp, 0x18] | __asm ("ldrd r2, r3, [var_18h]");
0x000307f4 and r2, r2, sl | r2 &= sl;
0x000307f8 and r3, r3, fp | r3 &= fp;
0x000307fc strd r2, r3, [sp, 0x20] | __asm ("strd r2, r3, [var_20h]");
0x00030800 add r3, sp, 0x158 | r3 += var_158h;
0x00030804 ldrd r2, r3, [r3] | __asm ("ldrd r2, r3, [r3]");
0x00030808 ldrd sl, fp, [sp, 8] | __asm ("ldrd sl, fp, [var_ch]");
0x0003080c eor r2, r2, r0 | r2 ^= r0;
0x00030810 eor r3, r3, r1 | r3 ^= r1;
0x00030814 mov r0, r2 | r0 = r2;
0x00030818 mov r1, r3 | r1 = r3;
0x0003081c ldrd r2, r3, [sp, 0x20] | __asm ("ldrd r2, r3, [var_20h]");
0x00030820 adds sl, sl, r6 | sl += r6;
0x00030824 orr r2, r2, r4 | r2 |= r4;
0x00030828 adc fp, fp, r7 | __asm ("adc fp, fp, r7");
0x0003082c orr r3, r3, r5 | r3 |= r5;
0x00030830 adds r0, r0, r2 | r0 += r2;
0x00030834 lsr ip, sl, 0xe |
0x00030838 adc r1, r1, r3 | __asm ("adc r1, r1, r3");
0x0003083c lsr r4, sl, 0x12 | r4 = sl >> 0x12;
0x00030840 orr r3, ip, fp, lsl 18 | r3 = ip | (fp << 18);
0x00030844 str r3, [sp, 0x160] | var_160h = r3;
0x00030848 lsr ip, fp, 0xe |
0x0003084c orr r3, r4, fp, lsl 14 | r3 = r4 | (fp << 14);
0x00030850 adds r4, r0, r6 | r4 = r0 + r6;
0x00030854 adc r5, r1, r7 | __asm ("adc r5, r1, r7");
0x00030858 lsr r2, fp, 0x12 | r2 = fp >> 0x12;
0x0003085c orr r1, ip, sl, lsl 18 | r1 = ip | (sl << 18);
0x00030860 str r3, [sp, 0x168] | var_168h = r3;
0x00030864 str r1, [sp, 0x164] | var_164h = r1;
0x00030868 lsl r3, fp, 0x17 | r3 = fp << 0x17;
0x0003086c orr r1, r2, sl, lsl 14 | r1 = r2 | (sl << 14);
0x00030870 str r1, [sp, 0x16c] | var_16ch = r1;
0x00030874 orr r3, r3, sl, lsr 9 | r3 |= (sl >> 9);
0x00030878 lsl r1, sl, 0x17 | r1 = sl << 0x17;
0x0003087c lsr r2, r4, 0x1c | r2 = r4 >> 0x1c;
0x00030880 str r3, [sp, 0x174] | var_174h = r3;
0x00030884 orr r1, r1, fp, lsr 9 | r1 |= (fp >> 9);
0x00030888 lsl r3, r5, 0x1e | r3 = r5 << 0x1e;
0x0003088c ldrd r6, r7, [sp, 0x10] | __asm ("ldrd r6, r7, [var_10h]");
0x00030890 orr r3, r3, r4, lsr 2 | r3 |= (r4 >> 2);
0x00030894 str r1, [sp, 0x170] | var_170h = r1;
0x00030898 orr r1, r2, r5, lsl 4 | r1 = r2 | (r5 << 4);
0x0003089c str r1, [sp, 0x178] | var_178h = r1;
0x000308a0 str r3, [sp, 0x184] | var_184h = r3;
0x000308a4 ldrd r0, r1, [sp, 0x28] | __asm ("ldrd r0, r1, [var_28h]");
0x000308a8 ldrd r2, r3, [lr, -0x10] | __asm ("ldrd r2, r3, [lr, -0x10]");
0x000308ac eor r7, r7, sb | r7 ^= sb;
0x000308b0 adds r2, r2, r0 | r2 += r0;
0x000308b4 adc r3, r3, r1 | __asm ("adc r3, r3, r1");
0x000308b8 strd r2, r3, [sp, 8] | __asm ("strd r2, r3, [var_ch]");
0x000308bc ldrd r2, r3, [sp, 0x10] | __asm ("ldrd r2, r3, [var_10h]");
0x000308c0 eor r6, r6, r8 | r6 ^= r8;
0x000308c4 and r7, r7, fp | r7 &= fp;
0x000308c8 and r6, r6, sl | r6 &= sl;
0x000308cc eor r3, r3, r7 | r3 ^= r7;
0x000308d0 mov r7, r3 | r7 = r3;
0x000308d4 eor r2, r2, r6 | r2 ^= r6;
0x000308d8 add r3, sp, 0x160 | r3 += var_160h;
0x000308dc add r1, sp, 0x168 | r1 += var_168h;
0x000308e0 ldrd r0, r1, [r1] | __asm ("ldrd r0, r1, [r1]");
0x000308e4 mov r6, r2 | r6 = r2;
0x000308e8 ldrd r2, r3, [r3] | __asm ("ldrd r2, r3, [r3]");
0x000308ec mov r8, r4 | r8 = r4;
0x000308f0 mov sb, r5 | sb = r5;
0x000308f4 lsr r5, r5, 0x1c | r5 >>= 0x1c;
0x000308f8 eor r3, r3, r1 | r3 ^= r1;
0x000308fc lsl r4, r4, 0x1e | r4 <<= 0x1e;
0x00030900 orr r1, r5, r8, lsl 4 | r1 = r5 | (r8 << 4);
0x00030904 lsl ip, sb, 0x19 |
0x00030908 str r1, [sp, 0x17c] | var_17ch = r1;
0x0003090c orr r1, r4, sb, lsr 2 | r1 = r4 | (sb >> 2);
0x00030910 str r1, [sp, 0x180] | var_180h = r1;
0x00030914 orr r1, ip, r8, lsr 7 | r1 = ip | (r8 >> 7);
0x00030918 eor r2, r2, r0 | r2 ^= r0;
0x0003091c str r1, [sp, 0x18c] | var_18ch = r1;
0x00030920 ldrd r0, r1, [sp, 8] | __asm ("ldrd r0, r1, [var_ch]");
0x00030924 lsl ip, r8, 0x19 |
0x00030928 adds r0, r0, r6 | r0 += r6;
0x0003092c adc r1, r1, r7 | __asm ("adc r1, r1, r7");
0x00030930 strd r0, r1, [sp, 8] | __asm ("strd r0, r1, [var_ch]");
0x00030934 add r1, sp, 0x170 | r1 += var_170h;
0x00030938 ldrd r0, r1, [r1] | __asm ("ldrd r0, r1, [r1]");
0x0003093c ldrd r6, r7, [sp] | __asm ("ldrd r6, r7, [sp]");
0x00030940 eor r0, r0, r2 | r0 ^= r2;
0x00030944 orr r6, r6, r8 | r6 |= r8;
0x00030948 orr r7, r7, sb | r7 |= sb;
0x0003094c eor r1, r1, r3 | r1 ^= r3;
0x00030950 mov r2, r0 | r2 = r0;
0x00030954 mov r3, r1 | r3 = r1;
0x00030958 mov r0, r6 | r0 = r6;
0x0003095c mov r1, r7 | r1 = r7;
0x00030960 ldrd r6, r7, [sp, 8] | __asm ("ldrd r6, r7, [var_ch]");
0x00030964 orr ip, ip, sb, lsr 7 |
0x00030968 adds r6, r6, r2 | r6 += r2;
0x0003096c adc r7, r7, r3 | __asm ("adc r7, r7, r3");
0x00030970 str ip, [sp, 0x188] | var_188h = ip;
0x00030974 add r3, sp, 0x178 | r3 += var_178h;
0x00030978 add ip, sp, 0x180 |
0x0003097c ldrd r4, r5, [ip] | __asm ("ldrd r4, r5, [ip]");
0x00030980 ldrd r2, r3, [r3] | __asm ("ldrd r2, r3, [r3]");
0x00030984 strd r8, sb, [sp, 0x20] | __asm ("strd r8, sb, [var_20h]");
0x00030988 eor r2, r2, r4 | r2 ^= r4;
0x0003098c eor r3, r3, r5 | r3 ^= r5;
0x00030990 mov r4, r8 | r4 = r8;
0x00030994 mov r5, sb | r5 = sb;
0x00030998 ldrd r8, sb, [sp] | __asm ("ldrd r8, sb, [sp]");
0x0003099c and r8, r8, r4 | r8 &= r4;
0x000309a0 and sb, sb, r5 | sb &= r5;
0x000309a4 mov r4, r8 | r4 = r8;
0x000309a8 mov r5, sb | r5 = sb;
0x000309ac ldrd r8, sb, [sp, 0x30] | __asm ("ldrd r8, sb, [var_30h]");
0x000309b0 and sb, sb, r1 | sb &= r1;
0x000309b4 add r1, sp, 0x1f0 | r1 += var_1f0h;
0x000309b8 and r8, r8, r0 | r8 &= r0;
0x000309bc ldrd r0, r1, [r1] | __asm ("ldrd r0, r1, [r1]");
0x000309c0 strd r8, sb, [sp, 8] | __asm ("strd r8, sb, [var_ch]");
0x000309c4 adds r0, r0, r6 | r0 += r6;
0x000309c8 adc r1, r1, r7 | __asm ("adc r1, r1, r7");
0x000309cc mov r7, r1 | r7 = r1;
0x000309d0 add r1, sp, 0x188 | r1 += var_188h;
0x000309d4 mov r6, r0 | r6 = r0;
0x000309d8 ldrd r0, r1, [r1] | __asm ("ldrd r0, r1, [r1]");
0x000309dc eor r0, r0, r2 | r0 ^= r2;
0x000309e0 eor r1, r1, r3 | r1 ^= r3;
0x000309e4 mov r8, r0 | r8 = r0;
0x000309e8 mov sb, r1 | sb = r1;
0x000309ec ldrd r0, r1, [sp, 8] | __asm ("ldrd r0, r1, [var_ch]");
0x000309f0 orr r0, r0, r4 | r0 |= r4;
0x000309f4 orr r1, r1, r5 | r1 |= r5;
0x000309f8 ldrd r4, r5, [sp, 0x18] | __asm ("ldrd r4, r5, [var_18h]");
0x000309fc adds r4, r4, r6 | r4 += r6;
0x00030a00 adc r5, r5, r7 | __asm ("adc r5, r5, r7");
0x00030a04 adds r2, r8, r0 | r2 = r8 + r0;
0x00030a08 adc r3, sb, r1 | __asm ("adc r3, sb, r1");
0x00030a0c adds r8, r2, r6 | r8 = r2 + r6;
0x00030a10 adc sb, r3, r7 | __asm ("adc sb, r3, r7");
0x00030a14 ldrd r2, r3, [lr, -8] | __asm ("ldrd r2, r3, [lr, -8]");
0x00030a18 mov ip, r5 |
0x00030a1c lsr r0, r4, 0xe | r0 = r4 >> 0xe;
0x00030a20 lsr r1, r4, 0x12 | r1 = r4 >> 0x12;
0x00030a24 mov r7, sb | r7 = sb;
0x00030a28 mov r6, r8 | r6 = r8;
0x00030a2c orr r0, r0, r5, lsl 18 | r0 |= (r5 << 18);
0x00030a30 mov r8, r4 | r8 = r4;
0x00030a34 mov sb, r5 | sb = r5;
0x00030a38 orr r1, r1, ip, lsl 14 | r1 |= (ip << 14);
0x00030a3c lsr r5, r5, 0xe | r5 >>= 0xe;
0x00030a40 strd r2, r3, [sp, 0x18] | __asm ("strd r2, r3, [var_18h]");
0x00030a44 orr r5, r5, r8, lsl 18 | r5 |= (r8 << 18);
0x00030a48 str r0, [sp, 0x190] | var_190h = r0;
0x00030a4c str r1, [sp, 0x198] | var_198h = r1;
0x00030a50 ldrd r0, r1, [sp, 0x38] | __asm ("ldrd r0, r1, [var_38h]");
0x00030a54 strd r8, sb, [sp, 8] | __asm ("strd r8, sb, [var_ch]");
0x00030a58 ldrd r8, sb, [sp, 8] | __asm ("ldrd r8, sb, [var_ch]");
0x00030a5c lsr r4, ip, 0x12 | r4 = ip >> 0x12;
0x00030a60 lsl ip, ip, 0x17 |
0x00030a64 lsr r2, r6, 0x1c | r2 = r6 >> 0x1c;
0x00030a68 orr ip, ip, r8, lsr 9 |
0x00030a6c lsl r3, r7, 0x1e | r3 = r7 << 0x1e;
0x00030a70 str ip, [sp, 0x1a4] | var_1a4h = ip;
0x00030a74 orr r3, r3, r6, lsr 2 | r3 |= (r6 >> 2);
0x00030a78 orr ip, r2, r7, lsl 4 |
0x00030a7c mov sb, r7 | sb = r7;
0x00030a80 str r5, [sp, 0x194] | var_194h = r5;
0x00030a84 str ip, [sp, 0x1a8] | var_1a8h = ip;
0x00030a88 orr r5, r4, r8, lsl 14 | r5 = r4 | (r8 << 14);
0x00030a8c str r3, [sp, 0x1b4] | var_1b4h = r3;
0x00030a90 lsl r2, r6, 0x1e | r2 = r6 << 0x1e;
0x00030a94 mov r4, r8 | r4 = r8;
0x00030a98 lsr ip, r7, 0x1c |
0x00030a9c mov r8, r6 | r8 = r6;
0x00030aa0 lsl r3, r7, 0x19 | r3 = r7 << 0x19;
0x00030aa4 ldrd r6, r7, [sp, 8] | __asm ("ldrd r6, r7, [var_ch]");
0x00030aa8 eor r0, r0, sl | r0 ^= sl;
0x00030aac eor r1, r1, fp | r1 ^= fp;
0x00030ab0 str r5, [sp, 0x19c] | var_19ch = r5;
0x00030ab4 orr ip, ip, r8, lsl 4 |
0x00030ab8 orr r3, r3, r8, lsr 7 | r3 |= (r8 >> 7);
0x00030abc and r6, r6, r0 | r6 &= r0;
0x00030ac0 and r7, r7, r1 | r7 &= r1;
0x00030ac4 ldr r5, [sp, 0xc] | r5 = var_ch;
0x00030ac8 mov r0, r6 | r0 = r6;
0x00030acc mov r1, r7 | r1 = r7;
0x00030ad0 str ip, [sp, 0x1ac] | var_1ach = ip;
0x00030ad4 ldrd r6, r7, [sp, 0x10] | __asm ("ldrd r6, r7, [var_10h]");
0x00030ad8 orr ip, r2, sb, lsr 2 |
0x00030adc str r3, [sp, 0x1bc] | var_1bch = r3;
0x00030ae0 ldrd r2, r3, [sp, 0x18] | __asm ("ldrd r2, r3, [var_18h]");
0x00030ae4 lsl r4, r4, 0x17 | r4 <<= 0x17;
0x00030ae8 orr r5, r4, r5, lsr 9 | r5 = r4 | (r5 >> 9);
0x00030aec adds r2, r2, r6 | r2 += r6;
0x00030af0 str r5, [sp, 0x1a0] | var_1a0h = r5;
0x00030af4 mov r4, r8 | r4 = r8;
0x00030af8 mov r5, sb | r5 = sb;
0x00030afc str ip, [sp, 0x1b0] | var_1b0h = ip;
0x00030b00 lsl ip, r8, 0x19 |
0x00030b04 ldrd r8, sb, [sp, 0x38] | __asm ("ldrd r8, sb, [var_38h]");
0x00030b08 adc r3, r3, r7 | __asm ("adc r3, r3, r7");
0x00030b0c mov r7, r3 | r7 = r3;
0x00030b10 add r3, sp, 0x190 | r3 += var_190h;
0x00030b14 eor r8, r8, r0 | r8 ^= r0;
0x00030b18 eor sb, sb, r1 | sb ^= r1;
0x00030b1c ldrd r0, r1, [r3] | __asm ("ldrd r0, r1, [r3]");
0x00030b20 add r3, sp, 0x198 | r3 += var_198h;
0x00030b24 mov r6, r2 | r6 = r2;
0x00030b28 ldrd r2, r3, [r3] | __asm ("ldrd r2, r3, [r3]");
0x00030b2c strd r4, r5, [sp, 0x28] | __asm ("strd r4, r5, [var_28h]");
0x00030b30 strd r8, sb, [sp, 0x10] | __asm ("strd r8, sb, [var_10h]");
0x00030b34 eor r0, r0, r2 | r0 ^= r2;
0x00030b38 ldrd r8, sb, [sp, 0x28] | __asm ("ldrd r8, sb, [var_28h]");
0x00030b3c eor r1, r1, r3 | r1 ^= r3;
0x00030b40 ldrd r2, r3, [sp, 0x20] | __asm ("ldrd r2, r3, [var_20h]");
0x00030b44 mov r4, r0 | r4 = r0;
0x00030b48 mov r5, r1 | r5 = r1;
0x00030b4c orr r0, r2, r8 | r0 = r2 | r8;
0x00030b50 orr r1, r3, sb | r1 = r3 | sb;
0x00030b54 strd r0, r1, [sp, 0x18] | __asm ("strd r0, r1, [var_18h]");
0x00030b58 orr r1, ip, sb, lsr 7 | r1 = ip | (sb >> 7);
0x00030b5c str r1, [sp, 0x1b8] | var_1b8h = r1;
0x00030b60 ldrd r0, r1, [sp, 0x10] | __asm ("ldrd r0, r1, [var_10h]");
0x00030b64 add ip, sp, 0x1a0 |
0x00030b68 adds r0, r0, r6 | r0 += r6;
0x00030b6c adc r1, r1, r7 | __asm ("adc r1, r1, r7");
0x00030b70 ldrd r6, r7, [ip] | __asm ("ldrd r6, r7, [ip]");
0x00030b74 add ip, sp, 0x1a8 |
0x00030b78 eor r6, r6, r4 | r6 ^= r4;
0x00030b7c eor r7, r7, r5 | r7 ^= r5;
0x00030b80 strd r6, r7, [sp, 0x10] | __asm ("strd r6, r7, [var_10h]");
0x00030b84 ldrd r6, r7, [ip] | __asm ("ldrd r6, r7, [ip]");
0x00030b88 add ip, sp, 0x1b0 |
0x00030b8c ldrd r4, r5, [ip] | __asm ("ldrd r4, r5, [ip]");
0x00030b90 and r2, r2, r8 | r2 &= r8;
0x00030b94 and r3, r3, sb | r3 &= sb;
0x00030b98 eor r6, r6, r4 | r6 ^= r4;
0x00030b9c eor r7, r7, r5 | r7 ^= r5;
0x00030ba0 mov r8, r2 | r8 = r2;
0x00030ba4 ldrd r4, r5, [sp] | __asm ("ldrd r4, r5, [sp]");
0x00030ba8 mov sb, r3 | sb = r3;
0x00030bac ldrd r2, r3, [sp, 0x18] | __asm ("ldrd r2, r3, [var_18h]");
0x00030bb0 and r2, r2, r4 | r2 &= r4;
0x00030bb4 and r3, r3, r5 | r3 &= r5;
0x00030bb8 ldrd r4, r5, [sp, 0x10] | __asm ("ldrd r4, r5, [var_10h]");
0x00030bbc adds r4, r4, r0 | r4 += r0;
0x00030bc0 adc r5, r5, r1 | __asm ("adc r5, r5, r1");
0x00030bc4 add r1, sp, 0x1b8 | r1 += var_1b8h;
0x00030bc8 ldrd r0, r1, [r1] | __asm ("ldrd r0, r1, [r1]");
0x00030bcc eor r1, r1, r7 | r1 ^= r7;
0x00030bd0 eor r0, r0, r6 | r0 ^= r6;
0x00030bd4 mov r7, r1 | r7 = r1;
0x00030bd8 orr r1, sb, r3 | r1 = sb | r3;
0x00030bdc mov r3, r1 | r3 = r1;
0x00030be0 mov r6, r0 | r6 = r0;
0x00030be4 add r1, sp, 0x1f8 | r1 += var_1f8h;
0x00030be8 orr r0, r8, r2 | r0 = r8 | r2;
0x00030bec mov r2, r0 | r2 = r0;
0x00030bf0 ldrd r0, r1, [r1] | __asm ("ldrd r0, r1, [r1]");
0x00030bf4 ldrd r8, sb, [sp, 0x30] | __asm ("ldrd r8, sb, [var_30h]");
0x00030bf8 adds r0, r0, r4 | r0 += r4;
0x00030bfc adc r1, r1, r5 | __asm ("adc r1, r1, r5");
0x00030c00 adds r6, r6, r2 | r6 += r2;
0x00030c04 adc r7, r7, r3 | __asm ("adc r7, r7, r3");
0x00030c08 adds r8, r8, r0 | r8 += r0;
0x00030c0c adc sb, sb, r1 | __asm ("adc sb, sb, r1");
0x00030c10 adds r2, r6, r0 | r2 = r6 + r0;
0x00030c14 adc r3, r7, r1 | __asm ("adc r3, r7, r1");
0x00030c18 strd r2, r3, [sp, 0x10] | __asm ("strd r2, r3, [var_10h]");
0x00030c1c ldr r2, [sp, 0x220] | r2 = var_220h;
0x00030c20 ldr r3, [sp, 0x1c4] | r3 = var_1c4h;
0x00030c24 strd r8, sb, [sp, 0x18] | __asm ("strd r8, sb, [var_18h]");
0x00030c28 cmp r2, r3 |
0x00030c2c bne 0x2fc6c |
| }
0x00030c30 add r3, sp, 0x228 | r3 += var_228h;
0x00030c34 ldrd r6, r7, [sp, 0x10] | __asm ("ldrd r6, r7, [var_10h]");
0x00030c38 ldr ip, [sp, 0x224] | ip = var_224h;
0x00030c3c ldrd r2, r3, [r3] | __asm ("ldrd r2, r3, [r3]");
0x00030c40 ldrd r8, sb, [sp] | __asm ("ldrd r8, sb, [sp]");
0x00030c44 adds r2, r2, r6 | r2 += r6;
0x00030c48 adc r3, r3, r7 | __asm ("adc r3, r3, r7");
0x00030c4c strd r2, r3, [sp] | __asm ("strd r2, r3, [sp]");
0x00030c50 add r3, sp, 0x230 | r3 += var_230h;
0x00030c54 ldrd r0, r1, [r3] | __asm ("ldrd r0, r1, [r3]");
0x00030c58 ldrd r4, r5, [sp, 0x28] | __asm ("ldrd r4, r5, [var_28h]");
0x00030c5c add r3, sp, 0x238 | r3 += var_238h;
0x00030c60 adds r0, r0, r4 | r0 += r4;
0x00030c64 ldrd r6, r7, [sp, 0x20] | __asm ("ldrd r6, r7, [var_20h]");
0x00030c68 adc r1, r1, r5 | __asm ("adc r1, r1, r5");
0x00030c6c ldrd r4, r5, [r3] | __asm ("ldrd r4, r5, [r3]");
0x00030c70 add r3, sp, 0x240 | r3 += var_240h;
0x00030c74 adds r4, r4, r6 | r4 += r6;
0x00030c78 adc r5, r5, r7 | __asm ("adc r5, r5, r7");
0x00030c7c ldrd r6, r7, [r3] | __asm ("ldrd r6, r7, [r3]");
0x00030c80 add r3, sp, 0x200 | r3 += var_200h;
0x00030c84 adds r6, r6, r8 | r6 += r8;
0x00030c88 adc r7, r7, sb | __asm ("adc r7, r7, sb");
0x00030c8c ldrd r8, sb, [r3] | __asm ("ldrd r8, sb, [r3]");
0x00030c90 ldrd r2, r3, [sp, 0x18] | __asm ("ldrd r2, r3, [var_18h]");
0x00030c94 strd r0, r1, [sp, 0x10] | __asm ("strd r0, r1, [var_10h]");
0x00030c98 adds r8, r8, r2 | r8 += r2;
0x00030c9c adc sb, sb, r3 | __asm ("adc sb, sb, r3");
0x00030ca0 add r3, sp, 0x208 | r3 += var_208h;
0x00030ca4 ldrd r0, r1, [r3] | __asm ("ldrd r0, r1, [r3]");
0x00030ca8 ldrd r2, r3, [sp, 8] | __asm ("ldrd r2, r3, [var_ch]");
0x00030cac strd r4, r5, [sp, 0x20] | __asm ("strd r4, r5, [var_20h]");
0x00030cb0 adds r0, r0, r2 | r0 += r2;
0x00030cb4 adc r1, r1, r3 | __asm ("adc r1, r1, r3");
0x00030cb8 add r3, sp, 0x210 | r3 += var_210h;
0x00030cbc ldrd r4, r5, [r3] | __asm ("ldrd r4, r5, [r3]");
0x00030cc0 add r3, sp, 0x218 | r3 += var_218h;
0x00030cc4 adds r4, r4, sl | r4 += sl;
0x00030cc8 adc r5, r5, fp | __asm ("adc r5, r5, fp");
0x00030ccc ldrd r2, r3, [r3] | __asm ("ldrd r2, r3, [r3]");
0x00030cd0 ldrd sl, fp, [sp, 0x38] | __asm ("ldrd sl, fp, [var_38h]");
0x00030cd4 strd r6, r7, [ip, 0x28] | __asm ("strd r6, r7, [ip, 0x28]");
0x00030cd8 adds r2, r2, sl | r2 += sl;
0x00030cdc adc r3, r3, fp | __asm ("adc r3, r3, fp");
0x00030ce0 ldrd sl, fp, [sp] | __asm ("ldrd sl, fp, [sp]");
0x00030ce4 strd r8, sb, [ip, 0x30] | __asm ("strd r8, sb, [ip, 0x30]");
0x00030ce8 strd sl, fp, [ip, 0x10] | __asm ("strd sl, fp, [ip, 0x10]");
0x00030cec ldrd sl, fp, [sp, 0x10] | __asm ("ldrd sl, fp, [var_10h]");
0x00030cf0 strd r0, r1, [ip, 0x38] | __asm ("strd r0, r1, [ip, 0x38]");
0x00030cf4 strd sl, fp, [ip, 0x18] | __asm ("strd sl, fp, [ip, 0x18]");
0x00030cf8 ldrd sl, fp, [sp, 0x20] | __asm ("ldrd sl, fp, [var_20h]");
0x00030cfc strd r4, r5, [ip, 0x40] | __asm ("strd r4, r5, [ip, 0x40]");
0x00030d00 strd sl, fp, [ip, 0x20] | __asm ("strd sl, fp, [ip, 0x20]");
0x00030d04 strd r2, r3, [ip, 0x48] | __asm ("strd r2, r3, [ip, 0x48]");
0x00030d08 add sp, sp, 0x4c0 |
0x00030d0c add sp, sp, 0xc |
0x00030d10 pop {r4, r5, r6, r7, r8, sb, sl, fp, pc} |
| }
[*] Function fprintf used 1 times libmbedcrypto.so.2.2.1
