[*] Binary protection state of libgstartpec.so
Full RELRO No Canary found NX disabled DSO No RPATH No RUNPATH No Symbols
[*] Function strcat tear down of libgstartpec.so
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/unblob_extracted/firmware_extract/4325012-58052244.squashfs_v4_le_extract/usr/lib/gstreamer-1.0/libgstartpec.so @ 0x3894 */
| #include <stdint.h>
|
; (fcn) entry.fini0 () | void entry_fini0 () {
0x00003894 lui gp, 3 |
0x00003898 addiu gp, gp, -0x6844 |
0x0000389c addu gp, gp, t9 | gp += t9;
0x000038a0 addiu sp, sp, -0x20 |
0x000038a4 sw s0, 0x18(sp) | *(var_18h) = s0;
0x000038a8 lw s0, -0x7fe4(gp) | s0 = *((gp - 8185));
0x000038ac sw gp, 0x10(sp) | *(var_10h) = gp;
0x000038b0 sw ra, 0x1c(sp) | *(var_1ch) = ra;
0x000038b4 lbu v0, 0x54c0(s0) | v0 = *((s0 + 21696));
0x000038b8 lw v0, -0x7d8c(gp) | v0 = *((gp - 8035));
| if (v0 == 0) {
0x000038bc bnez v0, 0x38f0 |
0x000038c0 lw v0, -0x7fe0(gp) | v0 = *((gp - 8184));
| if (v0 != 0) {
0x000038c4 beqz v0, 0x38d8 |
0x000038c8 lw t9, -0x7d8c(gp) | t9 = *((gp - 8035));
0x000038cc lw a0, (v0) | a0 = *(v0);
0x000038d0 jalr t9 | t9 ();
0x000038d4 lw gp, 0x10(sp) | gp = *(var_10h);
| }
0x000038d8 lw t9, -0x7fdc(gp) | t9 = *((gp - 8183));
0x000038dc addiu t9, t9, 0x3810 | t9 += entry0;
0x000038e0 bal 0x3810 | entry0 ();
0x000038e4 nop |
0x000038e8 addiu v0, zero, 1 | v0 = 1;
0x000038ec sb v0, 0x54c0(s0) | *((s0 + 21696)) = v0;
| }
0x000038f0 lw ra, 0x1c(sp) | ra = *(var_1ch);
0x000038f4 lw s0, 0x18(sp) | s0 = *(var_18h);
0x000038f8 addiu sp, sp, 0x20 |
0x000038fc jr ra | return v0;
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/unblob_extracted/firmware_extract/4325012-58052244.squashfs_v4_le_extract/usr/lib/gstreamer-1.0/libgstartpec.so @ 0xe540 */
| #include <stdint.h>
|
; (fcn) fcn.0000e540 () | void fcn_0000e540 () {
0x0000e540 lui gp, 2 |
0x0000e544 addiu gp, gp, -0x14f0 |
0x0000e548 addu gp, gp, t9 | gp += t9;
0x0000e54c addiu sp, sp, -0x38 |
0x0000e550 sw gp, 0x18(sp) | *(var_18h_2) = gp;
0x0000e554 sw ra, 0x34(sp) | *(var_34h) = ra;
0x0000e558 sw s3, 0x30(sp) | *(var_30h) = s3;
0x0000e55c sw s2, 0x2c(sp) | *(var_2ch) = s2;
0x0000e560 sw s1, 0x28(sp) | *(var_28h) = s1;
0x0000e564 sw s0, 0x24(sp) | *(var_24h) = s0;
0x0000e568 move s3, a0 | s3 = a0;
| if (a0 == 0) {
0x0000e56c beqz a0, 0xe600 | goto label_10;
| }
0x0000e570 lw a0, (a0) | a0 = *(a0);
0x0000e574 move s2, a1 | s2 = a1;
| if (a0 == 0) {
0x0000e578 beqz a0, 0xe628 | goto label_11;
| }
0x0000e57c move s1, zero | s1 = 0;
| if (a1 == 0) {
0x0000e580 beqz a1, 0xe5d4 | goto label_12;
| }
0x0000e584 sll s0, s1, 2 | s0 = s1 << 2;
| do {
0x0000e588 lwx s0, s0(a0) | __asm ("lwx s0, s0(a0)");
0x0000e58c lw t9, -0x7ee8(gp) | t9 = *((gp - 8122));
| if (s0 != 0) {
0x0000e590 beqz s0, 0xe5c8 |
0x0000e594 jalr t9 | t9 ();
0x0000e598 nop |
0x0000e59c lw gp, 0x18(sp) | gp = *(var_18h_2);
0x0000e5a0 move a1, v0 | a1 = v0;
0x0000e5a4 lw t9, -0x7e2c(gp) | t9 = *((gp - 8075));
0x0000e5a8 move a0, s0 | a0 = s0;
0x0000e5ac jalr t9 | t9 ();
0x0000e5b0 lw gp, 0x18(sp) | gp = *(var_18h_2);
0x0000e5b4 lw t9, -0x7f2c(gp) | t9 = *((gp - 8139));
0x0000e5b8 move a0, v0 | a0 = v0;
0x0000e5bc jalr t9 | t9 ();
0x0000e5c0 lw gp, 0x18(sp) | gp = *(var_18h_2);
0x0000e5c4 lw a0, (s3) | a0 = *(s3);
| }
0x0000e5c8 addiu s1, s1, 1 | s1++;
0x0000e5cc sll s0, s1, 2 | s0 = s1 << 2;
0x0000e5d0 bne s2, s1, 0xe588 |
| } while (s2 != s1);
| label_12:
0x0000e5d4 lw t9, -0x7bac(gp) | t9 = *((gp - 7915));
0x0000e5d8 jalr t9 | t9 ();
0x0000e5dc nop |
0x0000e5e0 lw ra, 0x34(sp) | ra = *(var_34h);
0x0000e5e4 sw zero, (s3) | *(s3) = 0;
0x0000e5e8 lw s2, 0x2c(sp) | s2 = *(var_2ch);
0x0000e5ec lw s3, 0x30(sp) | s3 = *(var_30h);
0x0000e5f0 lw s1, 0x28(sp) | s1 = *(var_28h);
0x0000e5f4 lw s0, 0x24(sp) | s0 = *(var_24h);
0x0000e5f8 addiu sp, sp, 0x38 |
0x0000e5fc jr ra | return v0;
| label_10:
0x0000e600 lw v0, -0x7fd8(gp) | v0 = *((gp - 8182));
0x0000e604 lw a3, -0x7fd8(gp) | a3 = *((gp - 8182));
0x0000e608 lw a1, -0x7fd8(gp) | a1 = *((gp - 8182));
0x0000e60c addiu v0, v0, 0x4158 | v0 += 0x4158;
0x0000e610 lw t9, -0x7d14(gp) | t9 = *((gp - 8005));
0x0000e614 sw v0, 0x10(sp) | *(var_10h_2) = v0;
0x0000e618 addiu a3, a3, 0x4a88 | a3 += 0x4a88;
0x0000e61c addiu a2, zero, 0x8e | a2 = 0x8e;
0x0000e620 addiu a1, a1, 0x49dc | a1 += 0x49dc;
0x0000e624 jalr t9 | t9 ();
| label_11:
0x0000e628 lw v0, -0x7fd8(gp) | v0 = *((gp - 8182));
0x0000e62c lw a3, -0x7fd8(gp) | a3 = *((gp - 8182));
0x0000e630 lw a1, -0x7fd8(gp) | a1 = *((gp - 8182));
0x0000e634 addiu v0, v0, 0x4a28 | v0 += 0x4a28;
0x0000e638 lw t9, -0x7d14(gp) | t9 = *((gp - 8005));
0x0000e63c sw v0, 0x10(sp) | *(var_10h_2) = v0;
0x0000e640 addiu a3, a3, 0x4a88 | a3 += 0x4a88;
0x0000e644 addiu a2, zero, 0x8f | a2 = 0x8f;
0x0000e648 addiu a1, a1, 0x49dc | a1 += 0x49dc;
0x0000e64c move a0, zero | a0 = 0;
0x0000e650 jalr t9 | t9 ();
0x0000e654 lui gp, 2 |
0x0000e658 addiu gp, gp, -0x1604 |
0x0000e65c addu gp, gp, t9 | gp += t9;
| if (a0 != 0) {
0x0000e660 beql a0, zero, 0xe670 |
0x0000e664 lw v0, -0x7fd8(gp) | v0 = *((gp - 8182));
0x0000e668 lw v0, 0x40(a0) | v0 = *((a0 + 16));
0x0000e66c jr ra | return v0;
| }
0x0000e670 addiu sp, sp, -0x28 |
0x0000e674 lw a3, -0x7fd8(gp) | a3 = *((gp - 8182));
0x0000e678 lw a1, -0x7fd8(gp) | a1 = *((gp - 8182));
0x0000e67c addiu v0, v0, 0x49c8 | v0 += 0x49c8;
0x0000e680 lw t9, -0x7d14(gp) | t9 = *((gp - 8005));
0x0000e684 addiu a3, a3, 0x4a64 | a3 += 0x4a64;
0x0000e688 sw gp, 0x18(sp) | *(var_18h_3) = gp;
0x0000e68c sw ra, 0x24(sp) | *(var_24h_2) = ra;
0x0000e690 sw v0, 0x10(sp) | *(var_10h_3) = v0;
0x0000e694 addiu a2, zero, 0x9d | a2 = 0x9d;
0x0000e698 addiu a1, a1, 0x49dc | a1 += 0x49dc;
0x0000e69c jalr t9 | t9 ();
0x0000e6a0 lui gp, 2 |
0x0000e6a4 addiu gp, gp, -0x1650 |
0x0000e6a8 addu gp, gp, t9 | gp += t9;
| if (a0 != 0) {
0x0000e6ac beql a0, zero, 0xe6bc |
0x0000e6b0 lw v0, -0x7fd8(gp) | v0 = *((gp - 8182));
0x0000e6b4 lw v0, 0x44(a0) | v0 = *((a0 + 17));
0x0000e6b8 jr ra | return v0;
| }
0x0000e6bc addiu sp, sp, -0x28 |
0x0000e6c0 lw a3, -0x7fd8(gp) | a3 = *((gp - 8182));
0x0000e6c4 lw a1, -0x7fd8(gp) | a1 = *((gp - 8182));
0x0000e6c8 addiu v0, v0, 0x49c8 | v0 += 0x49c8;
0x0000e6cc lw t9, -0x7d14(gp) | t9 = *((gp - 8005));
0x0000e6d0 addiu a3, a3, 0x4a40 | a3 += 0x4a40;
0x0000e6d4 sw gp, 0x18(sp) | *(var_18h_4) = gp;
0x0000e6d8 sw ra, 0x24(sp) | *(var_24h_3) = ra;
0x0000e6dc sw v0, 0x10(sp) | *(var_10h_4) = v0;
0x0000e6e0 addiu a2, zero, 0xa4 | a2 = 0xa4;
0x0000e6e4 addiu a1, a1, 0x49dc | a1 += 0x49dc;
0x0000e6e8 jalr t9 | t9 ();
0x0000e6ec nop |
0x0000e6f0 negu v0, a0 | __asm ("negu v0, a0");
| if (a1 < 0) {
0x0000e6f4 bltz a1, 0xe918 | goto label_13;
| }
0x0000e6f8 move t0, zero | t0 = 0;
| label_1:
0x0000e6fc move t1, a2 | t1 = a2;
| if (a3 < 0) {
0x0000e700 bgez a3, 0xe720 |
0x0000e704 negu v0, a2 | __asm ("negu v0, a2");
0x0000e708 sltu v1, zero, v0 | v1 = (0 < v0) ? 1 : 0;
0x0000e70c negu a3, a3 | __asm ("negu a3, a3");
0x0000e710 nor t0, zero, t0 | __asm ("nor t0, zero, t0");
0x0000e714 move a2, v0 | a2 = v0;
0x0000e718 subu a3, a3, v1 | __asm ("subu a3, a3, v1");
0x0000e71c move t1, a2 | t1 = a2;
| }
0x0000e720 move t2, a0 | t2 = a0;
0x0000e724 move v1, a1 | v1 = a1;
| if (a3 != 0) {
0x0000e728 bnez a3, 0xe8e8 | goto label_14;
| }
0x0000e72c sltu v0, a1, a2 | v0 = (a1 < a2) ? 1 : 0;
0x0000e730 clz v0, a2 | __asm ("clz v0, a2");
| if (v0 == 0) {
0x0000e734 beqz v0, 0xe80c | goto label_15;
| }
| if (v0 != 0) {
0x0000e738 beql v0, zero, 0xe75c |
0x0000e73c srl a1, t1, 0x10 | a1 = t1 >> 0x10;
0x0000e740 negu a0, v0 | __asm ("negu a0, v0");
0x0000e744 srlv a0, t2, a0 | a0 = t2 >> a0;
0x0000e748 sllv v1, a1, v0 | v1 = a1 << v0;
0x0000e74c sllv t1, a2, v0 | t1 = a2 << v0;
0x0000e750 or v1, a0, v1 | v1 = a0 | v1;
0x0000e754 sllv t2, t2, v0 | t2 <<= v0;
0x0000e758 srl a1, t1, 0x10 | a1 = t1 >> 0x10;
| }
0x0000e75c divu zero, v1, a1 | __asm ("divu zero, v1, a1");
0x0000e760 teq a1, zero, 7 | __asm ("teq a1, zero, 7");
0x0000e764 andi a2, t1, 0xffff | a2 = t1 & 0xffff;
0x0000e768 srl v0, t2, 0x10 | v0 = t2 >> 0x10;
0x0000e76c mflo v1 | __asm ("mflo v1");
0x0000e770 mfhi a0 | __asm ("mfhi a0");
0x0000e774 mul a3, a2, v1 | __asm ("mul a3, a2, v1");
0x0000e778 sll a0, a0, 0x10 | a0 <<= 0x10;
0x0000e77c or v0, a0, v0 | v0 = a0 | v0;
0x0000e780 sltu a0, v0, a3 | a0 = (v0 < a3) ? 1 : 0;
| if (a0 != 0) {
0x0000e784 beql a0, zero, 0xe7b4 |
0x0000e788 subu v0, v0, a3 | __asm ("subu v0, v0, a3");
0x0000e78c addu v0, v0, t1 | v0 += t1;
0x0000e790 sltu a0, v0, t1 | a0 = (v0 < t1) ? 1 : 0;
0x0000e794 addiu t3, v1, -1 | t3 = v1 + -1;
| if (a0 != 0) {
0x0000e798 bnez a0, 0xeb28 | goto label_16;
| }
0x0000e79c sltu a0, v0, a3 | a0 = (v0 < a3) ? 1 : 0;
| if (a0 != 0) {
0x0000e7a0 beql a0, zero, 0xe7b0 |
0x0000e7a4 move v1, t3 | v1 = t3;
0x0000e7a8 addiu v1, v1, -2 | v1 += -2;
0x0000e7ac addu v0, v0, t1 | v0 += t1;
| }
| label_4:
0x0000e7b0 subu v0, v0, a3 | __asm ("subu v0, v0, a3");
| }
0x0000e7b4 divu zero, v0, a1 | __asm ("divu zero, v0, a1");
0x0000e7b8 teq a1, zero, 7 | __asm ("teq a1, zero, 7");
0x0000e7bc andi t2, t2, 0xffff | t2 &= 0xffff;
0x0000e7c0 mflo v0 | __asm ("mflo v0");
0x0000e7c4 mfhi a1 | __asm ("mfhi a1");
0x0000e7c8 mul a2, a2, v0 | __asm ("mul a2, a2, v0");
0x0000e7cc sll a1, a1, 0x10 | a1 <<= 0x10;
0x0000e7d0 or t2, a1, t2 | t2 = a1 | t2;
0x0000e7d4 sltu a0, t2, a2 | a0 = (t2 < a2) ? 1 : 0;
0x0000e7d8 addu t2, t1, t2 | t2 = t1 + t2;
| if (a0 == 0) {
0x0000e7dc bnel a0, zero, 0xeb08 | goto label_17;
| }
| label_3:
0x0000e7e0 sll v1, v1, 0x10 | v1 <<= 0x10;
0x0000e7e4 or v0, v1, v0 | v0 = v1 | v0;
0x0000e7e8 move v1, zero | v1 = 0;
| do {
| if (t0 != 0) {
| label_0:
0x0000e7ec beqz t0, 0xe804 |
0x0000e7f0 nop |
0x0000e7f4 negu v0, v0 | __asm ("negu v0, v0");
0x0000e7f8 sltu a0, zero, v0 | a0 = (0 < v0) ? 1 : 0;
0x0000e7fc negu v1, v1 | __asm ("negu v1, v1");
0x0000e800 subu v1, v1, a0 | __asm ("subu v1, v1, a0");
| }
0x0000e804 jr ra | return v0;
0x0000e808 nop |
| label_15:
0x0000e80c clz t4, t1 | __asm ("clz t4, t1");
| if (a2 == 0) {
0x0000e810 bnez a2, 0xe828 |
0x0000e814 addiu t1, zero, 1 | t1 = 1;
0x0000e818 divu zero, t1, a3 | __asm ("divu zero, t1, a3");
0x0000e81c teq a3, zero, 7 | __asm ("teq a3, zero, 7");
0x0000e820 mflo t1 | __asm ("mflo t1");
0x0000e824 clz t4, t1 | __asm ("clz t4, t1");
| }
0x0000e828 addiu t2, zero, 0x20 | t2 = 0x20;
| if (t4 == 0) {
0x0000e82c bnel t4, zero, 0xea34 | goto label_18;
| }
0x0000e830 subu a1, a1, t1 | __asm ("subu a1, a1, t1");
0x0000e834 srl a2, t1, 0x10 | a2 = t1 >> 0x10;
0x0000e838 andi a3, t1, 0xffff | a3 = t1 & 0xffff;
0x0000e83c addiu v1, zero, 1 | v1 = 1;
| label_2:
0x0000e840 divu zero, a1, a2 | __asm ("divu zero, a1, a2");
0x0000e844 teq a2, zero, 7 | __asm ("teq a2, zero, 7");
0x0000e848 srl v0, t2, 0x10 | v0 = t2 >> 0x10;
0x0000e84c mflo a1 | __asm ("mflo a1");
0x0000e850 mfhi a0 | __asm ("mfhi a0");
0x0000e854 mul t3, a1, a3 | __asm ("mul t3, a1, a3");
0x0000e858 sll a0, a0, 0x10 | a0 <<= 0x10;
0x0000e85c or v0, a0, v0 | v0 = a0 | v0;
0x0000e860 sltu a0, v0, t3 | a0 = (v0 < t3) ? 1 : 0;
| if (a0 != 0) {
0x0000e864 beql a0, zero, 0xe890 |
0x0000e868 subu v0, v0, t3 | __asm ("subu v0, v0, t3");
0x0000e86c addu v0, v0, t1 | v0 += t1;
0x0000e870 sltu a0, v0, t1 | a0 = (v0 < t1) ? 1 : 0;
0x0000e874 addiu t4, a1, -1 | t4 = a1 + -1;
| if (a0 == 0) {
0x0000e878 bnez a0, 0xe888 |
0x0000e87c sltu a0, v0, t3 | a0 = (v0 < t3) ? 1 : 0;
0x0000e880 addiu a1, a1, -2 | a1 += -2;
| if (a0 != 0) {
0x0000e884 bnez a0, 0xeb80 | goto label_19;
| }
| }
0x0000e888 move a1, t4 | a1 = t4;
| label_9:
0x0000e88c subu v0, v0, t3 | __asm ("subu v0, v0, t3");
| }
0x0000e890 divu zero, v0, a2 | __asm ("divu zero, v0, a2");
0x0000e894 teq a2, zero, 7 | __asm ("teq a2, zero, 7");
0x0000e898 andi t2, t2, 0xffff | t2 &= 0xffff;
0x0000e89c mflo v0 | __asm ("mflo v0");
0x0000e8a0 mfhi a2 | __asm ("mfhi a2");
0x0000e8a4 mul a3, v0, a3 | __asm ("mul a3, v0, a3");
0x0000e8a8 sll a2, a2, 0x10 | a2 <<= 0x10;
0x0000e8ac or t2, a2, t2 | t2 = a2 | t2;
0x0000e8b0 sltu a0, t2, a3 | a0 = (t2 < a3) ? 1 : 0;
| if (a0 != 0) {
0x0000e8b4 beql a0, zero, 0xe8e0 |
0x0000e8b8 sll a1, a1, 0x10 | a1 <<= 0x10;
0x0000e8bc addu t2, t1, t2 | t2 = t1 + t2;
0x0000e8c0 sltu a0, t2, t1 | a0 = (t2 < t1) ? 1 : 0;
0x0000e8c4 addiu a2, v0, -1 | a2 = v0 + -1;
| if (a0 != 0) {
0x0000e8c8 bnez a0, 0xeb30 | goto label_20;
| }
0x0000e8cc sltu t2, t2, a3 | t2 = (t2 < a3) ? 1 : 0;
| if (t2 == 0) {
0x0000e8d0 beql t2, zero, 0xeb34 | goto label_21;
| }
0x0000e8d4 move v0, a2 | v0 = a2;
0x0000e8d8 addiu v0, v0, -2 | v0 += -2;
0x0000e8dc sll a1, a1, 0x10 | a1 <<= 0x10;
| }
0x0000e8e0 or v0, a1, v0 | v0 = a1 | v0;
0x0000e8e4 b 0xe7ec |
| } while (1);
| label_14:
0x0000e8e8 sltu v0, a1, a3 | v0 = (a1 < a3) ? 1 : 0;
0x0000e8ec move v1, zero | v1 = 0;
| if (v0 != 0) {
0x0000e8f0 bnez v0, 0xe930 | goto label_22;
| }
0x0000e8f4 clz v1, a3 | __asm ("clz v1, a3");
0x0000e8f8 addiu t1, zero, 0x20 | t1 = 0x20;
| if (v1 != 0) {
0x0000e8fc bnez v1, 0xe938 | goto label_23;
| }
0x0000e900 sltu a1, a3, a1 | a1 = (a3 < a1) ? 1 : 0;
0x0000e904 addiu v0, zero, 1 | v0 = 1;
| if (a1 == 0) {
0x0000e908 bnel a1, zero, 0xe7ec | goto label_0;
| }
0x0000e90c sltu v0, a0, a2 | v0 = (a0 < a2) ? 1 : 0;
0x0000e910 xori v0, v0, 1 | v0 ^= 1;
0x0000e914 b 0xe7ec | goto label_0;
| label_13:
0x0000e918 sltu v1, zero, v0 | v1 = (0 < v0) ? 1 : 0;
0x0000e91c negu a1, a1 | __asm ("negu a1, a1");
0x0000e920 move a0, v0 | a0 = v0;
0x0000e924 subu a1, a1, v1 | __asm ("subu a1, a1, v1");
0x0000e928 addiu t0, zero, -1 | t0 = -1;
0x0000e92c b 0xe6fc | goto label_1;
| label_22:
0x0000e930 move v0, zero | v0 = 0;
0x0000e934 b 0xe7ec | goto label_0;
| label_23:
0x0000e938 subu t1, t1, v1 | __asm ("subu t1, t1, v1");
0x0000e93c srlv t3, a2, t1 | t3 = a2 >> t1;
0x0000e940 sllv a3, a3, v1 | a3 <<= v1;
0x0000e944 or t3, t3, a3 | t3 |= a3;
0x0000e948 srl v0, t3, 0x10 | v0 = t3 >> 0x10;
0x0000e94c srlv a3, a1, t1 | a3 = a1 >> t1;
0x0000e950 divu zero, a3, v0 | __asm ("divu zero, a3, v0");
0x0000e954 teq v0, zero, 7 | __asm ("teq v0, zero, 7");
0x0000e958 andi t4, t3, 0xffff | t4 = t3 & 0xffff;
0x0000e95c srlv t1, a0, t1 | t1 = a0 >> t1;
0x0000e960 sllv a1, a1, v1 | a1 <<= v1;
0x0000e964 or a1, t1, a1 | a1 = t1 | a1;
0x0000e968 srl t1, a1, 0x10 | t1 = a1 >> 0x10;
0x0000e96c mflo a3 | __asm ("mflo a3");
0x0000e970 mfhi t2 | __asm ("mfhi t2");
0x0000e974 mul t5, t4, a3 | __asm ("mul t5, t4, a3");
0x0000e978 sll t2, t2, 0x10 | t2 <<= 0x10;
0x0000e97c or t1, t2, t1 | t1 = t2 | t1;
0x0000e980 sltu t2, t1, t5 | t2 = (t1 < t5) ? 1 : 0;
0x0000e984 sllv a2, a2, v1 | a2 <<= v1;
| if (t2 != 0) {
0x0000e988 beqz t2, 0xe9b0 |
0x0000e98c addu t1, t1, t3 | t1 += t3;
0x0000e990 sltu t2, t1, t3 | t2 = (t1 < t3) ? 1 : 0;
0x0000e994 addiu t6, a3, -1 | t6 = a3 + -1;
| if (t2 != 0) {
0x0000e998 bnez t2, 0xeb78 | goto label_24;
| }
0x0000e99c sltu t2, t1, t5 | t2 = (t1 < t5) ? 1 : 0;
| if (t2 == 0) {
0x0000e9a0 beql t2, zero, 0xe9b0 | goto label_8;
| }
0x0000e9a4 move a3, t6 | a3 = t6;
0x0000e9a8 addiu a3, a3, -2 | a3 += -2;
0x0000e9ac addu t1, t1, t3 | t1 += t3;
| }
| label_8:
0x0000e9b0 subu t1, t1, t5 | __asm ("subu t1, t1, t5");
0x0000e9b4 divu zero, t1, v0 | __asm ("divu zero, t1, v0");
0x0000e9b8 teq v0, zero, 7 | __asm ("teq v0, zero, 7");
0x0000e9bc andi a1, a1, 0xffff | a1 &= 0xffff;
0x0000e9c0 mflo v0 | __asm ("mflo v0");
0x0000e9c4 mfhi t1 | __asm ("mfhi t1");
0x0000e9c8 mul t2, t4, v0 | __asm ("mul t2, t4, v0");
0x0000e9cc sll t1, t1, 0x10 | t1 <<= 0x10;
0x0000e9d0 or a1, t1, a1 | a1 = t1 | a1;
0x0000e9d4 sltu t1, a1, t2 | t1 = (a1 < t2) ? 1 : 0;
| if (t1 != 0) {
0x0000e9d8 beql t1, zero, 0xea08 |
0x0000e9dc sll a3, a3, 0x10 | a3 <<= 0x10;
0x0000e9e0 addu a1, a1, t3 | a1 += t3;
0x0000e9e4 sltu t1, a1, t3 | t1 = (a1 < t3) ? 1 : 0;
0x0000e9e8 addiu t4, v0, -1 | t4 = v0 + -1;
| if (t1 != 0) {
0x0000e9ec bnez t1, 0xeb68 | goto label_25;
| }
0x0000e9f0 sltu t1, a1, t2 | t1 = (a1 < t2) ? 1 : 0;
| if (t1 != 0) {
0x0000e9f4 beql t1, zero, 0xea04 |
0x0000e9f8 move v0, t4 | v0 = t4;
0x0000e9fc addiu v0, v0, -2 | v0 += -2;
0x0000ea00 addu a1, a1, t3 | a1 += t3;
| }
| label_6:
0x0000ea04 sll a3, a3, 0x10 | a3 <<= 0x10;
| }
0x0000ea08 or v0, a3, v0 | v0 = a3 | v0;
0x0000ea0c multu v0, a2 | __asm ("multu v0, a2");
0x0000ea10 mfhi a3 | __asm ("mfhi a3");
0x0000ea14 subu a1, a1, t2 | __asm ("subu a1, a1, t2");
0x0000ea18 sltu t1, a1, a3 | t1 = (a1 < a3) ? 1 : 0;
0x0000ea1c mflo a2 | __asm ("mflo a2");
| if (t1 != 0) {
0x0000ea20 bnez t1, 0xeb54 | goto label_26;
| }
| if (a1 == a3) {
0x0000ea24 beql a1, a3, 0xeb48 | goto label_27;
| }
0x0000ea28 sllv v1, a0, v1 | v1 = a0 << v1;
0x0000ea2c move v1, zero | v1 = 0;
0x0000ea30 b 0xe7ec | goto label_0;
| label_18:
0x0000ea34 subu t2, t2, t4 | __asm ("subu t2, t2, t4");
0x0000ea38 sllv t1, t1, t4 | t1 <<= t4;
0x0000ea3c srlv v0, a1, t2 | v0 = a1 >> t2;
0x0000ea40 srl a2, t1, 0x10 | a2 = t1 >> 0x10;
0x0000ea44 divu zero, v0, a2 | __asm ("divu zero, v0, a2");
0x0000ea48 teq a2, zero, 7 | __asm ("teq a2, zero, 7");
0x0000ea4c sllv a1, a1, t4 | a1 <<= t4;
0x0000ea50 srlv t2, a0, t2 | t2 = a0 >> t2;
0x0000ea54 andi a3, t1, 0xffff | a3 = t1 & 0xffff;
0x0000ea58 or t3, t2, a1 | t3 = t2 | a1;
0x0000ea5c srl v1, t3, 0x10 | v1 = t3 >> 0x10;
0x0000ea60 mflo t5 | __asm ("mflo t5");
0x0000ea64 mfhi v0 | __asm ("mfhi v0");
0x0000ea68 mul a1, a3, t5 | __asm ("mul a1, a3, t5");
0x0000ea6c sll v0, v0, 0x10 | v0 <<= 0x10;
0x0000ea70 or v0, v0, v1 | v0 |= v1;
0x0000ea74 sltu v1, v0, a1 | v1 = (v0 < a1) ? 1 : 0;
0x0000ea78 sllv t2, a0, t4 | t2 = a0 << t4;
| if (v1 != 0) {
0x0000ea7c beqz v1, 0xeaa4 |
0x0000ea80 addu v0, v0, t1 | v0 += t1;
0x0000ea84 sltu v1, v0, t1 | v1 = (v0 < t1) ? 1 : 0;
0x0000ea88 addiu a0, t5, -1 | a0 = t5 + -1;
| if (v1 != 0) {
0x0000ea8c bnez v1, 0xeb70 | goto label_28;
| }
0x0000ea90 sltu v1, v0, a1 | v1 = (v0 < a1) ? 1 : 0;
| if (v1 == 0) {
0x0000ea94 beql v1, zero, 0xeaa4 | goto label_7;
| }
0x0000ea98 move t5, a0 | t5 = a0;
0x0000ea9c addiu t5, t5, -2 | t5 += -2;
0x0000eaa0 addu v0, v0, t1 | v0 += t1;
| }
| label_7:
0x0000eaa4 subu a1, v0, a1 | __asm ("subu a1, v0, a1");
0x0000eaa8 divu zero, a1, a2 | __asm ("divu zero, a1, a2");
0x0000eaac teq a2, zero, 7 | __asm ("teq a2, zero, 7");
0x0000eab0 andi t3, t3, 0xffff | t3 &= 0xffff;
0x0000eab4 mflo v1 | __asm ("mflo v1");
0x0000eab8 mfhi a1 | __asm ("mfhi a1");
0x0000eabc mul a0, a3, v1 | __asm ("mul a0, a3, v1");
0x0000eac0 sll a1, a1, 0x10 | a1 <<= 0x10;
0x0000eac4 or a1, a1, t3 | a1 |= t3;
0x0000eac8 sltu v0, a1, a0 | v0 = (a1 < a0) ? 1 : 0;
0x0000eacc sll v0, t5, 0x10 | v0 = t5 << 0x10;
| if (v0 != 0) {
0x0000ead0 beqz v0, 0xeafc |
0x0000ead4 addu a1, a1, t1 | a1 += t1;
0x0000ead8 sltu v0, a1, t1 | v0 = (a1 < t1) ? 1 : 0;
0x0000eadc addiu t3, v1, -1 | t3 = v1 + -1;
| if (v0 != 0) {
0x0000eae0 bnez v0, 0xeb60 | goto label_29;
| }
0x0000eae4 sltu v0, a1, a0 | v0 = (a1 < a0) ? 1 : 0;
| if (v0 != 0) {
0x0000eae8 beql v0, zero, 0xeaf8 |
0x0000eaec move v1, t3 | v1 = t3;
0x0000eaf0 addiu v1, v1, -2 | v1 += -2;
0x0000eaf4 addu a1, a1, t1 | a1 += t1;
| }
| label_5:
0x0000eaf8 sll v0, t5, 0x10 | v0 = t5 << 0x10;
| }
0x0000eafc subu a1, a1, a0 | __asm ("subu a1, a1, a0");
0x0000eb00 or v1, v0, v1 | v1 = v0 | v1;
0x0000eb04 b 0xe840 | goto label_2;
| label_17:
0x0000eb08 sltu a0, t2, t1 | a0 = (t2 < t1) ? 1 : 0;
0x0000eb0c addiu a1, v0, -1 | a1 = v0 + -1;
| if (a0 != 0) {
0x0000eb10 bnez a0, 0xeb40 | goto label_30;
| }
0x0000eb14 sltu t2, t2, a2 | t2 = (t2 < a2) ? 1 : 0;
| if (t2 == 0) {
0x0000eb18 beql t2, zero, 0xe7e0 | goto label_3;
| }
0x0000eb1c move v0, a1 | v0 = a1;
0x0000eb20 addiu v0, v0, -2 | v0 += -2;
0x0000eb24 b 0xe7e0 | goto label_3;
| label_16:
0x0000eb28 move v1, t3 | v1 = t3;
0x0000eb2c b 0xe7b0 | goto label_4;
| label_20:
0x0000eb30 move v0, a2 | v0 = a2;
| label_21:
0x0000eb34 sll a1, a1, 0x10 | a1 <<= 0x10;
0x0000eb38 or v0, a1, v0 | v0 = a1 | v0;
0x0000eb3c b 0xe7ec | goto label_0;
| label_30:
0x0000eb40 move v0, a1 | v0 = a1;
0x0000eb44 b 0xe7e0 | goto label_3;
| label_27:
0x0000eb48 sltu v1, v1, a2 | v1 = (v1 < a2) ? 1 : 0;
| if (v1 == 0) {
0x0000eb4c beqz v1, 0xe7ec | goto label_0;
| }
0x0000eb50 nop |
| label_26:
0x0000eb54 addiu v0, v0, -1 | v0 += -1;
0x0000eb58 move v1, zero | v1 = 0;
0x0000eb5c b 0xe7ec | goto label_0;
| label_29:
0x0000eb60 move v1, t3 | v1 = t3;
0x0000eb64 b 0xeaf8 | goto label_5;
| label_25:
0x0000eb68 move v0, t4 | v0 = t4;
0x0000eb6c b 0xea04 | goto label_6;
| label_28:
0x0000eb70 move t5, a0 | t5 = a0;
0x0000eb74 b 0xeaa4 | goto label_7;
| label_24:
0x0000eb78 move a3, t6 | a3 = t6;
0x0000eb7c b 0xe9b0 | goto label_8;
| label_19:
0x0000eb80 addu v0, v0, t1 | v0 += t1;
0x0000eb84 b 0xe88c | goto label_9;
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/unblob_extracted/firmware_extract/4325012-58052244.squashfs_v4_le_extract/usr/lib/gstreamer-1.0/libgstartpec.so @ 0xeb90 */
| #include <stdint.h>
|
; (fcn) fcn.0000eb90 () | void fcn_0000eb90 () {
0x0000eb90 move t0, a2 | t0 = a2;
0x0000eb94 move t1, a0 | t1 = a0;
0x0000eb98 move v0, a1 | v0 = a1;
| if (a3 != 0) {
0x0000eb9c bnez a3, 0xed68 | goto label_10;
| }
0x0000eba0 sltu v1, a1, a2 | v1 = (a1 < a2) ? 1 : 0;
0x0000eba4 clz v1, a2 | __asm ("clz v1, a2");
| if (v1 != 0) {
0x0000eba8 beqz v1, 0xec88 |
| if (v1 != 0) {
0x0000ebac beql v1, zero, 0xebd0 |
0x0000ebb0 srl a1, t0, 0x10 | a1 = t0 >> 0x10;
0x0000ebb4 negu a0, v1 | __asm ("negu a0, v1");
0x0000ebb8 srlv a0, t1, a0 | a0 = t1 >> a0;
0x0000ebbc sllv v0, a1, v1 | v0 = a1 << v1;
0x0000ebc0 sllv t0, a2, v1 | t0 = a2 << v1;
0x0000ebc4 or v0, a0, v0 | v0 = a0 | v0;
0x0000ebc8 sllv t1, t1, v1 | t1 <<= v1;
0x0000ebcc srl a1, t0, 0x10 | a1 = t0 >> 0x10;
| }
0x0000ebd0 divu zero, v0, a1 | __asm ("divu zero, v0, a1");
0x0000ebd4 teq a1, zero, 7 | __asm ("teq a1, zero, 7");
0x0000ebd8 andi a3, t0, 0xffff | a3 = t0 & 0xffff;
0x0000ebdc srl v1, t1, 0x10 | v1 = t1 >> 0x10;
0x0000ebe0 mflo v0 | __asm ("mflo v0");
0x0000ebe4 mfhi a0 | __asm ("mfhi a0");
0x0000ebe8 mul a2, a3, v0 | __asm ("mul a2, a3, v0");
0x0000ebec sll a0, a0, 0x10 | a0 <<= 0x10;
0x0000ebf0 or v1, a0, v1 | v1 = a0 | v1;
0x0000ebf4 sltu a0, v1, a2 | a0 = (v1 < a2) ? 1 : 0;
| if (a0 != 0) {
0x0000ebf8 beql a0, zero, 0xec28 |
0x0000ebfc subu v1, v1, a2 | __asm ("subu v1, v1, a2");
0x0000ec00 addu v1, v1, t0 | v1 += t0;
0x0000ec04 sltu a0, v1, t0 | a0 = (v1 < t0) ? 1 : 0;
0x0000ec08 addiu t2, v0, -1 | t2 = v0 + -1;
| if (a0 != 0) {
0x0000ec0c bnez a0, 0xef7c | goto label_11;
| }
0x0000ec10 sltu a0, v1, a2 | a0 = (v1 < a2) ? 1 : 0;
| if (a0 != 0) {
0x0000ec14 beql a0, zero, 0xec24 |
0x0000ec18 move v0, t2 | v0 = t2;
0x0000ec1c addiu v0, v0, -2 | v0 += -2;
0x0000ec20 addu v1, v1, t0 | v1 += t0;
| }
| label_0:
0x0000ec24 subu v1, v1, a2 | __asm ("subu v1, v1, a2");
| }
0x0000ec28 divu zero, v1, a1 | __asm ("divu zero, v1, a1");
0x0000ec2c teq a1, zero, 7 | __asm ("teq a1, zero, 7");
0x0000ec30 andi t1, t1, 0xffff | t1 &= 0xffff;
0x0000ec34 mflo v1 | __asm ("mflo v1");
0x0000ec38 mfhi a1 | __asm ("mfhi a1");
0x0000ec3c mul a3, a3, v1 | __asm ("mul a3, a3, v1");
0x0000ec40 sll a1, a1, 0x10 | a1 <<= 0x10;
0x0000ec44 or t1, a1, t1 | t1 = a1 | t1;
0x0000ec48 sltu a0, t1, a3 | a0 = (t1 < a3) ? 1 : 0;
| if (a0 != 0) {
0x0000ec4c beql a0, zero, 0xec78 |
0x0000ec50 sll v0, v0, 0x10 | v0 <<= 0x10;
0x0000ec54 addu t1, t0, t1 | t1 = t0 + t1;
0x0000ec58 sltu a0, t1, t0 | a0 = (t1 < t0) ? 1 : 0;
0x0000ec5c addiu a1, v1, -1 | a1 = v1 + -1;
| if (a0 != 0) {
0x0000ec60 bnez a0, 0xef94 | goto label_12;
| }
0x0000ec64 sltu t1, t1, a3 | t1 = (t1 < a3) ? 1 : 0;
| if (t1 != 0) {
0x0000ec68 beql t1, zero, 0xec74 |
0x0000ec6c move v1, a1 | v1 = a1;
0x0000ec70 addiu v1, v1, -2 | v1 += -2;
| }
| label_2:
0x0000ec74 sll v0, v0, 0x10 | v0 <<= 0x10;
| }
0x0000ec78 or v0, v0, v1 | v0 |= v1;
0x0000ec7c move v1, zero | v1 = 0;
| label_3:
0x0000ec80 jr ra | return v0;
0x0000ec84 nop |
| }
0x0000ec88 clz t3, t0 | __asm ("clz t3, t0");
| if (a2 == 0) {
0x0000ec8c bnez a2, 0xeca4 |
0x0000ec90 addiu v0, zero, 1 | v0 = 1;
0x0000ec94 divu zero, v0, a2 | __asm ("divu zero, v0, a2");
0x0000ec98 teq a2, zero, 7 | __asm ("teq a2, zero, 7");
0x0000ec9c mflo t0 | __asm ("mflo t0");
0x0000eca0 clz t3, t0 | __asm ("clz t3, t0");
| }
0x0000eca4 addiu t1, zero, 0x20 | t1 = 0x20;
| if (t3 == 0) {
0x0000eca8 bnel t3, zero, 0xeea8 | goto label_13;
| }
0x0000ecac subu a1, a1, t0 | __asm ("subu a1, a1, t0");
0x0000ecb0 srl a2, t0, 0x10 | a2 = t0 >> 0x10;
0x0000ecb4 andi t2, t0, 0xffff | t2 = t0 & 0xffff;
0x0000ecb8 addiu v1, zero, 1 | v1 = 1;
| do {
0x0000ecbc divu zero, a1, a2 | __asm ("divu zero, a1, a2");
0x0000ecc0 teq a2, zero, 7 | __asm ("teq a2, zero, 7");
0x0000ecc4 srl v0, t1, 0x10 | v0 = t1 >> 0x10;
0x0000ecc8 mflo a1 | __asm ("mflo a1");
0x0000eccc mfhi a0 | __asm ("mfhi a0");
0x0000ecd0 mul a3, a1, t2 | __asm ("mul a3, a1, t2");
0x0000ecd4 sll a0, a0, 0x10 | a0 <<= 0x10;
0x0000ecd8 or v0, a0, v0 | v0 = a0 | v0;
0x0000ecdc sltu a0, v0, a3 | a0 = (v0 < a3) ? 1 : 0;
| if (a0 != 0) {
0x0000ece0 beql a0, zero, 0xed0c |
0x0000ece4 subu v0, v0, a3 | __asm ("subu v0, v0, a3");
0x0000ece8 addu v0, v0, t0 | v0 += t0;
0x0000ecec sltu a0, v0, t0 | a0 = (v0 < t0) ? 1 : 0;
0x0000ecf0 addiu t3, a1, -1 | t3 = a1 + -1;
| if (a0 == 0) {
0x0000ecf4 bnez a0, 0xed04 |
0x0000ecf8 sltu a0, v0, a3 | a0 = (v0 < a3) ? 1 : 0;
0x0000ecfc addiu a1, a1, -2 | a1 += -2;
| if (a0 != 0) {
0x0000ed00 bnez a0, 0xefdc | goto label_14;
| }
| }
0x0000ed04 move a1, t3 | a1 = t3;
| label_9:
0x0000ed08 subu v0, v0, a3 | __asm ("subu v0, v0, a3");
| }
0x0000ed0c divu zero, v0, a2 | __asm ("divu zero, v0, a2");
0x0000ed10 teq a2, zero, 7 | __asm ("teq a2, zero, 7");
0x0000ed14 andi t1, t1, 0xffff | t1 &= 0xffff;
0x0000ed18 mflo v0 | __asm ("mflo v0");
0x0000ed1c mfhi a2 | __asm ("mfhi a2");
0x0000ed20 mul t2, v0, t2 | __asm ("mul t2, v0, t2");
0x0000ed24 sll a2, a2, 0x10 | a2 <<= 0x10;
0x0000ed28 or a2, a2, t1 | a2 |= t1;
0x0000ed2c sltu a0, a2, t2 | a0 = (a2 < t2) ? 1 : 0;
| if (a0 != 0) {
0x0000ed30 beql a0, zero, 0xed5c |
0x0000ed34 sll a1, a1, 0x10 | a1 <<= 0x10;
0x0000ed38 addu a2, t0, a2 | a2 = t0 + a2;
0x0000ed3c sltu a0, a2, t0 | a0 = (a2 < t0) ? 1 : 0;
0x0000ed40 addiu a3, v0, -1 | a3 = v0 + -1;
| if (a0 != 0) {
0x0000ed44 bnez a0, 0xef84 | goto label_15;
| }
0x0000ed48 sltu a2, a2, t2 | a2 = (a2 < t2) ? 1 : 0;
| if (a2 == 0) {
0x0000ed4c beql a2, zero, 0xef88 | goto label_16;
| }
0x0000ed50 move v0, a3 | v0 = a3;
0x0000ed54 addiu v0, v0, -2 | v0 += -2;
0x0000ed58 sll a1, a1, 0x10 | a1 <<= 0x10;
| }
0x0000ed5c or v0, a1, v0 | v0 = a1 | v0;
| label_1:
0x0000ed60 jr ra | return v0;
0x0000ed64 nop |
| label_10:
0x0000ed68 sltu v0, a1, a3 | v0 = (a1 < a3) ? 1 : 0;
0x0000ed6c move v1, zero | v1 = 0;
| if (v0 == 0) {
0x0000ed70 bnez v0, 0xed9c |
0x0000ed74 clz v1, a3 | __asm ("clz v1, a3");
0x0000ed78 addiu t1, zero, 0x20 | t1 = 0x20;
| if (v1 != 0) {
0x0000ed7c bnez v1, 0xeda8 | goto label_17;
| }
0x0000ed80 sltu a1, a3, a1 | a1 = (a3 < a1) ? 1 : 0;
0x0000ed84 addiu v0, zero, 1 | v0 = 1;
| if (a1 == 0) {
0x0000ed88 bnel a1, zero, 0xefb4 | goto label_18;
| }
0x0000ed8c sltu v0, a0, a2 | v0 = (a0 < a2) ? 1 : 0;
0x0000ed90 xori v0, v0, 1 | v0 ^= 1;
0x0000ed94 jr ra | return v0;
0x0000ed98 nop |
| }
0x0000ed9c move v0, zero | v0 = 0;
0x0000eda0 jr ra | return v0;
0x0000eda4 nop |
| label_17:
0x0000eda8 subu t1, t1, v1 | __asm ("subu t1, t1, v1");
0x0000edac srlv v0, a2, t1 | v0 = a2 >> t1;
0x0000edb0 sllv a3, a3, v1 | a3 <<= v1;
0x0000edb4 or a3, v0, a3 | a3 = v0 | a3;
0x0000edb8 srlv t0, a1, t1 | t0 = a1 >> t1;
0x0000edbc srl v0, a3, 0x10 | v0 = a3 >> 0x10;
0x0000edc0 divu zero, t0, v0 | __asm ("divu zero, t0, v0");
0x0000edc4 teq v0, zero, 7 | __asm ("teq v0, zero, 7");
0x0000edc8 andi t3, a3, 0xffff | t3 = a3 & 0xffff;
0x0000edcc srlv t1, a0, t1 | t1 = a0 >> t1;
0x0000edd0 sllv a1, a1, v1 | a1 <<= v1;
0x0000edd4 or a1, t1, a1 | a1 = t1 | a1;
0x0000edd8 srl t1, a1, 0x10 | t1 = a1 >> 0x10;
0x0000eddc mflo t0 | __asm ("mflo t0");
0x0000ede0 mfhi t2 | __asm ("mfhi t2");
0x0000ede4 mul t4, t3, t0 | __asm ("mul t4, t3, t0");
0x0000ede8 sll t2, t2, 0x10 | t2 <<= 0x10;
0x0000edec or t1, t2, t1 | t1 = t2 | t1;
0x0000edf0 sltu t2, t1, t4 | t2 = (t1 < t4) ? 1 : 0;
0x0000edf4 sllv a2, a2, v1 | a2 <<= v1;
| if (t2 != 0) {
0x0000edf8 beqz t2, 0xee20 |
0x0000edfc addu t1, t1, a3 | t1 += a3;
0x0000ee00 sltu t2, t1, a3 | t2 = (t1 < a3) ? 1 : 0;
0x0000ee04 addiu t5, t0, -1 | t5 = t0 + -1;
| if (t2 != 0) {
0x0000ee08 bnez t2, 0xefd4 | goto label_19;
| }
0x0000ee0c sltu t2, t1, t4 | t2 = (t1 < t4) ? 1 : 0;
| if (t2 == 0) {
0x0000ee10 beql t2, zero, 0xee20 | goto label_8;
| }
0x0000ee14 move t0, t5 | t0 = t5;
0x0000ee18 addiu t0, t0, -2 | t0 += -2;
0x0000ee1c addu t1, t1, a3 | t1 += a3;
| }
| label_8:
0x0000ee20 subu t1, t1, t4 | __asm ("subu t1, t1, t4");
0x0000ee24 divu zero, t1, v0 | __asm ("divu zero, t1, v0");
0x0000ee28 teq v0, zero, 7 | __asm ("teq v0, zero, 7");
0x0000ee2c andi a1, a1, 0xffff | a1 &= 0xffff;
0x0000ee30 mflo t1 | __asm ("mflo t1");
0x0000ee34 mfhi v0 | __asm ("mfhi v0");
0x0000ee38 mul t2, t3, t1 | __asm ("mul t2, t3, t1");
0x0000ee3c sll v0, v0, 0x10 | v0 <<= 0x10;
0x0000ee40 or a1, v0, a1 | a1 = v0 | a1;
0x0000ee44 sltu v0, a1, t2 | v0 = (a1 < t2) ? 1 : 0;
0x0000ee48 sll v0, t0, 0x10 | v0 = t0 << 0x10;
| if (v0 != 0) {
0x0000ee4c beqz v0, 0xee78 |
0x0000ee50 addu a1, a1, a3 | a1 += a3;
0x0000ee54 sltu v0, a1, a3 | v0 = (a1 < a3) ? 1 : 0;
0x0000ee58 addiu t3, t1, -1 | t3 = t1 + -1;
| if (v0 != 0) {
0x0000ee5c bnez v0, 0xefc4 | goto label_20;
| }
0x0000ee60 sltu v0, a1, t2 | v0 = (a1 < t2) ? 1 : 0;
| if (v0 != 0) {
0x0000ee64 beql v0, zero, 0xee74 |
0x0000ee68 move t1, t3 | t1 = t3;
0x0000ee6c addiu t1, t1, -2 | t1 += -2;
0x0000ee70 addu a1, a1, a3 | a1 += a3;
| }
| label_6:
0x0000ee74 sll v0, t0, 0x10 | v0 = t0 << 0x10;
| }
0x0000ee78 or v0, v0, t1 | v0 |= t1;
0x0000ee7c multu v0, a2 | __asm ("multu v0, a2");
0x0000ee80 mfhi a3 | __asm ("mfhi a3");
0x0000ee84 subu a1, a1, t2 | __asm ("subu a1, a1, t2");
0x0000ee88 sltu t0, a1, a3 | t0 = (a1 < a3) ? 1 : 0;
0x0000ee8c mflo a2 | __asm ("mflo a2");
| if (t0 != 0) {
0x0000ee90 bnez t0, 0xefa8 | goto label_21;
| }
| if (a1 == a3) {
0x0000ee94 beql a1, a3, 0xef9c | goto label_22;
| }
0x0000ee98 sllv v1, a0, v1 | v1 = a0 << v1;
0x0000ee9c move v1, zero | v1 = 0;
| label_4:
0x0000eea0 jr ra | return v0;
0x0000eea4 nop |
| label_13:
0x0000eea8 subu t1, t1, t3 | __asm ("subu t1, t1, t3");
0x0000eeac sllv t0, t0, t3 | t0 <<= t3;
0x0000eeb0 srlv v0, a1, t1 | v0 = a1 >> t1;
0x0000eeb4 srl a2, t0, 0x10 | a2 = t0 >> 0x10;
0x0000eeb8 divu zero, v0, a2 | __asm ("divu zero, v0, a2");
0x0000eebc teq a2, zero, 7 | __asm ("teq a2, zero, 7");
0x0000eec0 sllv a1, a1, t3 | a1 <<= t3;
0x0000eec4 srlv t1, a0, t1 | t1 = a0 >> t1;
0x0000eec8 andi t2, t0, 0xffff | t2 = t0 & 0xffff;
0x0000eecc or a3, t1, a1 | a3 = t1 | a1;
0x0000eed0 srl v1, a3, 0x10 | v1 = a3 >> 0x10;
0x0000eed4 mflo t4 | __asm ("mflo t4");
0x0000eed8 mfhi v0 | __asm ("mfhi v0");
0x0000eedc mul a1, t2, t4 | __asm ("mul a1, t2, t4");
0x0000eee0 sll v0, v0, 0x10 | v0 <<= 0x10;
0x0000eee4 or v0, v0, v1 | v0 |= v1;
0x0000eee8 sltu v1, v0, a1 | v1 = (v0 < a1) ? 1 : 0;
0x0000eeec sllv t1, a0, t3 | t1 = a0 << t3;
| if (v1 != 0) {
0x0000eef0 beqz v1, 0xef18 |
0x0000eef4 addu v0, v0, t0 | v0 += t0;
0x0000eef8 sltu v1, v0, t0 | v1 = (v0 < t0) ? 1 : 0;
0x0000eefc addiu a0, t4, -1 | a0 = t4 + -1;
| if (v1 != 0) {
0x0000ef00 bnez v1, 0xefcc | goto label_23;
| }
0x0000ef04 sltu v1, v0, a1 | v1 = (v0 < a1) ? 1 : 0;
| if (v1 == 0) {
0x0000ef08 beql v1, zero, 0xef18 | goto label_7;
| }
0x0000ef0c move t4, a0 | t4 = a0;
0x0000ef10 addiu t4, t4, -2 | t4 += -2;
0x0000ef14 addu v0, v0, t0 | v0 += t0;
| }
| label_7:
0x0000ef18 subu a1, v0, a1 | __asm ("subu a1, v0, a1");
0x0000ef1c divu zero, a1, a2 | __asm ("divu zero, a1, a2");
0x0000ef20 teq a2, zero, 7 | __asm ("teq a2, zero, 7");
0x0000ef24 andi a3, a3, 0xffff | a3 &= 0xffff;
0x0000ef28 mflo v1 | __asm ("mflo v1");
0x0000ef2c mfhi a1 | __asm ("mfhi a1");
0x0000ef30 mul a0, t2, v1 | __asm ("mul a0, t2, v1");
0x0000ef34 sll a1, a1, 0x10 | a1 <<= 0x10;
0x0000ef38 or a1, a1, a3 | a1 |= a3;
0x0000ef3c sltu v0, a1, a0 | v0 = (a1 < a0) ? 1 : 0;
0x0000ef40 sll v0, t4, 0x10 | v0 = t4 << 0x10;
| if (v0 != 0) {
0x0000ef44 beqz v0, 0xef70 |
0x0000ef48 addu a1, a1, t0 | a1 += t0;
0x0000ef4c sltu v0, a1, t0 | v0 = (a1 < t0) ? 1 : 0;
0x0000ef50 addiu a3, v1, -1 | a3 = v1 + -1;
| if (v0 != 0) {
0x0000ef54 bnez v0, 0xefbc | goto label_24;
| }
0x0000ef58 sltu v0, a1, a0 | v0 = (a1 < a0) ? 1 : 0;
| if (v0 != 0) {
0x0000ef5c beql v0, zero, 0xef6c |
0x0000ef60 move v1, a3 | v1 = a3;
0x0000ef64 addiu v1, v1, -2 | v1 += -2;
0x0000ef68 addu a1, a1, t0 | a1 += t0;
| }
| label_5:
0x0000ef6c sll v0, t4, 0x10 | v0 = t4 << 0x10;
| }
0x0000ef70 subu a1, a1, a0 | __asm ("subu a1, a1, a0");
0x0000ef74 or v1, v0, v1 | v1 = v0 | v1;
0x0000ef78 b 0xecbc |
| } while (1);
| label_11:
0x0000ef7c move v0, t2 | v0 = t2;
0x0000ef80 b 0xec24 | goto label_0;
| label_15:
0x0000ef84 move v0, a3 | v0 = a3;
| label_16:
0x0000ef88 sll a1, a1, 0x10 | a1 <<= 0x10;
0x0000ef8c or v0, a1, v0 | v0 = a1 | v0;
0x0000ef90 b 0xed60 | goto label_1;
| label_12:
0x0000ef94 move v1, a1 | v1 = a1;
0x0000ef98 b 0xec74 | goto label_2;
| label_22:
0x0000ef9c sltu v1, v1, a2 | v1 = (v1 < a2) ? 1 : 0;
| if (v1 == 0) {
0x0000efa0 beqz v1, 0xec80 | goto label_3;
| }
0x0000efa4 nop |
| label_21:
0x0000efa8 addiu v0, v0, -1 | v0 += -1;
0x0000efac move v1, zero | v1 = 0;
0x0000efb0 b 0xeea0 | goto label_4;
| label_18:
0x0000efb4 jr ra | return v0;
0x0000efb8 nop |
| label_24:
0x0000efbc move v1, a3 | v1 = a3;
0x0000efc0 b 0xef6c | goto label_5;
| label_20:
0x0000efc4 move t1, t3 | t1 = t3;
0x0000efc8 b 0xee74 | goto label_6;
| label_23:
0x0000efcc move t4, a0 | t4 = a0;
0x0000efd0 b 0xef18 | goto label_7;
| label_19:
0x0000efd4 move t0, t5 | t0 = t5;
0x0000efd8 b 0xee20 | goto label_8;
| label_14:
0x0000efdc addu v0, v0, t0 | v0 += t0;
0x0000efe0 b 0xed08 | goto label_9;
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/unblob_extracted/firmware_extract/4325012-58052244.squashfs_v4_le_extract/usr/lib/gstreamer-1.0/libgstartpec.so @ 0xeff0 */
| #include <stdint.h>
|
; (fcn) fcn.0000eff0 () | void fcn_0000eff0 () {
0x0000eff0 move t0, a2 | t0 = a2;
0x0000eff4 move t3, a0 | t3 = a0;
0x0000eff8 move v1, a1 | v1 = a1;
0x0000effc move t1, a1 | t1 = a1;
| if (a3 != 0) {
0x0000f000 bnez a3, 0xf1b4 | goto label_6;
| }
0x0000f004 sltu v0, a1, a2 | v0 = (a1 < a2) ? 1 : 0;
0x0000f008 clz t2, a2 | __asm ("clz t2, a2");
| if (v0 == 0) {
0x0000f00c beqz v0, 0xf0e0 | goto label_7;
| }
0x0000f010 srl v1, t0, 0x10 | v1 = t0 >> 0x10;
| if (t2 != 0) {
0x0000f014 beqz t2, 0xf034 |
0x0000f018 negu v0, t2 | __asm ("negu v0, t2");
0x0000f01c srlv v0, a0, v0 | v0 = a0 >> v0;
0x0000f020 sllv a2, a1, t2 | a2 = a1 << t2;
0x0000f024 sllv t0, t0, t2 | t0 <<= t2;
0x0000f028 or t1, v0, a2 | t1 = v0 | a2;
0x0000f02c sllv t3, a0, t2 | t3 = a0 << t2;
0x0000f030 srl v1, t0, 0x10 | v1 = t0 >> 0x10;
| }
0x0000f034 divu zero, t1, v1 | __asm ("divu zero, t1, v1");
0x0000f038 teq v1, zero, 7 | __asm ("teq v1, zero, 7");
0x0000f03c andi a0, t0, 0xffff | a0 = t0 & 0xffff;
0x0000f040 srl a1, t3, 0x10 | a1 = t3 >> 0x10;
0x0000f044 mflo t1 | __asm ("mflo t1");
0x0000f048 mfhi a2 | __asm ("mfhi a2");
0x0000f04c mul t1, t1, a0 | __asm ("mul t1, t1, a0");
0x0000f050 sll a2, a2, 0x10 | a2 <<= 0x10;
0x0000f054 or a1, a2, a1 | a1 = a2 | a1;
0x0000f058 sltu v0, a1, t1 | v0 = (a1 < t1) ? 1 : 0;
| if (v0 != 0) {
0x0000f05c beql v0, zero, 0xf084 |
0x0000f060 subu a1, a1, t1 | __asm ("subu a1, a1, t1");
0x0000f064 addu a1, a1, t0 | a1 += t0;
0x0000f068 sltu v0, a1, t0 | v0 = (a1 < t0) ? 1 : 0;
0x0000f06c subu a1, a1, t1 | __asm ("subu a1, a1, t1");
| if (v0 == 0) {
0x0000f070 bnel v0, zero, 0xf084 | goto label_8;
| }
0x0000f074 sltu v0, a1, t1 | v0 = (a1 < t1) ? 1 : 0;
0x0000f078 addu a1, a1, t0 | a1 += t0;
| if (v0 != 0) {
0x0000f07c bnel v0, zero, 0xf080 |
| }
0x0000f080 subu a1, a1, t1 | __asm ("subu a1, a1, t1");
| }
| label_8:
0x0000f084 divu zero, a1, v1 | __asm ("divu zero, a1, v1");
0x0000f088 teq v1, zero, 7 | __asm ("teq v1, zero, 7");
0x0000f08c andi t3, t3, 0xffff | t3 &= 0xffff;
0x0000f090 mflo v0 | __asm ("mflo v0");
0x0000f094 mfhi a1 | __asm ("mfhi a1");
0x0000f098 mul v0, v0, a0 | __asm ("mul v0, v0, a0");
0x0000f09c sll a1, a1, 0x10 | a1 <<= 0x10;
0x0000f0a0 or a1, a1, t3 | a1 |= t3;
0x0000f0a4 sltu v1, a1, v0 | v1 = (a1 < v0) ? 1 : 0;
| if (v1 != 0) {
0x0000f0a8 beql v1, zero, 0xf0d0 |
0x0000f0ac subu v0, a1, v0 | __asm ("subu v0, a1, v0");
0x0000f0b0 addu a1, a1, t0 | a1 += t0;
0x0000f0b4 sltu v1, a1, t0 | v1 = (a1 < t0) ? 1 : 0;
0x0000f0b8 subu v0, a1, v0 | __asm ("subu v0, a1, v0");
| if (v1 == 0) {
0x0000f0bc bnel v1, zero, 0xf0d0 | goto label_9;
| }
0x0000f0c0 sltu v1, a1, v0 | v1 = (a1 < v0) ? 1 : 0;
0x0000f0c4 addu a1, a1, t0 | a1 += t0;
| if (v1 != 0) {
0x0000f0c8 bnel v1, zero, 0xf0cc |
| }
0x0000f0cc subu v0, a1, v0 | __asm ("subu v0, a1, v0");
| }
| label_9:
0x0000f0d0 srlv v0, v0, t2 | v0 >>= t2;
0x0000f0d4 move v1, zero | v1 = 0;
| do {
| label_0:
0x0000f0d8 jr ra | return v1;
0x0000f0dc nop |
| label_7:
0x0000f0e0 clz t2, t0 | __asm ("clz t2, t0");
| if (a2 == 0) {
0x0000f0e4 bnez a2, 0xf0fc |
0x0000f0e8 addiu v0, zero, 1 | v0 = 1;
0x0000f0ec divu zero, v0, a2 | __asm ("divu zero, v0, a2");
0x0000f0f0 teq a2, zero, 7 | __asm ("teq a2, zero, 7");
0x0000f0f4 mflo t0 | __asm ("mflo t0");
0x0000f0f8 clz t2, t0 | __asm ("clz t2, t0");
| }
0x0000f0fc addiu t3, zero, 0x20 | t3 = 0x20;
| if (t2 == 0) {
0x0000f100 bnel t2, zero, 0xf328 | goto label_10;
| }
0x0000f104 subu a3, a1, t0 | __asm ("subu a3, a1, t0");
0x0000f108 srl v0, t0, 0x10 | v0 = t0 >> 0x10;
0x0000f10c andi v1, t0, 0xffff | v1 = t0 & 0xffff;
| label_1:
0x0000f110 divu zero, a3, v0 | __asm ("divu zero, a3, v0");
0x0000f114 teq v0, zero, 7 | __asm ("teq v0, zero, 7");
0x0000f118 srl a2, t3, 0x10 | a2 = t3 >> 0x10;
0x0000f11c mflo a1 | __asm ("mflo a1");
0x0000f120 mfhi a3 | __asm ("mfhi a3");
0x0000f124 mul a0, a1, v1 | __asm ("mul a0, a1, v1");
0x0000f128 sll a3, a3, 0x10 | a3 <<= 0x10;
0x0000f12c or a2, a3, a2 | a2 = a3 | a2;
0x0000f130 sltu a1, a2, a0 | a1 = (a2 < a0) ? 1 : 0;
| if (a1 != 0) {
0x0000f134 beql a1, zero, 0xf15c |
0x0000f138 subu a2, a2, a0 | __asm ("subu a2, a2, a0");
0x0000f13c addu a2, a2, t0 | a2 += t0;
0x0000f140 sltu a1, a2, t0 | a1 = (a2 < t0) ? 1 : 0;
0x0000f144 subu a2, a2, a0 | __asm ("subu a2, a2, a0");
| if (a1 == 0) {
0x0000f148 bnel a1, zero, 0xf15c | goto label_11;
| }
0x0000f14c sltu a1, a2, a0 | a1 = (a2 < a0) ? 1 : 0;
0x0000f150 addu a2, a2, t0 | a2 += t0;
| if (a1 != 0) {
0x0000f154 bnel a1, zero, 0xf158 |
| }
0x0000f158 subu a2, a2, a0 | __asm ("subu a2, a2, a0");
| }
| label_11:
0x0000f15c divu zero, a2, v0 | __asm ("divu zero, a2, v0");
0x0000f160 teq v0, zero, 7 | __asm ("teq v0, zero, 7");
0x0000f164 andi t3, t3, 0xffff | t3 &= 0xffff;
0x0000f168 mflo v0 | __asm ("mflo v0");
0x0000f16c mfhi a2 | __asm ("mfhi a2");
0x0000f170 mul v0, v0, v1 | __asm ("mul v0, v0, v1");
0x0000f174 sll v1, a2, 0x10 | v1 = a2 << 0x10;
0x0000f178 or v1, v1, t3 | v1 |= t3;
0x0000f17c sltu a0, v1, v0 | a0 = (v1 < v0) ? 1 : 0;
| if (a0 != 0) {
0x0000f180 beql a0, zero, 0xf1a8 |
0x0000f184 subu v0, v1, v0 | __asm ("subu v0, v1, v0");
0x0000f188 addu v1, v1, t0 | v1 += t0;
0x0000f18c sltu a0, v1, t0 | a0 = (v1 < t0) ? 1 : 0;
0x0000f190 subu v0, v1, v0 | __asm ("subu v0, v1, v0");
| if (a0 == 0) {
0x0000f194 bnel a0, zero, 0xf1a8 | goto label_12;
| }
0x0000f198 sltu a0, v1, v0 | a0 = (v1 < v0) ? 1 : 0;
0x0000f19c addu v1, v1, t0 | v1 += t0;
| if (a0 != 0) {
0x0000f1a0 bnel a0, zero, 0xf1a4 |
| }
0x0000f1a4 subu v0, v1, v0 | __asm ("subu v0, v1, v0");
| }
| label_12:
0x0000f1a8 srlv v0, v0, t2 | v0 >>= t2;
0x0000f1ac move v1, zero | v1 = 0;
0x0000f1b0 b 0xf0d8 |
| } while (1);
| label_6:
0x0000f1b4 sltu t0, a1, a3 | t0 = (a1 < a3) ? 1 : 0;
0x0000f1b8 move v0, a0 | v0 = a0;
| if (t0 != 0) {
0x0000f1bc bnez t0, 0xf0d8 | goto label_0;
| }
0x0000f1c0 clz t3, a3 | __asm ("clz t3, a3");
0x0000f1c4 addiu t4, zero, 0x20 | t4 = 0x20;
| if (t3 != 0) {
0x0000f1c8 bnez t3, 0xf1fc | goto label_13;
| }
0x0000f1cc sltu t0, a3, a1 | t0 = (a3 < a1) ? 1 : 0;
0x0000f1d0 subu v0, a0, a2 | __asm ("subu v0, a0, a2");
| if (t0 == 0) {
0x0000f1d4 bnel t0, zero, 0xf1e8 | goto label_14;
| }
0x0000f1d8 sltu t0, a0, a2 | t0 = (a0 < a2) ? 1 : 0;
| if (t0 != 0) {
0x0000f1dc bnez t0, 0xf0d8 | goto label_0;
| }
0x0000f1e0 nop |
0x0000f1e4 subu v0, a0, a2 | __asm ("subu v0, a0, a2");
| label_14:
0x0000f1e8 subu a1, a1, a3 | __asm ("subu a1, a1, a3");
0x0000f1ec sltu v1, a0, v0 | v1 = (a0 < v0) ? 1 : 0;
0x0000f1f0 subu v1, a1, v1 | __asm ("subu v1, a1, v1");
0x0000f1f4 jr ra | return v1;
0x0000f1f8 nop |
| label_13:
0x0000f1fc subu t4, t4, t3 | __asm ("subu t4, t4, t3");
0x0000f200 sllv a3, a3, t3 | a3 <<= t3;
0x0000f204 srlv t8, a2, t4 | t8 = a2 >> t4;
0x0000f208 or t8, t8, a3 | t8 |= a3;
0x0000f20c srlv t0, a1, t4 | t0 = a1 >> t4;
0x0000f210 srl t5, t8, 0x10 | t5 = t8 >> 0x10;
0x0000f214 divu zero, t0, t5 | __asm ("divu zero, t0, t5");
0x0000f218 teq t5, zero, 7 | __asm ("teq t5, zero, 7");
0x0000f21c andi a3, t8, 0xffff | a3 = t8 & 0xffff;
0x0000f220 sllv a1, a1, t3 | a1 <<= t3;
0x0000f224 srlv t0, a0, t4 | t0 = a0 >> t4;
0x0000f228 or t0, t0, a1 | t0 |= a1;
0x0000f22c srl a1, t0, 0x10 | a1 = t0 >> 0x10;
0x0000f230 sllv t1, a2, t3 | t1 = a2 << t3;
0x0000f234 sllv v0, a0, t3 | v0 = a0 << t3;
0x0000f238 mflo t6 | __asm ("mflo t6");
0x0000f23c mfhi t2 | __asm ("mfhi t2");
0x0000f240 mul v1, a3, t6 | __asm ("mul v1, a3, t6");
0x0000f244 sll t2, t2, 0x10 | t2 <<= 0x10;
0x0000f248 or a2, t2, a1 | a2 = t2 | a1;
0x0000f24c sltu a0, a2, v1 | a0 = (a2 < v1) ? 1 : 0;
| if (a0 != 0) {
0x0000f250 beql a0, zero, 0xf280 |
0x0000f254 subu a2, a2, v1 | __asm ("subu a2, a2, v1");
0x0000f258 addu a2, a2, t8 | a2 += t8;
0x0000f25c sltu a0, a2, t8 | a0 = (a2 < t8) ? 1 : 0;
0x0000f260 addiu a1, t6, -1 | a1 = t6 + -1;
| if (a0 != 0) {
0x0000f264 bnez a0, 0xf40c | goto label_15;
| }
0x0000f268 sltu a0, a2, v1 | a0 = (a2 < v1) ? 1 : 0;
| if (a0 != 0) {
0x0000f26c beql a0, zero, 0xf27c |
0x0000f270 move t6, a1 | t6 = a1;
0x0000f274 addiu t6, t6, -2 | t6 += -2;
0x0000f278 addu a2, a2, t8 | a2 += t8;
| }
| label_5:
0x0000f27c subu a2, a2, v1 | __asm ("subu a2, a2, v1");
| }
0x0000f280 divu zero, a2, t5 | __asm ("divu zero, a2, t5");
0x0000f284 teq t5, zero, 7 | __asm ("teq t5, zero, 7");
0x0000f288 andi t0, t0, 0xffff | t0 &= 0xffff;
0x0000f28c mflo a2 | __asm ("mflo a2");
0x0000f290 mfhi t5 | __asm ("mfhi t5");
0x0000f294 mul v1, a3, a2 | __asm ("mul v1, a3, a2");
0x0000f298 sll t5, t5, 0x10 | t5 <<= 0x10;
0x0000f29c or a3, t5, t0 | a3 = t5 | t0;
0x0000f2a0 sltu a0, a3, v1 | a0 = (a3 < v1) ? 1 : 0;
| if (a0 != 0) {
0x0000f2a4 beql a0, zero, 0xf2d4 |
0x0000f2a8 sll t6, t6, 0x10 | t6 <<= 0x10;
0x0000f2ac addu a3, a3, t8 | a3 += t8;
0x0000f2b0 sltu a0, a3, t8 | a0 = (a3 < t8) ? 1 : 0;
0x0000f2b4 addiu a1, a2, -1 | a1 = a2 + -1;
| if (a0 != 0) {
0x0000f2b8 bnez a0, 0xf404 | goto label_16;
| }
0x0000f2bc sltu a0, a3, v1 | a0 = (a3 < v1) ? 1 : 0;
| if (a0 != 0) {
0x0000f2c0 beql a0, zero, 0xf2d0 |
0x0000f2c4 move a2, a1 | a2 = a1;
0x0000f2c8 addiu a2, a2, -2 | a2 += -2;
0x0000f2cc addu a3, a3, t8 | a3 += t8;
| }
| label_4:
0x0000f2d0 sll t6, t6, 0x10 | t6 <<= 0x10;
| }
0x0000f2d4 or a2, t6, a2 | a2 = t6 | a2;
0x0000f2d8 multu a2, t1 | __asm ("multu a2, t1");
0x0000f2dc mfhi t7 | __asm ("mfhi t7");
0x0000f2e0 subu a3, a3, v1 | __asm ("subu a3, a3, v1");
0x0000f2e4 mflo t6 | __asm ("mflo t6");
0x0000f2e8 mflo a2 | __asm ("mflo a2");
0x0000f2ec sltu v1, a3, t7 | v1 = (a3 < t7) ? 1 : 0;
0x0000f2f0 move a1, t7 | a1 = t7;
| if (v1 != 0) {
0x0000f2f4 bnez v1, 0xf3f0 | goto label_17;
| }
| if (a3 == t7) {
0x0000f2f8 beql a3, t7, 0xf3e8 | goto label_18;
| }
0x0000f2fc sltu v1, v0, t6 | v1 = (v0 < t6) ? 1 : 0;
| label_3:
0x0000f300 subu a2, v0, a2 | __asm ("subu a2, v0, a2");
| label_2:
0x0000f304 subu a3, a3, a1 | __asm ("subu a3, a3, a1");
0x0000f308 sltu a1, v0, a2 | a1 = (v0 < a2) ? 1 : 0;
0x0000f30c subu a1, a3, a1 | __asm ("subu a1, a3, a1");
0x0000f310 sllv t4, a1, t4 | t4 = a1 << t4;
0x0000f314 srlv v0, a2, t3 | v0 = a2 >> t3;
0x0000f318 or v0, t4, v0 | v0 = t4 | v0;
0x0000f31c srlv v1, a1, t3 | v1 = a1 >> t3;
0x0000f320 jr ra | return v1;
0x0000f324 nop |
| label_10:
0x0000f328 subu t3, t3, t2 | __asm ("subu t3, t3, t2");
0x0000f32c sllv t0, t0, t2 | t0 <<= t2;
0x0000f330 srlv a2, a1, t3 | a2 = a1 >> t3;
0x0000f334 srl v0, t0, 0x10 | v0 = t0 >> 0x10;
0x0000f338 divu zero, a2, v0 | __asm ("divu zero, a2, v0");
0x0000f33c teq v0, zero, 7 | __asm ("teq v0, zero, 7");
0x0000f340 andi v1, t0, 0xffff | v1 = t0 & 0xffff;
0x0000f344 srlv t3, a0, t3 | t3 = a0 >> t3;
0x0000f348 sllv a1, a1, t2 | a1 <<= t2;
0x0000f34c or a1, t3, a1 | a1 = t3 | a1;
0x0000f350 srl t4, a1, 0x10 | t4 = a1 >> 0x10;
0x0000f354 sllv t3, a0, t2 | t3 = a0 << t2;
0x0000f358 mflo t1 | __asm ("mflo t1");
0x0000f35c mfhi a2 | __asm ("mfhi a2");
0x0000f360 mul a3, t1, v1 | __asm ("mul a3, t1, v1");
0x0000f364 sll a2, a2, 0x10 | a2 <<= 0x10;
0x0000f368 or t1, a2, t4 | t1 = a2 | t4;
0x0000f36c sltu a0, t1, a3 | a0 = (t1 < a3) ? 1 : 0;
| if (a0 != 0) {
0x0000f370 beql a0, zero, 0xf398 |
0x0000f374 subu t1, t1, a3 | __asm ("subu t1, t1, a3");
0x0000f378 addu t1, t1, t0 | t1 += t0;
0x0000f37c sltu a0, t1, t0 | a0 = (t1 < t0) ? 1 : 0;
0x0000f380 subu t1, t1, a3 | __asm ("subu t1, t1, a3");
| if (a0 == 0) {
0x0000f384 bnel a0, zero, 0xf398 | goto label_19;
| }
0x0000f388 sltu a0, t1, a3 | a0 = (t1 < a3) ? 1 : 0;
0x0000f38c addu t1, t1, t0 | t1 += t0;
| if (a0 != 0) {
0x0000f390 bnel a0, zero, 0xf394 |
| }
0x0000f394 subu t1, t1, a3 | __asm ("subu t1, t1, a3");
| }
| label_19:
0x0000f398 divu zero, t1, v0 | __asm ("divu zero, t1, v0");
0x0000f39c teq v0, zero, 7 | __asm ("teq v0, zero, 7");
0x0000f3a0 andi a0, a1, 0xffff | a0 = a1 & 0xffff;
0x0000f3a4 mflo a3 | __asm ("mflo a3");
0x0000f3a8 mfhi t1 | __asm ("mfhi t1");
0x0000f3ac mul a1, a3, v1 | __asm ("mul a1, a3, v1");
0x0000f3b0 sll a3, t1, 0x10 | a3 = t1 << 0x10;
0x0000f3b4 or a3, a3, a0 | a3 |= a0;
0x0000f3b8 sltu a0, a3, a1 | a0 = (a3 < a1) ? 1 : 0;
| if (a0 == 0) {
0x0000f3bc beql a0, zero, 0xf110 | goto label_1;
| }
0x0000f3c0 subu a3, a3, a1 | __asm ("subu a3, a3, a1");
0x0000f3c4 addu a3, a3, t0 | a3 += t0;
0x0000f3c8 sltu a0, a3, t0 | a0 = (a3 < t0) ? 1 : 0;
0x0000f3cc subu a3, a3, a1 | __asm ("subu a3, a3, a1");
| if (a0 == 0) {
0x0000f3d0 bnel a0, zero, 0xf110 | goto label_1;
| }
0x0000f3d4 sltu a0, a3, a1 | a0 = (a3 < a1) ? 1 : 0;
0x0000f3d8 addu a3, a3, t0 | a3 += t0;
| if (a0 != 0) {
0x0000f3dc bnel a0, zero, 0xf3e0 |
| }
0x0000f3e0 subu a3, a3, a1 | __asm ("subu a3, a3, a1");
0x0000f3e4 b 0xf110 | goto label_1;
| if (v1 == 0) {
| label_18:
0x0000f3e8 beql v1, zero, 0xf304 | goto label_2;
| }
0x0000f3ec subu a2, v0, a2 | __asm ("subu a2, v0, a2");
| label_17:
0x0000f3f0 subu a2, t6, t1 | __asm ("subu a2, t6, t1");
0x0000f3f4 subu t8, t7, t8 | __asm ("subu t8, t7, t8");
0x0000f3f8 sltu t6, t6, a2 | t6 = (t6 < a2) ? 1 : 0;
0x0000f3fc subu a1, t8, t6 | __asm ("subu a1, t8, t6");
0x0000f400 b 0xf300 | goto label_3;
| label_16:
0x0000f404 move a2, a1 | a2 = a1;
0x0000f408 b 0xf2d0 | goto label_4;
| label_15:
0x0000f40c move t6, a1 | t6 = a1;
0x0000f410 b 0xf27c | goto label_5;
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/unblob_extracted/firmware_extract/4325012-58052244.squashfs_v4_le_extract/usr/lib/gstreamer-1.0/libgstartpec.so @ 0x107c0 */
| #include <stdint.h>
|
; (fcn) fcn.000107c0 () | void fcn_000107c0 () {
0x000107c0 lui gp, 2 |
0x000107c4 addiu gp, gp, -0x3770 |
0x000107c8 addu gp, gp, t9 | gp += t9;
0x000107cc srl t3, a1, 0x1f | t3 = a1 >> 0x1f;
0x000107d0 ext v1, a1, 0x14, 0xb | __asm ("ext v1, a1, 0x14, 0xb");
0x000107d4 move v0, a0 | v0 = a0;
0x000107d8 ext a1, a1, 0, 0x14 | __asm ("ext a1, a1, 0, 0x14");
0x000107dc move t4, t3 | t4 = t3;
| if (v1 == 0) {
0x000107e0 beqz v1, 0x109b4 | goto label_28;
| }
0x000107e4 addiu t0, zero, 0x7ff | t0 = 0x7ff;
0x000107e8 or t0, a1, a0 | t0 = a1 | a0;
| if (v1 == t0) {
0x000107ec beq v1, t0, 0x10a00 | goto label_29;
| }
0x000107f0 srl t0, a0, 0x1d | t0 = a0 >> 0x1d;
0x000107f4 sll a1, a1, 3 | a1 <<= 3;
0x000107f8 or a1, t0, a1 | a1 = t0 | a1;
0x000107fc lui t0, 0x80 | t0 = 0x800000;
0x00010800 addiu t2, v1, -0x3ff | t2 = v1 + -0x3ff;
0x00010804 or t0, a1, t0 | t0 = a1 | t0;
0x00010808 sll v0, a0, 3 | v0 = a0 << 3;
0x0001080c move v1, zero | v1 = 0;
0x00010810 move t6, zero | t6 = 0;
| label_2:
0x00010814 ext a0, a3, 0x14, 0xb | __asm ("ext a0, a3, 0x14, 0xb");
0x00010818 ext t1, a3, 0, 0x14 | __asm ("ext t1, a3, 0, 0x14");
0x0001081c srl a3, a3, 0x1f | a3 >>= 0x1f;
| if (a0 == 0) {
0x00010820 beqz a0, 0x1096c | goto label_30;
| }
0x00010824 addiu a1, zero, 0x7ff | a1 = 0x7ff;
0x00010828 or t5, t1, a2 | t5 = t1 | a2;
| if (a0 == a1) {
0x0001082c beq a0, a1, 0x1087c | goto label_31;
| }
0x00010830 sll a1, t1, 3 | a1 = t1 << 3;
0x00010834 srl t1, a2, 0x1d | t1 = a2 >> 0x1d;
0x00010838 or t1, t1, a1 | t1 |= a1;
0x0001083c addiu a0, a0, -0x3ff | a0 += -0x3ff;
0x00010840 lui a1, 0x80 | a1 = 0x800000;
0x00010844 or t1, t1, a1 | t1 |= a1;
0x00010848 sll t5, a2, 3 | t5 = a2 << 3;
0x0001084c subu t2, t2, a0 | __asm ("subu t2, t2, a0");
0x00010850 move a1, zero | a1 = 0;
| do {
| label_1:
0x00010854 sltiu a0, v1, 0x10 | a0 = (v1 < 0x10) ? 1 : 0;
0x00010858 xor t3, t3, a3 | t3 ^= a3;
| if (a0 == 0) {
0x0001085c beqz a0, 0x10ac0 | goto label_32;
| }
0x00010860 sll a0, v1, 2 | a0 = v1 << 2;
0x00010864 lw v1, -0x7fd8(gp) | v1 = *((gp - 8182));
0x00010868 addiu v1, v1, 0x4b50 | v1 += 0x4b50;
0x0001086c lwx v1, a0(v1) | __asm ("lwx v1, a0(v1)");
0x00010870 addu v1, v1, gp | v1 += gp;
0x00010874 jr v1 | v1 ();
0x00010878 nop |
| label_31:
0x0001087c addiu t2, t2, -0x7ff | t2 += -0x7ff;
| if (t5 != 0) {
0x00010880 bnez t5, 0x10a48 | goto label_33;
| }
0x00010884 ori v1, v1, 2 | v1 |= 2;
0x00010888 move t1, zero | t1 = 0;
0x0001088c addiu a1, zero, 2 | a1 = 2;
0x00010890 b 0x10854 |
| } while (1);
| do {
0x00010898 move a1, zero | a1 = 0;
0x0001089c move v0, zero | v0 = 0;
| label_0:
0x000108a0 move v1, zero | v1 = 0;
0x000108a4 ins v1, a1, 0, 0x14 | __asm ("ins v1, a1, 0, 0x14");
0x000108a8 ins v1, a0, 0x14, 0xb | __asm ("ins v1, a0, 0x14, 0xb");
0x000108ac ins v1, t3, 0x1f, 1 | __asm ("ins v1, t3, 0x1f, 1");
0x000108b0 jr ra | return v0;
| label_3:
0x000108e4 andi v1, v0, 7 | v1 = v0 & 7;
| if (a3 <= 0) {
0x000108e8 blez a3, 0x10d80 | goto label_34;
| }
0x000108ec andi v1, v0, 0xf | v1 = v0 & 0xf;
| if (v1 != 0) {
0x000108f0 bnez v1, 0x10e34 | goto label_35;
| }
0x000108f4 srl v0, v0, 3 | v0 >>= 3;
| label_14:
0x000108f8 ext v1, t0, 0x18, 1 | __asm ("ext v1, t0, 0x18, 1");
0x000108fc slti v1, a3, 0x7ff | v1 = (a3 < 0x7ff) ? 1 : 0;
| if (v1 != 0) {
0x00010900 beqz v1, 0x10918 |
0x00010904 lui v1, 0xfeff | v1 = 0xfeffffff;
0x00010908 ori v1, v1, 0xffff |
0x0001090c and t0, t0, v1 | t0 &= v1;
0x00010910 addiu a3, t2, 0x400 | a3 = t2 + 0x400;
0x00010914 slti v1, a3, 0x7ff | v1 = (a3 < 0x7ff) ? 1 : 0;
| }
0x00010918 beql v1, zero, 0x10898 |
| } while (v1 == 0);
0x0001091c addiu a0, zero, 0x7ff | a0 = 0x7ff;
0x00010920 sll v1, t0, 0x1d | v1 = t0 << 0x1d;
0x00010924 or v0, v1, v0 | v0 = v1 | v0;
0x00010928 ext a1, t0, 3, 0x14 | __asm ("ext a1, t0, 3, 0x14");
0x0001092c andi a0, a3, 0x7ff | a0 = a3 & 0x7ff;
0x00010930 b 0x108a0 | goto label_0;
| label_30:
0x0001096c or t5, t1, a2 | t5 = t1 | a2;
| if (t5 == 0) {
0x00010970 beql t5, zero, 0x10a3c | goto label_36;
| }
0x00010974 ori v1, v1, 1 | v1 |= 1;
| if (t1 == 0) {
0x00010978 beql t1, zero, 0x10cfc | goto label_37;
| }
0x0001097c clz a1, a2 | __asm ("clz a1, a2");
0x00010980 clz a0, t1 | __asm ("clz a0, t1");
0x00010984 addiu t7, a0, -0xb | t7 = a0 + -0xb;
| label_5:
0x00010988 addiu a1, zero, 0x1d | a1 = 0x1d;
0x0001098c addiu t5, a0, -8 | t5 = a0 + -8;
0x00010990 subu a1, a1, t7 | __asm ("subu a1, a1, t7");
0x00010994 sllv t1, t1, t5 | t1 <<= t5;
0x00010998 srlv a1, a2, a1 | a1 = a2 >> a1;
0x0001099c or t1, a1, t1 | t1 = a1 | t1;
0x000109a0 sllv t5, a2, t5 | t5 = a2 << t5;
| label_6:
0x000109a4 addu t2, a0, t2 | t2 = a0 + t2;
0x000109a8 addiu t2, t2, 0x3f3 | t2 += 0x3f3;
0x000109ac move a1, zero | a1 = 0;
0x000109b0 b 0x10854 | goto label_1;
| label_28:
0x000109b4 or t0, a1, a0 | t0 = a1 | a0;
0x000109b8 move v0, zero | v0 = 0;
| if (t0 == 0) {
0x000109bc beqz t0, 0x10a2c | goto label_38;
| }
| if (a1 == 0) {
0x000109c0 beql a1, zero, 0x10cdc | goto label_39;
| }
0x000109c4 clz t0, a0 | __asm ("clz t0, a0");
0x000109c8 clz v1, a1 | __asm ("clz v1, a1");
0x000109cc addiu t1, v1, -0xb | t1 = v1 + -0xb;
| do {
0x000109d0 addiu t0, zero, 0x1d | t0 = 0x1d;
0x000109d4 addiu v0, v1, -8 | v0 = v1 + -8;
0x000109d8 subu t0, t0, t1 | __asm ("subu t0, t0, t1");
0x000109dc sllv a1, a1, v0 | a1 <<= v0;
0x000109e0 srlv t0, a0, t0 | t0 = a0 >> t0;
0x000109e4 or t0, t0, a1 | t0 |= a1;
0x000109e8 sllv v0, a0, v0 | v0 = a0 << v0;
| label_4:
0x000109ec addiu t2, zero, -0x3f3 | t2 = -0x3f3;
0x000109f0 subu t2, t2, v1 | __asm ("subu t2, t2, v1");
0x000109f4 move t6, zero | t6 = 0;
0x000109f8 move v1, zero | v1 = 0;
0x000109fc b 0x10814 | goto label_2;
| label_29:
0x00010a00 move t0, a1 | t0 = a1;
| if (t0 != 0) {
0x00010a04 bnel t0, zero, 0x10a1c |
0x00010a08 move v0, zero | v0 = 0;
0x00010a0c addiu v1, zero, 8 | v1 = 8;
0x00010a10 addiu t2, zero, 0x7ff | t2 = 0x7ff;
0x00010a14 addiu t6, zero, 2 | t6 = 2;
0x00010a18 b 0x10814 | goto label_2;
| }
0x00010a1c addiu v1, zero, 0xc | v1 = 0xc;
0x00010a20 addiu t2, zero, 0x7ff | t2 = 0x7ff;
0x00010a24 addiu t6, zero, 3 | t6 = 3;
0x00010a28 b 0x10814 | goto label_2;
| label_38:
0x00010a2c addiu v1, zero, 4 | v1 = 4;
0x00010a30 move t2, zero | t2 = 0;
0x00010a34 addiu t6, zero, 1 | t6 = 1;
0x00010a38 b 0x10814 | goto label_2;
| label_36:
0x00010a3c move t1, zero | t1 = 0;
0x00010a40 addiu a1, zero, 1 | a1 = 1;
0x00010a44 b 0x10854 | goto label_1;
| label_33:
0x00010a48 ori v1, v1, 3 | v1 |= 3;
0x00010a4c move t5, a2 | t5 = a2;
0x00010a50 addiu a1, zero, 3 | a1 = 3;
0x00010a54 b 0x10854 | goto label_1;
| if (a3 == 0) {
| label_18:
0x00010a58 beql a3, zero, 0x10f5c | goto label_40;
| }
0x00010a5c addiu t2, zero, -0x3ff | t2 = -0x3ff;
0x00010a60 addiu v0, zero, -1 | v0 = -1;
0x00010a64 addiu a1, zero, 1 | a1 = 1;
| label_10:
0x00010a68 subu a1, a1, a3 | __asm ("subu a1, a1, a3");
0x00010a6c slti v1, a1, 0x39 | v1 = (a1 < 0x39) ? 1 : 0;
0x00010a70 slti v1, a1, 0x20 | v1 = (a1 < 0x20) ? 1 : 0;
| if (v1 == 0) {
0x00010a74 bnel v1, zero, 0x10e68 | goto label_41;
| }
0x00010a78 move a1, zero | a1 = 0;
0x00010a7c move v1, zero | v1 = 0;
0x00010a80 move a0, zero | a0 = 0;
0x00010a84 ins v1, a1, 0, 0x14 | __asm ("ins v1, a1, 0, 0x14");
0x00010a88 ins v1, a0, 0x14, 0xb | __asm ("ins v1, a0, 0x14, 0xb");
0x00010a8c move v0, zero | v0 = 0;
0x00010a90 ins v1, t3, 0x1f, 1 | __asm ("ins v1, t3, 0x1f, 1");
0x00010a94 jr ra | return v0;
| label_32:
0x00010ac0 sltu v1, t1, t0 | v1 = (t1 < t0) ? 1 : 0;
0x00010ac4 srl v1, v0, 1 | v1 = v0 >> 1;
| if (v1 != 0) {
0x00010ac8 bnez v1, 0x10d6c | goto label_42;
| }
0x00010acc sltu v1, v0, t5 | v1 = (v0 < t5) ? 1 : 0;
| if (t1 == t0) {
0x00010ad0 beq t1, t0, 0x10d60 | goto label_43;
| }
0x00010ad4 move a2, v0 | a2 = v0;
| label_8:
0x00010ad8 addiu t2, t2, -1 | t2 += -1;
0x00010adc move a1, t0 | a1 = t0;
0x00010ae0 move v0, zero | v0 = 0;
| label_9:
0x00010ae4 sll v1, t1, 8 | v1 = t1 << 8;
0x00010ae8 srl t1, t5, 0x18 | t1 = t5 >> 0x18;
0x00010aec or v1, t1, v1 | v1 = t1 | v1;
0x00010af0 srl t1, v1, 0x10 | t1 = v1 >> 0x10;
0x00010af4 divu zero, a1, t1 | __asm ("divu zero, a1, t1");
0x00010af8 teq t1, zero, 7 | __asm ("teq t1, zero, 7");
0x00010afc andi t4, v1, 0xffff | t4 = v1 & 0xffff;
0x00010b00 srl a3, a2, 0x10 | a3 = a2 >> 0x10;
0x00010b04 mflo t0 | __asm ("mflo t0");
0x00010b08 mfhi a0 | __asm ("mfhi a0");
0x00010b0c mul a1, t4, t0 | __asm ("mul a1, t4, t0");
0x00010b10 sll a0, a0, 0x10 | a0 <<= 0x10;
0x00010b14 or a3, a3, a0 | a3 |= a0;
0x00010b18 sltu a0, a3, a1 | a0 = (a3 < a1) ? 1 : 0;
0x00010b1c sll t5, t5, 8 | t5 <<= 8;
| if (a0 != 0) {
0x00010b20 beqz a0, 0x10b48 |
0x00010b24 addu a3, a3, v1 | a3 += v1;
0x00010b28 sltu a0, a3, v1 | a0 = (a3 < v1) ? 1 : 0;
0x00010b2c addiu t6, t0, -1 | t6 = t0 + -1;
| if (a0 != 0) {
0x00010b30 bnez a0, 0x10e58 | goto label_44;
| }
0x00010b34 sltu a0, a3, a1 | a0 = (a3 < a1) ? 1 : 0;
| if (a0 == 0) {
0x00010b38 beql a0, zero, 0x10b48 | goto label_15;
| }
0x00010b3c move t0, t6 | t0 = t6;
0x00010b40 addiu t0, t0, -2 | t0 += -2;
0x00010b44 addu a3, a3, v1 | a3 += v1;
| }
| label_15:
0x00010b48 subu a3, a3, a1 | __asm ("subu a3, a3, a1");
0x00010b4c divu zero, a3, t1 | __asm ("divu zero, a3, t1");
0x00010b50 teq t1, zero, 7 | __asm ("teq t1, zero, 7");
0x00010b54 andi a2, a2, 0xffff | a2 &= 0xffff;
0x00010b58 mflo a1 | __asm ("mflo a1");
0x00010b5c mfhi a3 | __asm ("mfhi a3");
0x00010b60 mul t6, t4, a1 | __asm ("mul t6, t4, a1");
0x00010b64 sll a0, a3, 0x10 | a0 = a3 << 0x10;
0x00010b68 or a0, a2, a0 | a0 = a2 | a0;
0x00010b6c sltu a2, a0, t6 | a2 = (a0 < t6) ? 1 : 0;
| if (a2 != 0) {
0x00010b70 beql a2, zero, 0x10ba0 |
0x00010b74 sll t0, t0, 0x10 | t0 <<= 0x10;
0x00010b78 addu a0, a0, v1 | a0 += v1;
0x00010b7c sltu a2, a0, v1 | a2 = (a0 < v1) ? 1 : 0;
0x00010b80 addiu a3, a1, -1 | a3 = a1 + -1;
| if (a2 != 0) {
0x00010b84 bnez a2, 0x10e60 | goto label_45;
| }
0x00010b88 sltu a2, a0, t6 | a2 = (a0 < t6) ? 1 : 0;
| if (a2 != 0) {
0x00010b8c beql a2, zero, 0x10b9c |
0x00010b90 move a1, a3 | a1 = a3;
0x00010b94 addiu a1, a1, -2 | a1 += -2;
0x00010b98 addu a0, a0, v1 | a0 += v1;
| }
| label_16:
0x00010b9c sll t0, t0, 0x10 | t0 <<= 0x10;
| }
0x00010ba0 or t0, t0, a1 | t0 |= a1;
0x00010ba4 multu t0, t5 | __asm ("multu t0, t5");
0x00010ba8 mfhi a3 | __asm ("mfhi a3");
0x00010bac subu a0, a0, t6 | __asm ("subu a0, a0, t6");
0x00010bb0 mflo a2 | __asm ("mflo a2");
0x00010bb4 sltu a1, a0, a3 | a1 = (a0 < a3) ? 1 : 0;
0x00010bb8 move t7, a3 | t7 = a3;
| if (a1 != 0) {
0x00010bbc bnez a1, 0x10d24 | goto label_46;
| }
0x00010bc0 sltu a1, v0, a2 | a1 = (v0 < a2) ? 1 : 0;
| if (a0 == a3) {
0x00010bc4 beq a0, a3, 0x10d1c | goto label_47;
| }
| label_21:
0x00010bc8 subu a0, a0, a3 | __asm ("subu a0, a0, a3");
| label_7:
0x00010bcc subu a2, v0, a2 | __asm ("subu a2, v0, a2");
0x00010bd0 sltu v0, v0, a2 | v0 = (v0 < a2) ? 1 : 0;
0x00010bd4 subu a0, a0, v0 | __asm ("subu a0, a0, v0");
0x00010bd8 addiu a3, t2, 0x3ff | a3 = t2 + 0x3ff;
| if (v1 == a0) {
0x00010bdc beq v1, a0, 0x10ec8 | goto label_48;
| }
0x00010be0 divu zero, a0, t1 | __asm ("divu zero, a0, t1");
0x00010be4 teq t1, zero, 7 | __asm ("teq t1, zero, 7");
0x00010be8 srl t6, a2, 0x10 | t6 = a2 >> 0x10;
0x00010bec mflo v0 | __asm ("mflo v0");
0x00010bf0 mfhi a0 | __asm ("mfhi a0");
0x00010bf4 mul t7, t4, v0 | __asm ("mul t7, t4, v0");
0x00010bf8 sll a1, a0, 0x10 | a1 = a0 << 0x10;
0x00010bfc or a1, t6, a1 | a1 = t6 | a1;
0x00010c00 sltu a0, a1, t7 | a0 = (a1 < t7) ? 1 : 0;
| if (a0 != 0) {
0x00010c04 beql a0, zero, 0x10c34 |
0x00010c08 subu a1, a1, t7 | __asm ("subu a1, a1, t7");
0x00010c0c addu a1, a1, v1 | a1 += v1;
0x00010c10 sltu a0, a1, v1 | a0 = (a1 < v1) ? 1 : 0;
0x00010c14 addiu t6, v0, -1 | t6 = v0 + -1;
| if (a0 != 0) {
0x00010c18 bnez a0, 0x10edc | goto label_49;
| }
0x00010c1c sltu a0, a1, t7 | a0 = (a1 < t7) ? 1 : 0;
| if (a0 != 0) {
0x00010c20 beql a0, zero, 0x10c30 |
0x00010c24 move v0, t6 | v0 = t6;
0x00010c28 addiu v0, v0, -2 | v0 += -2;
0x00010c2c addu a1, a1, v1 | a1 += v1;
| }
| label_19:
0x00010c30 subu a1, a1, t7 | __asm ("subu a1, a1, t7");
| }
0x00010c34 divu zero, a1, t1 | __asm ("divu zero, a1, t1");
0x00010c38 teq t1, zero, 7 | __asm ("teq t1, zero, 7");
0x00010c3c andi a2, a2, 0xffff | a2 &= 0xffff;
0x00010c40 mflo t1 | __asm ("mflo t1");
0x00010c44 mfhi a1 | __asm ("mfhi a1");
0x00010c48 mul t4, t4, t1 | __asm ("mul t4, t4, t1");
0x00010c4c sll a1, a1, 0x10 | a1 <<= 0x10;
0x00010c50 or a2, a2, a1 | a2 |= a1;
0x00010c54 sltu a0, a2, t4 | a0 = (a2 < t4) ? 1 : 0;
| if (a0 != 0) {
0x00010c58 beql a0, zero, 0x10c88 |
0x00010c5c sll v0, v0, 0x10 | v0 <<= 0x10;
0x00010c60 addu a2, a2, v1 | a2 += v1;
0x00010c64 sltu a0, a2, v1 | a0 = (a2 < v1) ? 1 : 0;
0x00010c68 addiu a1, t1, -1 | a1 = t1 + -1;
| if (a0 != 0) {
0x00010c6c bnez a0, 0x10ee4 | goto label_50;
| }
0x00010c70 sltu a0, a2, t4 | a0 = (a2 < t4) ? 1 : 0;
| if (a0 != 0) {
0x00010c74 beql a0, zero, 0x10c84 |
0x00010c78 move t1, a1 | t1 = a1;
0x00010c7c addiu t1, t1, -2 | t1 += -2;
0x00010c80 addu a2, a2, v1 | a2 += v1;
| }
| label_20:
0x00010c84 sll v0, v0, 0x10 | v0 <<= 0x10;
| }
0x00010c88 or v0, v0, t1 | v0 |= t1;
0x00010c8c multu t5, v0 | __asm ("multu t5, v0");
0x00010c90 mfhi a1 | __asm ("mfhi a1");
0x00010c94 subu a2, a2, t4 | __asm ("subu a2, a2, t4");
0x00010c98 mflo a0 | __asm ("mflo a0");
0x00010c9c mflo t6 | __asm ("mflo t6");
0x00010ca0 sltu t4, a2, a1 | t4 = (a2 < a1) ? 1 : 0;
0x00010ca4 move t1, a1 | t1 = a1;
| if (t4 == 0) {
0x00010ca8 beqz t4, 0x10e00 | goto label_51;
| }
0x00010cac addu a2, v1, a2 | a2 = v1 + a2;
0x00010cb0 sltu t4, a2, v1 | t4 = (a2 < v1) ? 1 : 0;
| label_11:
0x00010cb4 addiu t7, v0, -1 | t7 = v0 + -1;
| if (t4 != 0) {
0x00010cb8 bnez t4, 0x10f2c | goto label_52;
| }
0x00010cbc sltu t4, a2, a1 | t4 = (a2 < a1) ? 1 : 0;
0x00010cc0 sll a0, t5, 1 | a0 = t5 << 1;
| if (t4 == 0) {
0x00010cc4 bnel t4, zero, 0x10f00 | goto label_26;
| }
| if (a2 == t1) {
0x00010cc8 beql a2, t1, 0x10f64 | goto label_53;
| }
0x00010ccc sltu a0, t5, a0 | a0 = (t5 < a0) ? 1 : 0;
0x00010cd0 move v0, t7 | v0 = t7;
0x00010cd4 ori v0, v0, 1 | v0 |= 1;
0x00010cd8 b 0x108e4 | goto label_3;
| label_39:
0x00010cdc addiu t1, t0, 0x15 | t1 = t0 + 0x15;
0x00010ce0 slti v0, t1, 0x1d | v0 = (t1 < 0x1d) ? 1 : 0;
0x00010ce4 addiu v1, t0, 0x20 | v1 = t0 + 0x20;
0x00010ce8 bnez v0, 0x109d0 |
| } while (v0 != 0);
0x00010cec addiu t0, t0, -8 | t0 += -8;
0x00010cf0 sllv t0, a0, t0 | t0 = a0 << t0;
0x00010cf4 move v0, zero | v0 = 0;
0x00010cf8 b 0x109ec | goto label_4;
| label_37:
0x00010cfc addiu t7, a1, 0x15 | t7 = a1 + 0x15;
0x00010d00 slti t5, t7, 0x1d | t5 = (t7 < 0x1d) ? 1 : 0;
0x00010d04 addiu a0, a1, 0x20 | a0 = a1 + 0x20;
| if (t5 != 0) {
0x00010d08 bnez t5, 0x10988 | goto label_5;
| }
0x00010d0c addiu t1, a1, -8 | t1 = a1 + -8;
0x00010d10 move t5, zero | t5 = 0;
0x00010d14 sllv t1, a2, t1 | t1 = a2 << t1;
0x00010d18 b 0x109a4 | goto label_6;
| if (a1 == 0) {
| label_47:
0x00010d1c beql a1, zero, 0x10bcc | goto label_7;
| }
0x00010d20 move a0, zero | a0 = 0;
| label_46:
0x00010d24 addu v0, v0, t5 | v0 += t5;
0x00010d28 sltu t6, v0, t5 | t6 = (v0 < t5) ? 1 : 0;
0x00010d2c addu a1, t6, v1 | a1 = t6 + v1;
0x00010d30 addu a0, a1, a0 | a0 = a1 + a0;
0x00010d34 sltu a1, v1, a0 | a1 = (v1 < a0) ? 1 : 0;
0x00010d38 addiu t8, t0, -1 | t8 = t0 + -1;
| if (a1 == 0) {
0x00010d3c beqz a1, 0x10e18 | goto label_54;
| }
0x00010d40 sltu a1, a0, a3 | a1 = (a0 < a3) ? 1 : 0;
| label_13:
0x00010d44 addu v0, v0, t5 | v0 += t5;
| if (a1 == 0) {
0x00010d48 bnel a1, zero, 0x10eec | goto label_55;
| }
0x00010d4c sltu a1, v0, a2 | a1 = (v0 < a2) ? 1 : 0;
| if (t7 == a0) {
0x00010d50 beq t7, a0, 0x10eb4 | goto label_56;
| }
0x00010d54 subu a0, a0, a3 | __asm ("subu a0, a0, a3");
| label_12:
0x00010d58 move t0, t8 | t0 = t8;
0x00010d5c b 0x10bcc | goto label_7;
| label_43:
0x00010d60 move a2, v0 | a2 = v0;
| if (v1 == 0) {
0x00010d64 bnel v1, zero, 0x10ad8 | goto label_8;
| }
0x00010d68 srl v1, v0, 1 | v1 = v0 >> 1;
| label_42:
0x00010d6c sll a2, t0, 0x1f | a2 = t0 << 0x1f;
0x00010d70 srl a1, t0, 1 | a1 = t0 >> 1;
0x00010d74 or a2, a2, v1 | a2 |= v1;
0x00010d78 sll v0, v0, 0x1f | v0 <<= 0x1f;
0x00010d7c b 0x10ae4 | goto label_9;
| label_34:
0x00010d80 addiu a1, zero, 1 | a1 = 1;
| if (a3 == 0) {
0x00010d84 bnel a3, zero, 0x10a68 | goto label_10;
| }
| label_25:
0x00010d88 addiu a1, zero, 1 | a1 = 1;
| label_17:
0x00010d8c addiu t2, t2, 0x41e | t2 += 0x41e;
0x00010d90 srlv a0, v0, a1 | a0 = v0 >> a1;
0x00010d94 sllv v1, t0, t2 | v1 = t0 << t2;
0x00010d98 sllv v0, v0, t2 | v0 <<= t2;
0x00010d9c sltu v0, zero, v0 | v0 = (0 < v0) ? 1 : 0;
0x00010da0 or v1, v1, a0 | v1 |= a0;
0x00010da4 or v1, v1, v0 | v1 |= v0;
0x00010da8 andi v0, v1, 7 | v0 = v1 & 7;
0x00010dac srlv a1, t0, a1 | a1 = t0 >> a1;
| if (v0 != 0) {
0x00010db0 beqz v0, 0x10dd4 |
0x00010db4 andi v0, v1, 0xf | v0 = v1 & 0xf;
0x00010db8 addiu a0, zero, 4 | a0 = 4;
0x00010dbc ext v0, a1, 0x17, 1 | __asm ("ext v0, a1, 0x17, 1");
| if (v0 == a0) {
0x00010dc0 beq v0, a0, 0x10dd8 | goto label_57;
| }
| label_23:
0x00010dc4 addiu v0, v1, 4 | v0 = v1 + 4;
0x00010dc8 sltu v1, v0, v1 | v1 = (v0 < v1) ? 1 : 0;
0x00010dcc addu a1, a1, v1 | a1 += v1;
0x00010dd0 move v1, v0 | v1 = v0;
| }
0x00010dd4 ext v0, a1, 0x17, 1 | __asm ("ext v0, a1, 0x17, 1");
| if (v0 == 0) {
| label_57:
0x00010dd8 beql v0, zero, 0x10f54 | goto label_58;
| }
0x00010ddc sll v0, a1, 0x1d | v0 = a1 << 0x1d;
0x00010de0 addiu a0, zero, 1 | a0 = 1;
0x00010de4 move a1, zero | a1 = 0;
0x00010de8 move v0, zero | v0 = 0;
0x00010dec b 0x108a0 | goto label_0;
| label_51:
0x00010e00 ori v0, v0, 1 | v0 |= 1;
| if (a2 == a1) {
0x00010e04 bnel a2, a1, 0x108e4 | goto label_3;
| }
0x00010e08 addu a2, v1, a2 | a2 = v1 + a2;
| if (a0 == 0) {
0x00010e0c beqz a0, 0x108e4 | goto label_3;
| }
0x00010e10 sltu t4, a2, v1 | t4 = (a2 < v1) ? 1 : 0;
0x00010e14 b 0x10cb4 | goto label_11;
| label_54:
0x00010e18 subu a0, a0, a3 | __asm ("subu a0, a0, a3");
| if (v1 == a0) {
0x00010e1c bnel v1, a0, 0x10d58 | goto label_12;
| }
0x00010e20 sltu a1, a0, a3 | a1 = (a0 < a3) ? 1 : 0;
| if (t6 == 0) {
0x00010e24 beqz t6, 0x10d44 | goto label_13;
| }
0x00010e28 subu a0, v1, a3 | __asm ("subu a0, v1, a3");
0x00010e2c move t0, t8 | t0 = t8;
0x00010e30 b 0x10bcc | goto label_7;
| label_35:
0x00010e34 addiu a0, zero, 4 | a0 = 4;
| if (v1 == a0) {
0x00010e38 beql v1, a0, 0x108f8 | goto label_14;
| }
0x00010e3c srl v0, v0, 3 | v0 >>= 3;
0x00010e40 sltiu v1, v0, -4 | v1 = (v0 < -4) ? 1 : 0;
0x00010e44 xori v1, v1, 1 | v1 ^= 1;
0x00010e48 addiu v0, v0, 4 | v0 += 4;
0x00010e4c srl v0, v0, 3 | v0 >>= 3;
0x00010e50 addu t0, t0, v1 | t0 += v1;
0x00010e54 b 0x108f8 | goto label_14;
| label_44:
0x00010e58 move t0, t6 | t0 = t6;
0x00010e5c b 0x10b48 | goto label_15;
| label_45:
0x00010e60 move a1, a3 | a1 = a3;
0x00010e64 b 0x10b9c | goto label_16;
| label_41:
0x00010e68 addiu v1, zero, -0x1f | v1 = -0x1f;
| if (v1 != 0) {
0x00010e6c bnez v1, 0x10d8c | goto label_17;
| }
0x00010e70 subu v1, v1, a3 | __asm ("subu v1, v1, a3");
0x00010e74 addiu a0, zero, 0x20 | a0 = 0x20;
0x00010e78 srlv v1, t0, v1 | v1 = t0 >> v1;
| if (a1 != a0) {
0x00010e7c beq a1, a0, 0x10e8c |
0x00010e80 addiu a1, t2, 0x43e | a1 = t2 + 0x43e;
0x00010e84 sllv a1, t0, a1 | a1 = t0 << a1;
0x00010e88 or v0, v0, a1 | v0 |= a1;
| }
0x00010e8c sltu v0, zero, v0 | v0 = (0 < v0) ? 1 : 0;
0x00010e90 or v1, v0, v1 | v1 = v0 | v1;
0x00010e94 andi v0, v1, 7 | v0 = v1 & 7;
0x00010e98 andi v0, v1, 0xf | v0 = v1 & 0xf;
| if (v0 == 0) {
0x00010e9c bnel v0, zero, 0x10f44 | goto label_59;
| }
0x00010ea0 move a1, zero | a1 = 0;
| label_24:
0x00010ea4 srl v1, v1, 3 | v1 >>= 3;
0x00010ea8 or v0, v1, v0 | v0 = v1 | v0;
0x00010eac move a0, zero | a0 = 0;
0x00010eb0 b 0x108a0 | goto label_0;
| label_56:
0x00010eb4 addu v0, v0, t5 | v0 += t5;
| if (a1 == 0) {
0x00010eb8 bnel a1, zero, 0x10eec | goto label_55;
| }
0x00010ebc move t0, t8 | t0 = t8;
0x00010ec0 move a0, zero | a0 = 0;
0x00010ec4 b 0x10bcc | goto label_7;
| label_48:
0x00010ec8 addiu v1, zero, 1 | v1 = 1;
| if (a3 <= 0) {
0x00010ecc blez a3, 0x10a58 | goto label_18;
| }
0x00010ed0 move v0, zero | v0 = 0;
0x00010ed4 addu t0, t0, v1 | t0 += v1;
0x00010ed8 b 0x108f8 | goto label_14;
| label_49:
0x00010edc move v0, t6 | v0 = t6;
0x00010ee0 b 0x10c30 | goto label_19;
| label_50:
0x00010ee4 move t1, a1 | t1 = a1;
0x00010ee8 b 0x10c84 | goto label_20;
| label_55:
0x00010eec sltu a1, v0, t5 | a1 = (v0 < t5) ? 1 : 0;
0x00010ef0 addu a1, a1, v1 | a1 += v1;
0x00010ef4 addu a0, a1, a0 | a0 = a1 + a0;
0x00010ef8 addiu t0, t0, -2 | t0 += -2;
0x00010efc b 0x10bc8 | goto label_21;
| label_26:
0x00010f00 sltu t5, a0, t5 | t5 = (a0 < t5) ? 1 : 0;
0x00010f04 addu v1, t5, v1 | v1 = t5 + v1;
0x00010f08 addiu v0, v0, -2 | v0 += -2;
0x00010f0c addu a2, a2, v1 | a2 += v1;
0x00010f10 move t5, a0 | t5 = a0;
| label_22:
0x00010f14 ori v0, v0, 1 | v0 |= 1;
| if (a2 == t1) {
0x00010f18 bnel a2, t1, 0x108e4 | goto label_3;
| }
| label_27:
0x00010f1c ori v0, v0, 1 | v0 |= 1;
| if (t6 == t5) {
0x00010f20 bnel t6, t5, 0x108e4 | goto label_3;
| }
0x00010f24 b 0x108e4 | goto label_3;
0x00010f28 nop |
| label_52:
0x00010f2c move v0, t7 | v0 = t7;
0x00010f30 b 0x10f14 | goto label_22;
| label_59:
0x00010f44 addiu a0, zero, 4 | a0 = 4;
0x00010f48 move a1, zero | a1 = 0;
| if (v0 != a0) {
0x00010f4c bne v0, a0, 0x10dc4 | goto label_23;
| }
0x00010f50 sll v0, a1, 0x1d | v0 = a1 << 0x1d;
| label_58:
0x00010f54 ext a1, a1, 3, 0x14 | __asm ("ext a1, a1, 3, 0x14");
0x00010f58 b 0x10ea4 | goto label_24;
| label_40:
0x00010f5c addiu v0, zero, -1 | v0 = -1;
0x00010f60 b 0x10d88 | goto label_25;
| label_53:
0x00010f64 sll a0, t5, 1 | a0 = t5 << 1;
| if (a0 != 0) {
0x00010f68 bnez a0, 0x10f00 | goto label_26;
| }
0x00010f6c move v0, t7 | v0 = t7;
0x00010f70 b 0x10f1c | goto label_27;
| }
[*] Function strcat used 1 times libgstartpec.so
