[*] Binary protection state of libcrypto.so.1.1
Full RELRO Canary found NX enabled DSO No RPATH No RUNPATH No Symbols
[*] Function system tear down of libcrypto.so.1.1
r2dec has crashed (info: /logs/firmware/patool_extraction/rootfs.img_unblob_extracted/rootfs.img_extract/0-50593792.squashfs_v4_le_extract/usr/lib/libcrypto.so.1.1 @ 0x8d574).
Please report the bug at https://github.com/radareorg/r2dec-js/issues
Use the option '--issue' or the command 'pddi' to generate
the needed data for the issue.
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/patool_extraction/rootfs.img_unblob_extracted/rootfs.img_extract/0-50593792.squashfs_v4_le_extract/usr/lib/libcrypto.so.1.1 @ 0x106c40 */
| #include <stdint.h>
|
| #define SWAP32(n) ((uint32_t) (((n & 0x000000ff) << 24) | \
| ((n & 0x0000ff00) << 8) | \
| ((n & 0x00ff0000) >> 8) | \
| ((n & 0xff000000) >> 24)))
| uint32_t rotate_right32 (uint32_t value, uint32_t count) {
| const uint32_t mask = (CHAR_BIT * sizeof (value)) - 1;
| count &= mask;
| return (value >> count) | (value << (-count & mask));
| }
| #define BIT_MASK(t,v) ((t)(-((v)!= 0)))&(((t)-1)>>((sizeof(t)*CHAR_BIT)-(v)))
|
; (fcn) fcn.00106c40 () | void fcn_00106c40 (int16_t arg_28h, int16_t arg_2ch, int16_t arg_30h, int16_t arg_34h, int16_t arg_38h, int16_t arg_3ch, int16_t arg_40h, int16_t arg_44h, int16_t arg_48h, int16_t arg_4ch, int16_t arg1, int16_t arg2, int16_t arg3) {
| int16_t var_0h_2;
| int16_t var_4h_2;
| int16_t var_8h_2;
| int16_t var_ch_2;
| int16_t var_10h_2;
| int16_t var_14h_2;
| int16_t var_18h_2;
| int16_t var_1ch_2;
| int16_t var_20h_2;
| int16_t var_24h_2;
| int16_t var_28h;
| int16_t var_2ch;
| int16_t var_30h;
| int16_t var_34h;
| int16_t var_38h;
| int16_t var_3ch;
| int16_t var_40h;
| int16_t var_44h;
| int16_t var_0h;
| int16_t var_4h;
| int16_t var_8h;
| int16_t var_ch;
| int16_t var_10h;
| int16_t var_14h;
| int16_t var_18h;
| int16_t var_1ch;
| int16_t var_20h;
| int16_t var_24h;
| r0 = arg1;
| r1 = arg2;
| r2 = arg3;
0x00106c40 subw r3, pc, 4 | __asm ("subw r3, pc, 4");
0x00106c44 ldr.w ip, [pc, -0x24] | ip = *(0x106c24);
0x00106c48 ldr.w ip, [r3, ip] | ip = *((r3 + ip));
0x00106c4c tst.w ip, 0x10 |
| if ((ip & 0x10) != 0) {
0x00106c50 bne.w 0x108240 | goto label_0;
| }
0x00106c54 tst.w ip, 1 |
| if ((ip & 1) == 0) {
0x00106c58 bne.w 0x1077b0 |
0x00106c5c add.w r2, r1, r2, lsl 6 | r2 = r1 + (r2 << 6);
0x00106c60 push.w {r0, r1, r2, r4, r5, r6, r7, r8, sb, sl, fp, lr} |
0x00106c64 ldm.w r0, {r4, r5, r6, r7, r8, sb, sl, fp} | r4 = *(r0);
| r5 = *((r0 + 4));
| r6 = *((r0 + 8));
| r7 = *((r0 + 12));
| r8 = *((r0 + 16));
| sb = *((r0 + 20));
| sl = *((r0 + 24));
| fp = *((r0 + 28));
0x00106c68 sub.w lr, r3, 0x120 | lr = r3 - 0x120;
0x00106c6c sub sp, 0x40 |
0x00106c6e ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x00106c72 eor.w r3, r5, r6 | r3 = r5 ^ r6;
0x00106c76 eor.w ip, ip, ip |
0x00106c7a eor.w r0, r8, r8, ror 5 | r0 = r8 ^ (r8 >>> 5);
0x00106c7e add r4, ip | r4 += ip;
0x00106c80 eor.w r0, r0, r8, ror 19 | r0 ^= (r8 >>> 19);
0x00106c84 rev r2, r2 | r2 = SWAP32 (r2);
0x00106c86 ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x00106c8a add fp, r2 |
0x00106c8c str r2, [sp] | *(sp) = r2;
0x00106c8e eor.w r2, sb, sl | r2 = sb ^ sl;
0x00106c92 add.w fp, fp, r0, ror 6 |
0x00106c96 and.w r2, r2, r8 | r2 &= r8;
0x00106c9a add fp, ip |
0x00106c9c eor.w r2, r2, sl | r2 ^= sl;
0x00106ca0 eor.w r0, r4, r4, ror 11 | r0 = r4 ^ (r4 >>> 11);
0x00106ca4 add fp, r2 |
0x00106ca6 ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x00106caa eor.w ip, r4, r5 |
0x00106cae eor.w r0, r0, r4, ror 20 | r0 ^= (r4 >>> 20);
0x00106cb2 and.w r3, r3, ip | r3 &= ip;
0x00106cb6 add r7, fp | r7 += fp;
0x00106cb8 eor.w r3, r3, r5 | r3 ^= r5;
0x00106cbc add.w fp, fp, r0, ror 2 |
0x00106cc0 eor.w r0, r7, r7, ror 5 | r0 = r7 ^ (r7 >>> 5);
0x00106cc4 add fp, r3 |
0x00106cc6 eor.w r0, r0, r7, ror 19 | r0 ^= (r7 >>> 19);
0x00106cca rev r2, r2 | r2 = SWAP32 (r2);
0x00106ccc ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x00106cd0 add sl, r2 | sl += r2;
0x00106cd2 str r2, [sp, 4] | var_4h_2 = r2;
0x00106cd4 eor.w r2, r8, sb | r2 = r8 ^ sb;
0x00106cd8 add.w sl, sl, r0, ror 6 | sl += (r0 >>> 6);
0x00106cdc and.w r2, r2, r7 | r2 &= r7;
0x00106ce0 add sl, r3 | sl += r3;
0x00106ce2 eor.w r2, r2, sb | r2 ^= sb;
0x00106ce6 eor.w r0, fp, fp, ror 11 | r0 = fp ^ (fp >>> 11);
0x00106cea add sl, r2 | sl += r2;
0x00106cec ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x00106cf0 eor.w r3, fp, r4 | r3 = fp ^ r4;
0x00106cf4 eor.w r0, r0, fp, ror 20 | r0 ^= (fp >>> 20);
0x00106cf8 and.w ip, ip, r3 |
0x00106cfc add r6, sl | r6 += sl;
0x00106cfe eor.w ip, ip, r4 |
0x00106d02 add.w sl, sl, r0, ror 2 | sl += (r0 >>> 2);
0x00106d06 eor.w r0, r6, r6, ror 5 | r0 = r6 ^ (r6 >>> 5);
0x00106d0a add sl, ip | sl += ip;
0x00106d0c eor.w r0, r0, r6, ror 19 | r0 ^= (r6 >>> 19);
0x00106d10 rev r2, r2 | r2 = SWAP32 (r2);
0x00106d12 ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x00106d16 add sb, r2 | sb += r2;
0x00106d18 str r2, [sp, 8] | var_8h_2 = r2;
0x00106d1a eor.w r2, r7, r8 | r2 = r7 ^ r8;
0x00106d1e add.w sb, sb, r0, ror 6 | sb += (r0 >>> 6);
0x00106d22 and.w r2, r2, r6 | r2 &= r6;
0x00106d26 add sb, ip | sb += ip;
0x00106d28 eor.w r2, r2, r8 | r2 ^= r8;
0x00106d2c eor.w r0, sl, sl, ror 11 | r0 = sl ^ (sl >>> 11);
0x00106d30 add sb, r2 | sb += r2;
0x00106d32 ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x00106d36 eor.w ip, sl, fp |
0x00106d3a eor.w r0, r0, sl, ror 20 | r0 ^= (sl >>> 20);
0x00106d3e and.w r3, r3, ip | r3 &= ip;
0x00106d42 add r5, sb | r5 += sb;
0x00106d44 eor.w r3, r3, fp | r3 ^= fp;
0x00106d48 add.w sb, sb, r0, ror 2 | sb += (r0 >>> 2);
0x00106d4c eor.w r0, r5, r5, ror 5 | r0 = r5 ^ (r5 >>> 5);
0x00106d50 add sb, r3 | sb += r3;
0x00106d52 eor.w r0, r0, r5, ror 19 | r0 ^= (r5 >>> 19);
0x00106d56 rev r2, r2 | r2 = SWAP32 (r2);
0x00106d58 ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x00106d5c add r8, r2 | r8 += r2;
0x00106d5e str r2, [sp, 0xc] | var_ch_2 = r2;
0x00106d60 eor.w r2, r6, r7 | r2 = r6 ^ r7;
0x00106d64 add.w r8, r8, r0, ror 6 | r8 += (r0 >>> 6);
0x00106d68 and.w r2, r2, r5 | r2 &= r5;
0x00106d6c add r8, r3 | r8 += r3;
0x00106d6e eor.w r2, r2, r7 | r2 ^= r7;
0x00106d72 eor.w r0, sb, sb, ror 11 | r0 = sb ^ (sb >>> 11);
0x00106d76 add r8, r2 | r8 += r2;
0x00106d78 ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x00106d7c eor.w r3, sb, sl | r3 = sb ^ sl;
0x00106d80 eor.w r0, r0, sb, ror 20 | r0 ^= (sb >>> 20);
0x00106d84 and.w ip, ip, r3 |
0x00106d88 add r4, r8 | r4 += r8;
0x00106d8a eor.w ip, ip, sl |
0x00106d8e add.w r8, r8, r0, ror 2 | r8 += (r0 >>> 2);
0x00106d92 eor.w r0, r4, r4, ror 5 | r0 = r4 ^ (r4 >>> 5);
0x00106d96 add r8, ip | r8 += ip;
0x00106d98 eor.w r0, r0, r4, ror 19 | r0 ^= (r4 >>> 19);
0x00106d9c rev r2, r2 | r2 = SWAP32 (r2);
0x00106d9e ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x00106da2 add r7, r2 | r7 += r2;
0x00106da4 str r2, [sp, 0x10] | var_10h_2 = r2;
0x00106da6 eor.w r2, r5, r6 | r2 = r5 ^ r6;
0x00106daa add.w r7, r7, r0, ror 6 | r7 += (r0 >>> 6);
0x00106dae and.w r2, r2, r4 | r2 &= r4;
0x00106db2 add r7, ip | r7 += ip;
0x00106db4 eor.w r2, r2, r6 | r2 ^= r6;
0x00106db8 eor.w r0, r8, r8, ror 11 | r0 = r8 ^ (r8 >>> 11);
0x00106dbc add r7, r2 | r7 += r2;
0x00106dbe ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x00106dc2 eor.w ip, r8, sb |
0x00106dc6 eor.w r0, r0, r8, ror 20 | r0 ^= (r8 >>> 20);
0x00106dca and.w r3, r3, ip | r3 &= ip;
0x00106dce add fp, r7 |
0x00106dd0 eor.w r3, r3, sb | r3 ^= sb;
0x00106dd4 add.w r7, r7, r0, ror 2 | r7 += (r0 >>> 2);
0x00106dd8 eor.w r0, fp, fp, ror 5 | r0 = fp ^ (fp >>> 5);
0x00106ddc add r7, r3 | r7 += r3;
0x00106dde eor.w r0, r0, fp, ror 19 | r0 ^= (fp >>> 19);
0x00106de2 rev r2, r2 | r2 = SWAP32 (r2);
0x00106de4 ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x00106de8 add r6, r2 | r6 += r2;
0x00106dea str r2, [sp, 0x14] | var_14h_2 = r2;
0x00106dec eor.w r2, r4, r5 | r2 = r4 ^ r5;
0x00106df0 add.w r6, r6, r0, ror 6 | r6 += (r0 >>> 6);
0x00106df4 and.w r2, r2, fp | r2 &= fp;
0x00106df8 add r6, r3 | r6 += r3;
0x00106dfa eor.w r2, r2, r5 | r2 ^= r5;
0x00106dfe eor.w r0, r7, r7, ror 11 | r0 = r7 ^ (r7 >>> 11);
0x00106e02 add r6, r2 | r6 += r2;
0x00106e04 ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x00106e08 eor.w r3, r7, r8 | r3 = r7 ^ r8;
0x00106e0c eor.w r0, r0, r7, ror 20 | r0 ^= (r7 >>> 20);
0x00106e10 and.w ip, ip, r3 |
0x00106e14 add sl, r6 | sl += r6;
0x00106e16 eor.w ip, ip, r8 |
0x00106e1a add.w r6, r6, r0, ror 2 | r6 += (r0 >>> 2);
0x00106e1e eor.w r0, sl, sl, ror 5 | r0 = sl ^ (sl >>> 5);
0x00106e22 add r6, ip | r6 += ip;
0x00106e24 eor.w r0, r0, sl, ror 19 | r0 ^= (sl >>> 19);
0x00106e28 rev r2, r2 | r2 = SWAP32 (r2);
0x00106e2a ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x00106e2e add r5, r2 | r5 += r2;
0x00106e30 str r2, [sp, 0x18] | var_18h_2 = r2;
0x00106e32 eor.w r2, fp, r4 | r2 = fp ^ r4;
0x00106e36 add.w r5, r5, r0, ror 6 | r5 += (r0 >>> 6);
0x00106e3a and.w r2, r2, sl | r2 &= sl;
0x00106e3e add r5, ip | r5 += ip;
0x00106e40 eor.w r2, r2, r4 | r2 ^= r4;
0x00106e44 eor.w r0, r6, r6, ror 11 | r0 = r6 ^ (r6 >>> 11);
0x00106e48 add r5, r2 | r5 += r2;
0x00106e4a ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x00106e4e eor.w ip, r6, r7 |
0x00106e52 eor.w r0, r0, r6, ror 20 | r0 ^= (r6 >>> 20);
0x00106e56 and.w r3, r3, ip | r3 &= ip;
0x00106e5a add sb, r5 | sb += r5;
0x00106e5c eor.w r3, r3, r7 | r3 ^= r7;
0x00106e60 add.w r5, r5, r0, ror 2 | r5 += (r0 >>> 2);
0x00106e64 eor.w r0, sb, sb, ror 5 | r0 = sb ^ (sb >>> 5);
0x00106e68 add r5, r3 | r5 += r3;
0x00106e6a eor.w r0, r0, sb, ror 19 | r0 ^= (sb >>> 19);
0x00106e6e rev r2, r2 | r2 = SWAP32 (r2);
0x00106e70 ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x00106e74 add r4, r2 | r4 += r2;
0x00106e76 str r2, [sp, 0x1c] | var_1ch_2 = r2;
0x00106e78 eor.w r2, sl, fp | r2 = sl ^ fp;
0x00106e7c add.w r4, r4, r0, ror 6 | r4 += (r0 >>> 6);
0x00106e80 and.w r2, r2, sb | r2 &= sb;
0x00106e84 add r4, r3 | r4 += r3;
0x00106e86 eor.w r2, r2, fp | r2 ^= fp;
0x00106e8a eor.w r0, r5, r5, ror 11 | r0 = r5 ^ (r5 >>> 11);
0x00106e8e add r4, r2 | r4 += r2;
0x00106e90 ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x00106e94 eor.w r3, r5, r6 | r3 = r5 ^ r6;
0x00106e98 eor.w r0, r0, r5, ror 20 | r0 ^= (r5 >>> 20);
0x00106e9c and.w ip, ip, r3 |
0x00106ea0 add r8, r4 | r8 += r4;
0x00106ea2 eor.w ip, ip, r6 |
0x00106ea6 add.w r4, r4, r0, ror 2 | r4 += (r0 >>> 2);
0x00106eaa eor.w r0, r8, r8, ror 5 | r0 = r8 ^ (r8 >>> 5);
0x00106eae add r4, ip | r4 += ip;
0x00106eb0 eor.w r0, r0, r8, ror 19 | r0 ^= (r8 >>> 19);
0x00106eb4 rev r2, r2 | r2 = SWAP32 (r2);
0x00106eb6 ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x00106eba add fp, r2 |
0x00106ebc str r2, [sp, 0x20] | var_20h_2 = r2;
0x00106ebe eor.w r2, sb, sl | r2 = sb ^ sl;
0x00106ec2 add.w fp, fp, r0, ror 6 |
0x00106ec6 and.w r2, r2, r8 | r2 &= r8;
0x00106eca add fp, ip |
0x00106ecc eor.w r2, r2, sl | r2 ^= sl;
0x00106ed0 eor.w r0, r4, r4, ror 11 | r0 = r4 ^ (r4 >>> 11);
0x00106ed4 add fp, r2 |
0x00106ed6 ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x00106eda eor.w ip, r4, r5 |
0x00106ede eor.w r0, r0, r4, ror 20 | r0 ^= (r4 >>> 20);
0x00106ee2 and.w r3, r3, ip | r3 &= ip;
0x00106ee6 add r7, fp | r7 += fp;
0x00106ee8 eor.w r3, r3, r5 | r3 ^= r5;
0x00106eec add.w fp, fp, r0, ror 2 |
0x00106ef0 eor.w r0, r7, r7, ror 5 | r0 = r7 ^ (r7 >>> 5);
0x00106ef4 add fp, r3 |
0x00106ef6 eor.w r0, r0, r7, ror 19 | r0 ^= (r7 >>> 19);
0x00106efa rev r2, r2 | r2 = SWAP32 (r2);
0x00106efc ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x00106f00 add sl, r2 | sl += r2;
0x00106f02 str r2, [sp, 0x24] | var_24h_2 = r2;
0x00106f04 eor.w r2, r8, sb | r2 = r8 ^ sb;
0x00106f08 add.w sl, sl, r0, ror 6 | sl += (r0 >>> 6);
0x00106f0c and.w r2, r2, r7 | r2 &= r7;
0x00106f10 add sl, r3 | sl += r3;
0x00106f12 eor.w r2, r2, sb | r2 ^= sb;
0x00106f16 eor.w r0, fp, fp, ror 11 | r0 = fp ^ (fp >>> 11);
0x00106f1a add sl, r2 | sl += r2;
0x00106f1c ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x00106f20 eor.w r3, fp, r4 | r3 = fp ^ r4;
0x00106f24 eor.w r0, r0, fp, ror 20 | r0 ^= (fp >>> 20);
0x00106f28 and.w ip, ip, r3 |
0x00106f2c add r6, sl | r6 += sl;
0x00106f2e eor.w ip, ip, r4 |
0x00106f32 add.w sl, sl, r0, ror 2 | sl += (r0 >>> 2);
0x00106f36 eor.w r0, r6, r6, ror 5 | r0 = r6 ^ (r6 >>> 5);
0x00106f3a add sl, ip | sl += ip;
0x00106f3c eor.w r0, r0, r6, ror 19 | r0 ^= (r6 >>> 19);
0x00106f40 rev r2, r2 | r2 = SWAP32 (r2);
0x00106f42 ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x00106f46 add sb, r2 | sb += r2;
0x00106f48 str r2, [sp, 0x28] | var_28h = r2;
0x00106f4a eor.w r2, r7, r8 | r2 = r7 ^ r8;
0x00106f4e add.w sb, sb, r0, ror 6 | sb += (r0 >>> 6);
0x00106f52 and.w r2, r2, r6 | r2 &= r6;
0x00106f56 add sb, ip | sb += ip;
0x00106f58 eor.w r2, r2, r8 | r2 ^= r8;
0x00106f5c eor.w r0, sl, sl, ror 11 | r0 = sl ^ (sl >>> 11);
0x00106f60 add sb, r2 | sb += r2;
0x00106f62 ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x00106f66 eor.w ip, sl, fp |
0x00106f6a eor.w r0, r0, sl, ror 20 | r0 ^= (sl >>> 20);
0x00106f6e and.w r3, r3, ip | r3 &= ip;
0x00106f72 add r5, sb | r5 += sb;
0x00106f74 eor.w r3, r3, fp | r3 ^= fp;
0x00106f78 add.w sb, sb, r0, ror 2 | sb += (r0 >>> 2);
0x00106f7c eor.w r0, r5, r5, ror 5 | r0 = r5 ^ (r5 >>> 5);
0x00106f80 add sb, r3 | sb += r3;
0x00106f82 eor.w r0, r0, r5, ror 19 | r0 ^= (r5 >>> 19);
0x00106f86 rev r2, r2 | r2 = SWAP32 (r2);
0x00106f88 ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x00106f8c add r8, r2 | r8 += r2;
0x00106f8e str r2, [sp, 0x2c] | var_2ch = r2;
0x00106f90 eor.w r2, r6, r7 | r2 = r6 ^ r7;
0x00106f94 add.w r8, r8, r0, ror 6 | r8 += (r0 >>> 6);
0x00106f98 and.w r2, r2, r5 | r2 &= r5;
0x00106f9c add r8, r3 | r8 += r3;
0x00106f9e eor.w r2, r2, r7 | r2 ^= r7;
0x00106fa2 eor.w r0, sb, sb, ror 11 | r0 = sb ^ (sb >>> 11);
0x00106fa6 add r8, r2 | r8 += r2;
0x00106fa8 ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x00106fac eor.w r3, sb, sl | r3 = sb ^ sl;
0x00106fb0 eor.w r0, r0, sb, ror 20 | r0 ^= (sb >>> 20);
0x00106fb4 and.w ip, ip, r3 |
0x00106fb8 add r4, r8 | r4 += r8;
0x00106fba eor.w ip, ip, sl |
0x00106fbe add.w r8, r8, r0, ror 2 | r8 += (r0 >>> 2);
0x00106fc2 eor.w r0, r4, r4, ror 5 | r0 = r4 ^ (r4 >>> 5);
0x00106fc6 add r8, ip | r8 += ip;
0x00106fc8 eor.w r0, r0, r4, ror 19 | r0 ^= (r4 >>> 19);
0x00106fcc rev r2, r2 | r2 = SWAP32 (r2);
0x00106fce ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x00106fd2 add r7, r2 | r7 += r2;
0x00106fd4 str r2, [sp, 0x30] | var_30h = r2;
0x00106fd6 eor.w r2, r5, r6 | r2 = r5 ^ r6;
0x00106fda add.w r7, r7, r0, ror 6 | r7 += (r0 >>> 6);
0x00106fde and.w r2, r2, r4 | r2 &= r4;
0x00106fe2 add r7, ip | r7 += ip;
0x00106fe4 eor.w r2, r2, r6 | r2 ^= r6;
0x00106fe8 eor.w r0, r8, r8, ror 11 | r0 = r8 ^ (r8 >>> 11);
0x00106fec add r7, r2 | r7 += r2;
0x00106fee ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x00106ff2 eor.w ip, r8, sb |
0x00106ff6 eor.w r0, r0, r8, ror 20 | r0 ^= (r8 >>> 20);
0x00106ffa and.w r3, r3, ip | r3 &= ip;
0x00106ffe add fp, r7 |
0x00107000 eor.w r3, r3, sb | r3 ^= sb;
0x00107004 add.w r7, r7, r0, ror 2 | r7 += (r0 >>> 2);
0x00107008 eor.w r0, fp, fp, ror 5 | r0 = fp ^ (fp >>> 5);
0x0010700c add r7, r3 | r7 += r3;
0x0010700e eor.w r0, r0, fp, ror 19 | r0 ^= (fp >>> 19);
0x00107012 rev r2, r2 | r2 = SWAP32 (r2);
0x00107014 ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x00107018 add r6, r2 | r6 += r2;
0x0010701a str r2, [sp, 0x34] | var_34h = r2;
0x0010701c eor.w r2, r4, r5 | r2 = r4 ^ r5;
0x00107020 add.w r6, r6, r0, ror 6 | r6 += (r0 >>> 6);
0x00107024 and.w r2, r2, fp | r2 &= fp;
0x00107028 add r6, r3 | r6 += r3;
0x0010702a eor.w r2, r2, r5 | r2 ^= r5;
0x0010702e eor.w r0, r7, r7, ror 11 | r0 = r7 ^ (r7 >>> 11);
0x00107032 add r6, r2 | r6 += r2;
0x00107034 ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x00107038 eor.w r3, r7, r8 | r3 = r7 ^ r8;
0x0010703c eor.w r0, r0, r7, ror 20 | r0 ^= (r7 >>> 20);
0x00107040 and.w ip, ip, r3 |
0x00107044 add sl, r6 | sl += r6;
0x00107046 eor.w ip, ip, r8 |
0x0010704a add.w r6, r6, r0, ror 2 | r6 += (r0 >>> 2);
0x0010704e eor.w r0, sl, sl, ror 5 | r0 = sl ^ (sl >>> 5);
0x00107052 add r6, ip | r6 += ip;
0x00107054 eor.w r0, r0, sl, ror 19 | r0 ^= (sl >>> 19);
0x00107058 rev r2, r2 | r2 = SWAP32 (r2);
0x0010705a ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x0010705e add r5, r2 | r5 += r2;
0x00107060 str r2, [sp, 0x38] | var_38h = r2;
0x00107062 eor.w r2, fp, r4 | r2 = fp ^ r4;
0x00107066 add.w r5, r5, r0, ror 6 | r5 += (r0 >>> 6);
0x0010706a and.w r2, r2, sl | r2 &= sl;
0x0010706e add r5, ip | r5 += ip;
0x00107070 eor.w r2, r2, r4 | r2 ^= r4;
0x00107074 eor.w r0, r6, r6, ror 11 | r0 = r6 ^ (r6 >>> 11);
0x00107078 add r5, r2 | r5 += r2;
0x0010707a ldr r2, [r1], 4 | r2 = *(r1);
| r1 += 4;
0x0010707e eor.w ip, r6, r7 |
0x00107082 eor.w r0, r0, r6, ror 20 | r0 ^= (r6 >>> 20);
0x00107086 and.w r3, r3, ip | r3 &= ip;
0x0010708a add sb, r5 | sb += r5;
0x0010708c eor.w r3, r3, r7 | r3 ^= r7;
0x00107090 add.w r5, r5, r0, ror 2 | r5 += (r0 >>> 2);
0x00107094 str r1, [sp, 0x44] | var_44h = r1;
0x00107096 eor.w r0, sb, sb, ror 5 | r0 = sb ^ (sb >>> 5);
0x0010709a add r5, r3 | r5 += r3;
0x0010709c eor.w r0, r0, sb, ror 19 | r0 ^= (sb >>> 19);
0x001070a0 rev r2, r2 | r2 = SWAP32 (r2);
0x001070a2 ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x001070a6 add r4, r2 | r4 += r2;
0x001070a8 str r2, [sp, 0x3c] | var_3ch = r2;
0x001070aa eor.w r2, sl, fp | r2 = sl ^ fp;
0x001070ae add.w r4, r4, r0, ror 6 | r4 += (r0 >>> 6);
0x001070b2 and.w r2, r2, sb | r2 &= sb;
0x001070b6 add r4, r3 | r4 += r3;
0x001070b8 eor.w r2, r2, fp | r2 ^= fp;
0x001070bc eor.w r0, r5, r5, ror 11 | r0 = r5 ^ (r5 >>> 11);
0x001070c0 add r4, r2 | r4 += r2;
0x001070c2 ldr r2, [sp, 4] | r2 = var_4h_2;
0x001070c4 eor.w r3, r5, r6 | r3 = r5 ^ r6;
0x001070c8 ldr r1, [sp, 0x38] | r1 = var_38h;
0x001070ca eor.w r0, r0, r5, ror 20 | r0 ^= (r5 >>> 20);
0x001070ce and.w ip, ip, r3 |
0x001070d2 add r8, r4 | r8 += r4;
0x001070d4 eor.w ip, ip, r6 |
0x001070d8 add.w r4, r4, r0, ror 2 | r4 += (r0 >>> 2);
0x001070dc ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x001070e0 add r4, ip | r4 += ip;
0x001070e2 ror.w ip, r1, 0x11 | ip = rotate_right32 (r1, 17);
0x001070e6 eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x001070ea eor.w ip, ip, r1, ror 19 |
0x001070ee eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x001070f2 ldr r2, [sp] | r2 = *(sp);
0x001070f4 eor.w ip, ip, r1, lsr 10 |
0x001070f8 ldr r1, [sp, 0x24] | r1 = var_24h_2;
0x001070fa add ip, r0 |
0x001070fc eor.w r0, r8, r8, ror 5 | r0 = r8 ^ (r8 >>> 5);
0x00107100 add r2, ip | r2 += ip;
0x00107102 eor.w r0, r0, r8, ror 19 | r0 ^= (r8 >>> 19);
0x00107106 add r2, r1 | r2 += r1;
0x00107108 ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x0010710c add fp, r2 |
0x0010710e str r2, [sp] | *(sp) = r2;
0x00107110 eor.w r2, sb, sl | r2 = sb ^ sl;
0x00107114 add.w fp, fp, r0, ror 6 |
0x00107118 and.w r2, r2, r8 | r2 &= r8;
0x0010711c add fp, ip |
0x0010711e eor.w r2, r2, sl | r2 ^= sl;
0x00107122 eor.w r0, r4, r4, ror 11 | r0 = r4 ^ (r4 >>> 11);
0x00107126 add fp, r2 |
0x00107128 ldr r2, [sp, 8] | r2 = var_8h_2;
0x0010712a eor.w ip, r4, r5 |
0x0010712e ldr r1, [sp, 0x3c] | r1 = var_3ch;
0x00107130 eor.w r0, r0, r4, ror 20 | r0 ^= (r4 >>> 20);
0x00107134 and.w r3, r3, ip | r3 &= ip;
0x00107138 add r7, fp | r7 += fp;
0x0010713a eor.w r3, r3, r5 | r3 ^= r5;
0x0010713e add.w fp, fp, r0, ror 2 |
0x00107142 ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x00107146 add fp, r3 |
0x00107148 ror.w r3, r1, 0x11 | r3 = rotate_right32 (r1, 17);
0x0010714c eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x00107150 eor.w r3, r3, r1, ror 19 | r3 ^= (r1 >>> 19);
0x00107154 eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x00107158 ldr r2, [sp, 4] | r2 = var_4h_2;
0x0010715a eor.w r3, r3, r1, lsr 10 | r3 ^= (r1 >> 10);
0x0010715e ldr r1, [sp, 0x28] | r1 = var_28h;
0x00107160 add r3, r0 | r3 += r0;
0x00107162 eor.w r0, r7, r7, ror 5 | r0 = r7 ^ (r7 >>> 5);
0x00107166 add r2, r3 | r2 += r3;
0x00107168 eor.w r0, r0, r7, ror 19 | r0 ^= (r7 >>> 19);
0x0010716c add r2, r1 | r2 += r1;
0x0010716e ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x00107172 add sl, r2 | sl += r2;
0x00107174 str r2, [sp, 4] | var_4h_2 = r2;
0x00107176 eor.w r2, r8, sb | r2 = r8 ^ sb;
0x0010717a add.w sl, sl, r0, ror 6 | sl += (r0 >>> 6);
0x0010717e and.w r2, r2, r7 | r2 &= r7;
0x00107182 add sl, r3 | sl += r3;
0x00107184 eor.w r2, r2, sb | r2 ^= sb;
0x00107188 eor.w r0, fp, fp, ror 11 | r0 = fp ^ (fp >>> 11);
0x0010718c add sl, r2 | sl += r2;
0x0010718e ldr r2, [sp, 0xc] | r2 = var_ch_2;
0x00107190 eor.w r3, fp, r4 | r3 = fp ^ r4;
0x00107194 ldr r1, [sp] | r1 = *(sp);
0x00107196 eor.w r0, r0, fp, ror 20 | r0 ^= (fp >>> 20);
0x0010719a and.w ip, ip, r3 |
0x0010719e add r6, sl | r6 += sl;
0x001071a0 eor.w ip, ip, r4 |
0x001071a4 add.w sl, sl, r0, ror 2 | sl += (r0 >>> 2);
0x001071a8 ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x001071ac add sl, ip | sl += ip;
0x001071ae ror.w ip, r1, 0x11 | ip = rotate_right32 (r1, 17);
0x001071b2 eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x001071b6 eor.w ip, ip, r1, ror 19 |
0x001071ba eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x001071be ldr r2, [sp, 8] | r2 = var_8h_2;
0x001071c0 eor.w ip, ip, r1, lsr 10 |
0x001071c4 ldr r1, [sp, 0x2c] | r1 = var_2ch;
0x001071c6 add ip, r0 |
0x001071c8 eor.w r0, r6, r6, ror 5 | r0 = r6 ^ (r6 >>> 5);
0x001071cc add r2, ip | r2 += ip;
0x001071ce eor.w r0, r0, r6, ror 19 | r0 ^= (r6 >>> 19);
0x001071d2 add r2, r1 | r2 += r1;
0x001071d4 ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x001071d8 add sb, r2 | sb += r2;
0x001071da str r2, [sp, 8] | var_8h_2 = r2;
0x001071dc eor.w r2, r7, r8 | r2 = r7 ^ r8;
0x001071e0 add.w sb, sb, r0, ror 6 | sb += (r0 >>> 6);
0x001071e4 and.w r2, r2, r6 | r2 &= r6;
0x001071e8 add sb, ip | sb += ip;
0x001071ea eor.w r2, r2, r8 | r2 ^= r8;
0x001071ee eor.w r0, sl, sl, ror 11 | r0 = sl ^ (sl >>> 11);
0x001071f2 add sb, r2 | sb += r2;
0x001071f4 ldr r2, [sp, 0x10] | r2 = var_10h_2;
0x001071f6 eor.w ip, sl, fp |
0x001071fa ldr r1, [sp, 4] | r1 = var_4h_2;
0x001071fc eor.w r0, r0, sl, ror 20 | r0 ^= (sl >>> 20);
0x00107200 and.w r3, r3, ip | r3 &= ip;
0x00107204 add r5, sb | r5 += sb;
0x00107206 eor.w r3, r3, fp | r3 ^= fp;
0x0010720a add.w sb, sb, r0, ror 2 | sb += (r0 >>> 2);
0x0010720e ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x00107212 add sb, r3 | sb += r3;
0x00107214 ror.w r3, r1, 0x11 | r3 = rotate_right32 (r1, 17);
0x00107218 eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x0010721c eor.w r3, r3, r1, ror 19 | r3 ^= (r1 >>> 19);
0x00107220 eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x00107224 ldr r2, [sp, 0xc] | r2 = var_ch_2;
0x00107226 eor.w r3, r3, r1, lsr 10 | r3 ^= (r1 >> 10);
0x0010722a ldr r1, [sp, 0x30] | r1 = var_30h;
0x0010722c add r3, r0 | r3 += r0;
0x0010722e eor.w r0, r5, r5, ror 5 | r0 = r5 ^ (r5 >>> 5);
0x00107232 add r2, r3 | r2 += r3;
0x00107234 eor.w r0, r0, r5, ror 19 | r0 ^= (r5 >>> 19);
0x00107238 add r2, r1 | r2 += r1;
0x0010723a ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x0010723e add r8, r2 | r8 += r2;
0x00107240 str r2, [sp, 0xc] | var_ch_2 = r2;
0x00107242 eor.w r2, r6, r7 | r2 = r6 ^ r7;
0x00107246 add.w r8, r8, r0, ror 6 | r8 += (r0 >>> 6);
0x0010724a and.w r2, r2, r5 | r2 &= r5;
0x0010724e add r8, r3 | r8 += r3;
0x00107250 eor.w r2, r2, r7 | r2 ^= r7;
0x00107254 eor.w r0, sb, sb, ror 11 | r0 = sb ^ (sb >>> 11);
0x00107258 add r8, r2 | r8 += r2;
0x0010725a ldr r2, [sp, 0x14] | r2 = var_14h_2;
0x0010725c eor.w r3, sb, sl | r3 = sb ^ sl;
0x00107260 ldr r1, [sp, 8] | r1 = var_8h_2;
0x00107262 eor.w r0, r0, sb, ror 20 | r0 ^= (sb >>> 20);
0x00107266 and.w ip, ip, r3 |
0x0010726a add r4, r8 | r4 += r8;
0x0010726c eor.w ip, ip, sl |
0x00107270 add.w r8, r8, r0, ror 2 | r8 += (r0 >>> 2);
0x00107274 ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x00107278 add r8, ip | r8 += ip;
0x0010727a ror.w ip, r1, 0x11 | ip = rotate_right32 (r1, 17);
0x0010727e eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x00107282 eor.w ip, ip, r1, ror 19 |
0x00107286 eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x0010728a ldr r2, [sp, 0x10] | r2 = var_10h_2;
0x0010728c eor.w ip, ip, r1, lsr 10 |
0x00107290 ldr r1, [sp, 0x34] | r1 = var_34h;
0x00107292 add ip, r0 |
0x00107294 eor.w r0, r4, r4, ror 5 | r0 = r4 ^ (r4 >>> 5);
0x00107298 add r2, ip | r2 += ip;
0x0010729a eor.w r0, r0, r4, ror 19 | r0 ^= (r4 >>> 19);
0x0010729e add r2, r1 | r2 += r1;
0x001072a0 ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x001072a4 add r7, r2 | r7 += r2;
0x001072a6 str r2, [sp, 0x10] | var_10h_2 = r2;
0x001072a8 eor.w r2, r5, r6 | r2 = r5 ^ r6;
0x001072ac add.w r7, r7, r0, ror 6 | r7 += (r0 >>> 6);
0x001072b0 and.w r2, r2, r4 | r2 &= r4;
0x001072b4 add r7, ip | r7 += ip;
0x001072b6 eor.w r2, r2, r6 | r2 ^= r6;
0x001072ba eor.w r0, r8, r8, ror 11 | r0 = r8 ^ (r8 >>> 11);
0x001072be add r7, r2 | r7 += r2;
0x001072c0 ldr r2, [sp, 0x18] | r2 = var_18h_2;
0x001072c2 eor.w ip, r8, sb |
0x001072c6 ldr r1, [sp, 0xc] | r1 = var_ch_2;
0x001072c8 eor.w r0, r0, r8, ror 20 | r0 ^= (r8 >>> 20);
0x001072cc and.w r3, r3, ip | r3 &= ip;
0x001072d0 add fp, r7 |
0x001072d2 eor.w r3, r3, sb | r3 ^= sb;
0x001072d6 add.w r7, r7, r0, ror 2 | r7 += (r0 >>> 2);
0x001072da ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x001072de add r7, r3 | r7 += r3;
0x001072e0 ror.w r3, r1, 0x11 | r3 = rotate_right32 (r1, 17);
0x001072e4 eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x001072e8 eor.w r3, r3, r1, ror 19 | r3 ^= (r1 >>> 19);
0x001072ec eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x001072f0 ldr r2, [sp, 0x14] | r2 = var_14h_2;
0x001072f2 eor.w r3, r3, r1, lsr 10 | r3 ^= (r1 >> 10);
0x001072f6 ldr r1, [sp, 0x38] | r1 = var_38h;
0x001072f8 add r3, r0 | r3 += r0;
0x001072fa eor.w r0, fp, fp, ror 5 | r0 = fp ^ (fp >>> 5);
0x001072fe add r2, r3 | r2 += r3;
0x00107300 eor.w r0, r0, fp, ror 19 | r0 ^= (fp >>> 19);
0x00107304 add r2, r1 | r2 += r1;
0x00107306 ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x0010730a add r6, r2 | r6 += r2;
0x0010730c str r2, [sp, 0x14] | var_14h_2 = r2;
0x0010730e eor.w r2, r4, r5 | r2 = r4 ^ r5;
0x00107312 add.w r6, r6, r0, ror 6 | r6 += (r0 >>> 6);
0x00107316 and.w r2, r2, fp | r2 &= fp;
0x0010731a add r6, r3 | r6 += r3;
0x0010731c eor.w r2, r2, r5 | r2 ^= r5;
0x00107320 eor.w r0, r7, r7, ror 11 | r0 = r7 ^ (r7 >>> 11);
0x00107324 add r6, r2 | r6 += r2;
0x00107326 ldr r2, [sp, 0x1c] | r2 = var_1ch_2;
0x00107328 eor.w r3, r7, r8 | r3 = r7 ^ r8;
0x0010732c ldr r1, [sp, 0x10] | r1 = var_10h_2;
0x0010732e eor.w r0, r0, r7, ror 20 | r0 ^= (r7 >>> 20);
0x00107332 and.w ip, ip, r3 |
0x00107336 add sl, r6 | sl += r6;
0x00107338 eor.w ip, ip, r8 |
0x0010733c add.w r6, r6, r0, ror 2 | r6 += (r0 >>> 2);
0x00107340 ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x00107344 add r6, ip | r6 += ip;
0x00107346 ror.w ip, r1, 0x11 | ip = rotate_right32 (r1, 17);
0x0010734a eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x0010734e eor.w ip, ip, r1, ror 19 |
0x00107352 eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x00107356 ldr r2, [sp, 0x18] | r2 = var_18h_2;
0x00107358 eor.w ip, ip, r1, lsr 10 |
0x0010735c ldr r1, [sp, 0x3c] | r1 = var_3ch;
0x0010735e add ip, r0 |
0x00107360 eor.w r0, sl, sl, ror 5 | r0 = sl ^ (sl >>> 5);
0x00107364 add r2, ip | r2 += ip;
0x00107366 eor.w r0, r0, sl, ror 19 | r0 ^= (sl >>> 19);
0x0010736a add r2, r1 | r2 += r1;
0x0010736c ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x00107370 add r5, r2 | r5 += r2;
0x00107372 str r2, [sp, 0x18] | var_18h_2 = r2;
0x00107374 eor.w r2, fp, r4 | r2 = fp ^ r4;
0x00107378 add.w r5, r5, r0, ror 6 | r5 += (r0 >>> 6);
0x0010737c and.w r2, r2, sl | r2 &= sl;
0x00107380 add r5, ip | r5 += ip;
0x00107382 eor.w r2, r2, r4 | r2 ^= r4;
0x00107386 eor.w r0, r6, r6, ror 11 | r0 = r6 ^ (r6 >>> 11);
0x0010738a add r5, r2 | r5 += r2;
0x0010738c ldr r2, [sp, 0x20] | r2 = var_20h_2;
0x0010738e eor.w ip, r6, r7 |
0x00107392 ldr r1, [sp, 0x14] | r1 = var_14h_2;
0x00107394 eor.w r0, r0, r6, ror 20 | r0 ^= (r6 >>> 20);
0x00107398 and.w r3, r3, ip | r3 &= ip;
0x0010739c add sb, r5 | sb += r5;
0x0010739e eor.w r3, r3, r7 | r3 ^= r7;
0x001073a2 add.w r5, r5, r0, ror 2 | r5 += (r0 >>> 2);
0x001073a6 ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x001073aa add r5, r3 | r5 += r3;
0x001073ac ror.w r3, r1, 0x11 | r3 = rotate_right32 (r1, 17);
0x001073b0 eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x001073b4 eor.w r3, r3, r1, ror 19 | r3 ^= (r1 >>> 19);
0x001073b8 eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x001073bc ldr r2, [sp, 0x1c] | r2 = var_1ch_2;
0x001073be eor.w r3, r3, r1, lsr 10 | r3 ^= (r1 >> 10);
0x001073c2 ldr r1, [sp] | r1 = *(sp);
0x001073c4 add r3, r0 | r3 += r0;
0x001073c6 eor.w r0, sb, sb, ror 5 | r0 = sb ^ (sb >>> 5);
0x001073ca add r2, r3 | r2 += r3;
0x001073cc eor.w r0, r0, sb, ror 19 | r0 ^= (sb >>> 19);
0x001073d0 add r2, r1 | r2 += r1;
0x001073d2 ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x001073d6 add r4, r2 | r4 += r2;
0x001073d8 str r2, [sp, 0x1c] | var_1ch_2 = r2;
0x001073da eor.w r2, sl, fp | r2 = sl ^ fp;
0x001073de add.w r4, r4, r0, ror 6 | r4 += (r0 >>> 6);
0x001073e2 and.w r2, r2, sb | r2 &= sb;
0x001073e6 add r4, r3 | r4 += r3;
0x001073e8 eor.w r2, r2, fp | r2 ^= fp;
0x001073ec eor.w r0, r5, r5, ror 11 | r0 = r5 ^ (r5 >>> 11);
0x001073f0 add r4, r2 | r4 += r2;
0x001073f2 ldr r2, [sp, 0x24] | r2 = var_24h_2;
0x001073f4 eor.w r3, r5, r6 | r3 = r5 ^ r6;
0x001073f8 ldr r1, [sp, 0x18] | r1 = var_18h_2;
0x001073fa eor.w r0, r0, r5, ror 20 | r0 ^= (r5 >>> 20);
0x001073fe and.w ip, ip, r3 |
0x00107402 add r8, r4 | r8 += r4;
0x00107404 eor.w ip, ip, r6 |
0x00107408 add.w r4, r4, r0, ror 2 | r4 += (r0 >>> 2);
0x0010740c ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x00107410 add r4, ip | r4 += ip;
0x00107412 ror.w ip, r1, 0x11 | ip = rotate_right32 (r1, 17);
0x00107416 eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x0010741a eor.w ip, ip, r1, ror 19 |
0x0010741e eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x00107422 ldr r2, [sp, 0x20] | r2 = var_20h_2;
0x00107424 eor.w ip, ip, r1, lsr 10 |
0x00107428 ldr r1, [sp, 4] | r1 = var_4h_2;
0x0010742a add ip, r0 |
0x0010742c eor.w r0, r8, r8, ror 5 | r0 = r8 ^ (r8 >>> 5);
0x00107430 add r2, ip | r2 += ip;
0x00107432 eor.w r0, r0, r8, ror 19 | r0 ^= (r8 >>> 19);
0x00107436 add r2, r1 | r2 += r1;
0x00107438 ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x0010743c add fp, r2 |
0x0010743e str r2, [sp, 0x20] | var_20h_2 = r2;
0x00107440 eor.w r2, sb, sl | r2 = sb ^ sl;
0x00107444 add.w fp, fp, r0, ror 6 |
0x00107448 and.w r2, r2, r8 | r2 &= r8;
0x0010744c add fp, ip |
0x0010744e eor.w r2, r2, sl | r2 ^= sl;
0x00107452 eor.w r0, r4, r4, ror 11 | r0 = r4 ^ (r4 >>> 11);
0x00107456 add fp, r2 |
0x00107458 ldr r2, [sp, 0x28] | r2 = var_28h;
0x0010745a eor.w ip, r4, r5 |
0x0010745e ldr r1, [sp, 0x1c] | r1 = var_1ch_2;
0x00107460 eor.w r0, r0, r4, ror 20 | r0 ^= (r4 >>> 20);
0x00107464 and.w r3, r3, ip | r3 &= ip;
0x00107468 add r7, fp | r7 += fp;
0x0010746a eor.w r3, r3, r5 | r3 ^= r5;
0x0010746e add.w fp, fp, r0, ror 2 |
0x00107472 ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x00107476 add fp, r3 |
0x00107478 ror.w r3, r1, 0x11 | r3 = rotate_right32 (r1, 17);
0x0010747c eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x00107480 eor.w r3, r3, r1, ror 19 | r3 ^= (r1 >>> 19);
0x00107484 eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x00107488 ldr r2, [sp, 0x24] | r2 = var_24h_2;
0x0010748a eor.w r3, r3, r1, lsr 10 | r3 ^= (r1 >> 10);
0x0010748e ldr r1, [sp, 8] | r1 = var_8h_2;
0x00107490 add r3, r0 | r3 += r0;
0x00107492 eor.w r0, r7, r7, ror 5 | r0 = r7 ^ (r7 >>> 5);
0x00107496 add r2, r3 | r2 += r3;
0x00107498 eor.w r0, r0, r7, ror 19 | r0 ^= (r7 >>> 19);
0x0010749c add r2, r1 | r2 += r1;
0x0010749e ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x001074a2 add sl, r2 | sl += r2;
0x001074a4 str r2, [sp, 0x24] | var_24h_2 = r2;
0x001074a6 eor.w r2, r8, sb | r2 = r8 ^ sb;
0x001074aa add.w sl, sl, r0, ror 6 | sl += (r0 >>> 6);
0x001074ae and.w r2, r2, r7 | r2 &= r7;
0x001074b2 add sl, r3 | sl += r3;
0x001074b4 eor.w r2, r2, sb | r2 ^= sb;
0x001074b8 eor.w r0, fp, fp, ror 11 | r0 = fp ^ (fp >>> 11);
0x001074bc add sl, r2 | sl += r2;
0x001074be ldr r2, [sp, 0x2c] | r2 = var_2ch;
0x001074c0 eor.w r3, fp, r4 | r3 = fp ^ r4;
0x001074c4 ldr r1, [sp, 0x20] | r1 = var_20h_2;
0x001074c6 eor.w r0, r0, fp, ror 20 | r0 ^= (fp >>> 20);
0x001074ca and.w ip, ip, r3 |
0x001074ce add r6, sl | r6 += sl;
0x001074d0 eor.w ip, ip, r4 |
0x001074d4 add.w sl, sl, r0, ror 2 | sl += (r0 >>> 2);
0x001074d8 ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x001074dc add sl, ip | sl += ip;
0x001074de ror.w ip, r1, 0x11 | ip = rotate_right32 (r1, 17);
0x001074e2 eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x001074e6 eor.w ip, ip, r1, ror 19 |
0x001074ea eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x001074ee ldr r2, [sp, 0x28] | r2 = var_28h;
0x001074f0 eor.w ip, ip, r1, lsr 10 |
0x001074f4 ldr r1, [sp, 0xc] | r1 = var_ch_2;
0x001074f6 add ip, r0 |
0x001074f8 eor.w r0, r6, r6, ror 5 | r0 = r6 ^ (r6 >>> 5);
0x001074fc add r2, ip | r2 += ip;
0x001074fe eor.w r0, r0, r6, ror 19 | r0 ^= (r6 >>> 19);
0x00107502 add r2, r1 | r2 += r1;
0x00107504 ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x00107508 add sb, r2 | sb += r2;
0x0010750a str r2, [sp, 0x28] | var_28h = r2;
0x0010750c eor.w r2, r7, r8 | r2 = r7 ^ r8;
0x00107510 add.w sb, sb, r0, ror 6 | sb += (r0 >>> 6);
0x00107514 and.w r2, r2, r6 | r2 &= r6;
0x00107518 add sb, ip | sb += ip;
0x0010751a eor.w r2, r2, r8 | r2 ^= r8;
0x0010751e eor.w r0, sl, sl, ror 11 | r0 = sl ^ (sl >>> 11);
0x00107522 add sb, r2 | sb += r2;
0x00107524 ldr r2, [sp, 0x30] | r2 = var_30h;
0x00107526 eor.w ip, sl, fp |
0x0010752a ldr r1, [sp, 0x24] | r1 = var_24h_2;
0x0010752c eor.w r0, r0, sl, ror 20 | r0 ^= (sl >>> 20);
0x00107530 and.w r3, r3, ip | r3 &= ip;
0x00107534 add r5, sb | r5 += sb;
0x00107536 eor.w r3, r3, fp | r3 ^= fp;
0x0010753a add.w sb, sb, r0, ror 2 | sb += (r0 >>> 2);
0x0010753e ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x00107542 add sb, r3 | sb += r3;
0x00107544 ror.w r3, r1, 0x11 | r3 = rotate_right32 (r1, 17);
0x00107548 eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x0010754c eor.w r3, r3, r1, ror 19 | r3 ^= (r1 >>> 19);
0x00107550 eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x00107554 ldr r2, [sp, 0x2c] | r2 = var_2ch;
0x00107556 eor.w r3, r3, r1, lsr 10 | r3 ^= (r1 >> 10);
0x0010755a ldr r1, [sp, 0x10] | r1 = var_10h_2;
0x0010755c add r3, r0 | r3 += r0;
0x0010755e eor.w r0, r5, r5, ror 5 | r0 = r5 ^ (r5 >>> 5);
0x00107562 add r2, r3 | r2 += r3;
0x00107564 eor.w r0, r0, r5, ror 19 | r0 ^= (r5 >>> 19);
0x00107568 add r2, r1 | r2 += r1;
0x0010756a ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x0010756e add r8, r2 | r8 += r2;
0x00107570 str r2, [sp, 0x2c] | var_2ch = r2;
0x00107572 eor.w r2, r6, r7 | r2 = r6 ^ r7;
0x00107576 add.w r8, r8, r0, ror 6 | r8 += (r0 >>> 6);
0x0010757a and.w r2, r2, r5 | r2 &= r5;
0x0010757e add r8, r3 | r8 += r3;
0x00107580 eor.w r2, r2, r7 | r2 ^= r7;
0x00107584 eor.w r0, sb, sb, ror 11 | r0 = sb ^ (sb >>> 11);
0x00107588 add r8, r2 | r8 += r2;
0x0010758a ldr r2, [sp, 0x34] | r2 = var_34h;
0x0010758c eor.w r3, sb, sl | r3 = sb ^ sl;
0x00107590 ldr r1, [sp, 0x28] | r1 = var_28h;
0x00107592 eor.w r0, r0, sb, ror 20 | r0 ^= (sb >>> 20);
0x00107596 and.w ip, ip, r3 |
0x0010759a add r4, r8 | r4 += r8;
0x0010759c eor.w ip, ip, sl |
0x001075a0 add.w r8, r8, r0, ror 2 | r8 += (r0 >>> 2);
0x001075a4 ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x001075a8 add r8, ip | r8 += ip;
0x001075aa ror.w ip, r1, 0x11 | ip = rotate_right32 (r1, 17);
0x001075ae eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x001075b2 eor.w ip, ip, r1, ror 19 |
0x001075b6 eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x001075ba ldr r2, [sp, 0x30] | r2 = var_30h;
0x001075bc eor.w ip, ip, r1, lsr 10 |
0x001075c0 ldr r1, [sp, 0x14] | r1 = var_14h_2;
0x001075c2 add ip, r0 |
0x001075c4 eor.w r0, r4, r4, ror 5 | r0 = r4 ^ (r4 >>> 5);
0x001075c8 add r2, ip | r2 += ip;
0x001075ca eor.w r0, r0, r4, ror 19 | r0 ^= (r4 >>> 19);
0x001075ce add r2, r1 | r2 += r1;
0x001075d0 ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x001075d4 add r7, r2 | r7 += r2;
0x001075d6 str r2, [sp, 0x30] | var_30h = r2;
0x001075d8 eor.w r2, r5, r6 | r2 = r5 ^ r6;
0x001075dc add.w r7, r7, r0, ror 6 | r7 += (r0 >>> 6);
0x001075e0 and.w r2, r2, r4 | r2 &= r4;
0x001075e4 add r7, ip | r7 += ip;
0x001075e6 eor.w r2, r2, r6 | r2 ^= r6;
0x001075ea eor.w r0, r8, r8, ror 11 | r0 = r8 ^ (r8 >>> 11);
0x001075ee add r7, r2 | r7 += r2;
0x001075f0 ldr r2, [sp, 0x38] | r2 = var_38h;
0x001075f2 eor.w ip, r8, sb |
0x001075f6 ldr r1, [sp, 0x2c] | r1 = var_2ch;
0x001075f8 eor.w r0, r0, r8, ror 20 | r0 ^= (r8 >>> 20);
0x001075fc and.w r3, r3, ip | r3 &= ip;
0x00107600 add fp, r7 |
0x00107602 eor.w r3, r3, sb | r3 ^= sb;
0x00107606 add.w r7, r7, r0, ror 2 | r7 += (r0 >>> 2);
0x0010760a ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x0010760e add r7, r3 | r7 += r3;
0x00107610 ror.w r3, r1, 0x11 | r3 = rotate_right32 (r1, 17);
0x00107614 eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x00107618 eor.w r3, r3, r1, ror 19 | r3 ^= (r1 >>> 19);
0x0010761c eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x00107620 ldr r2, [sp, 0x34] | r2 = var_34h;
0x00107622 eor.w r3, r3, r1, lsr 10 | r3 ^= (r1 >> 10);
0x00107626 ldr r1, [sp, 0x18] | r1 = var_18h_2;
0x00107628 add r3, r0 | r3 += r0;
0x0010762a eor.w r0, fp, fp, ror 5 | r0 = fp ^ (fp >>> 5);
0x0010762e add r2, r3 | r2 += r3;
0x00107630 eor.w r0, r0, fp, ror 19 | r0 ^= (fp >>> 19);
0x00107634 add r2, r1 | r2 += r1;
0x00107636 ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x0010763a add r6, r2 | r6 += r2;
0x0010763c str r2, [sp, 0x34] | var_34h = r2;
0x0010763e eor.w r2, r4, r5 | r2 = r4 ^ r5;
0x00107642 add.w r6, r6, r0, ror 6 | r6 += (r0 >>> 6);
0x00107646 and.w r2, r2, fp | r2 &= fp;
0x0010764a add r6, r3 | r6 += r3;
0x0010764c eor.w r2, r2, r5 | r2 ^= r5;
0x00107650 eor.w r0, r7, r7, ror 11 | r0 = r7 ^ (r7 >>> 11);
0x00107654 add r6, r2 | r6 += r2;
0x00107656 ldr r2, [sp, 0x3c] | r2 = var_3ch;
0x00107658 eor.w r3, r7, r8 | r3 = r7 ^ r8;
0x0010765c ldr r1, [sp, 0x30] | r1 = var_30h;
0x0010765e eor.w r0, r0, r7, ror 20 | r0 ^= (r7 >>> 20);
0x00107662 and.w ip, ip, r3 |
0x00107666 add sl, r6 | sl += r6;
0x00107668 eor.w ip, ip, r8 |
0x0010766c add.w r6, r6, r0, ror 2 | r6 += (r0 >>> 2);
0x00107670 ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x00107674 add r6, ip | r6 += ip;
0x00107676 ror.w ip, r1, 0x11 | ip = rotate_right32 (r1, 17);
0x0010767a eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x0010767e eor.w ip, ip, r1, ror 19 |
0x00107682 eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x00107686 ldr r2, [sp, 0x38] | r2 = var_38h;
0x00107688 eor.w ip, ip, r1, lsr 10 |
0x0010768c ldr r1, [sp, 0x1c] | r1 = var_1ch_2;
0x0010768e add ip, r0 |
0x00107690 eor.w r0, sl, sl, ror 5 | r0 = sl ^ (sl >>> 5);
0x00107694 add r2, ip | r2 += ip;
0x00107696 eor.w r0, r0, sl, ror 19 | r0 ^= (sl >>> 19);
0x0010769a add r2, r1 | r2 += r1;
0x0010769c ldr ip, [lr], 4 | ip = *(lr);
| lr += 4;
0x001076a0 add r5, r2 | r5 += r2;
0x001076a2 str r2, [sp, 0x38] | var_38h = r2;
0x001076a4 eor.w r2, fp, r4 | r2 = fp ^ r4;
0x001076a8 add.w r5, r5, r0, ror 6 | r5 += (r0 >>> 6);
0x001076ac and.w r2, r2, sl | r2 &= sl;
0x001076b0 add r5, ip | r5 += ip;
0x001076b2 eor.w r2, r2, r4 | r2 ^= r4;
0x001076b6 eor.w r0, r6, r6, ror 11 | r0 = r6 ^ (r6 >>> 11);
0x001076ba add r5, r2 | r5 += r2;
0x001076bc ldr r2, [sp] | r2 = *(sp);
0x001076be eor.w ip, r6, r7 |
0x001076c2 ldr r1, [sp, 0x34] | r1 = var_34h;
0x001076c4 eor.w r0, r0, r6, ror 20 | r0 ^= (r6 >>> 20);
0x001076c8 and.w r3, r3, ip | r3 &= ip;
0x001076cc add sb, r5 | sb += r5;
0x001076ce eor.w r3, r3, r7 | r3 ^= r7;
0x001076d2 add.w r5, r5, r0, ror 2 | r5 += (r0 >>> 2);
0x001076d6 ror.w r0, r2, 7 | r0 = rotate_right32 (r2, 7);
0x001076da add r5, r3 | r5 += r3;
0x001076dc ror.w r3, r1, 0x11 | r3 = rotate_right32 (r1, 17);
0x001076e0 eor.w r0, r0, r2, ror 18 | r0 ^= (r2 >>> 18);
0x001076e4 eor.w r3, r3, r1, ror 19 | r3 ^= (r1 >>> 19);
0x001076e8 eor.w r0, r0, r2, lsr 3 | r0 ^= (r2 >> 3);
0x001076ec ldr r2, [sp, 0x3c] | r2 = var_3ch;
0x001076ee eor.w r3, r3, r1, lsr 10 | r3 ^= (r1 >> 10);
0x001076f2 ldr r1, [sp, 0x20] | r1 = var_20h_2;
0x001076f4 add r3, r0 | r3 += r0;
0x001076f6 eor.w r0, sb, sb, ror 5 | r0 = sb ^ (sb >>> 5);
0x001076fa add r2, r3 | r2 += r3;
0x001076fc eor.w r0, r0, sb, ror 19 | r0 ^= (sb >>> 19);
0x00107700 add r2, r1 | r2 += r1;
0x00107702 ldr r3, [lr], 4 | r3 = *(lr);
| lr += 4;
0x00107706 add r4, r2 | r4 += r2;
0x00107708 str r2, [sp, 0x3c] | var_3ch = r2;
0x0010770a eor.w r2, sl, fp | r2 = sl ^ fp;
0x0010770e add.w r4, r4, r0, ror 6 | r4 += (r0 >>> 6);
0x00107712 and.w r2, r2, sb | r2 &= sb;
0x00107716 add r4, r3 | r4 += r3;
0x00107718 eor.w r2, r2, fp | r2 ^= fp;
0x0010771c eor.w r0, r5, r5, ror 11 | r0 = r5 ^ (r5 >>> 11);
0x00107720 add r4, r2 | r4 += r2;
0x00107722 and r3, r3, 0xff | r3 &= 0xff;
0x00107726 cmp r3, 0xf2 |
0x00107728 ldr r2, [sp, 4] | r2 = var_4h_2;
0x0010772a eor.w r3, r5, r6 | r3 = r5 ^ r6;
0x0010772e ldr r1, [sp, 0x38] | r1 = var_38h;
0x00107730 eor.w r0, r0, r5, ror 20 | r0 ^= (r5 >>> 20);
0x00107734 and.w ip, ip, r3 |
0x00107738 add r8, r4 | r8 += r4;
0x0010773a eor.w ip, ip, r6 |
0x0010773e add.w r4, r4, r0, ror 2 | r4 += (r0 >>> 2);
0x00107742 ite eq |
| if (r3 != 0xf2) {
0x00107744 ldreq r3, [sp, 0x40] | r3 = var_40h;
| }
| if (r3 != 0xf2) {
0x00107746 bne 0x1070dc | goto label_1;
| }
| }
| label_1:
0x001077b0 push.w {r4, r5, r6, r7, r8, sb, sl, fp, ip, lr} |
0x001077b4 sub.w fp, sp, 0x50 |
0x001077b8 subw lr, pc, 0xc9c | __asm ("subw lr, pc, aav.0x000000ff");
0x001077bc bic fp, fp, 0xf | fp = BIT_MASK (fp, 0xf);
0x001077c0 mov ip, sp |
0x001077c2 mov sp, fp |
0x001077c4 add.w r2, r1, r2, lsl 6 | r2 = r1 + (r2 << 6);
0x001077c8 vld1.8 {d0, d1}, [r1]! | __asm ("vld1.8 {d0, d1}, [r1]!");
0x001077cc vld1.8 {d2, d3}, [r1]! | __asm ("vld1.8 {d2, d3}, [r1]!");
0x001077d0 vld1.8 {d4, d5}, [r1]! | __asm ("vld1.8 {d4, d5}, [r1]!");
0x001077d4 vld1.8 {d6, d7}, [r1]! | __asm ("vld1.8 {d6, d7}, [r1]!");
0x001077d8 vld1.32 {d16, d17}, [lr:0x80]! | __asm ("vld1.32 {d16, d17}, [lr:0x80]!");
0x001077dc vld1.32 {d18, d19}, [lr:0x80]! | __asm ("vld1.32 {d18, d19}, [lr:0x80]!");
0x001077e0 vld1.32 {d20, d21}, [lr:0x80]! | __asm ("vld1.32 {d20, d21}, [lr:0x80]!");
0x001077e4 vld1.32 {d22, d23}, [lr:0x80]! | __asm ("vld1.32 {d22, d23}, [lr:0x80]!");
0x001077e8 vrev32.8 q0, q0 | __asm ("vrev32.8 q0, q0");
0x001077ec str r0, [sp, 0x40] | var_30h = r0;
0x001077ee vrev32.8 q1, q1 | __asm ("vrev32.8 q1, q1");
0x001077f2 str r1, [sp, 0x44] | var_34h = r1;
0x001077f4 mov r1, sp | r1 = sp;
0x001077f6 vrev32.8 q2, q2 | __asm ("vrev32.8 q2, q2");
0x001077fa str r2, [sp, 0x48] | var_38h = r2;
0x001077fc vrev32.8 q3, q3 | __asm ("vrev32.8 q3, q3");
0x00107800 str.w ip, [sp, 0x4c] | __asm ("str.w ip, [var_3ch]");
0x00107804 vadd.i32 q8, q8, q0 | __asm ("vadd.i32 q8, q8, q0");
0x00107808 vadd.i32 q9, q9, q1 | __asm ("vadd.i32 q9, q9, q1");
0x0010780c vst1.32 {d16, d17}, [r1:0x80]! | __asm ("vst1.32 {d16, d17}, [r1:0x80]!");
0x00107810 vadd.i32 q10, q10, q2 | __asm ("vadd.i32 q10, q10, q2");
0x00107814 vst1.32 {d18, d19}, [r1:0x80]! | __asm ("vst1.32 {d18, d19}, [r1:0x80]!");
0x00107818 vadd.i32 q11, q11, q3 | __asm ("vadd.i32 q11, q11, q3");
0x0010781c vst1.32 {d20, d21}, [r1:0x80]! | __asm ("vst1.32 {d20, d21}, [r1:0x80]!");
0x00107820 vst1.32 {d22, d23}, [r1:0x80]! | __asm ("vst1.32 {d22, d23}, [r1:0x80]!");
0x00107824 ldm.w r0, {r4, r5, r6, r7, r8, sb, sl, fp} | r4 = *(r0);
| r5 = *((r0 + 4));
| r6 = *((r0 + 8));
| r7 = *((r0 + 12));
| r8 = *((r0 + 16));
| sb = *((r0 + 20));
| sl = *((r0 + 24));
| fp = *((r0 + 28));
0x00107828 sub.w r1, r1, 0x40 | r1 -= 0x40;
0x0010782c ldr r2, [sp] | r2 = *(sp);
0x0010782e eor.w ip, ip, ip |
0x00107832 eor.w r3, r5, r6 | r3 = r5 ^ r6;
0x00107836 b 0x107840 |
| while (r3 != 0xf2) {
0x00107840 vext.32 q8, q0, q1, 1 | __asm ("vext.32 q8, q0, q1, 1");
0x00107844 add fp, r2 |
0x00107846 eor.w r2, sb, sl | r2 = sb ^ sl;
0x0010784a eor.w r0, r8, r8, ror 5 | r0 = r8 ^ (r8 >>> 5);
0x0010784e vext.32 q9, q2, q3, 1 | __asm ("vext.32 q9, q2, q3, 1");
0x00107852 add r4, ip | r4 += ip;
0x00107854 and.w r2, r2, r8 | r2 &= r8;
0x00107858 eor.w ip, r0, r8, ror 19 |
0x0010785c vshr.u32 q10, q8, 7 | __asm ("vshr.u32 q10, q8, 7");
0x00107860 eor.w r0, r4, r4, ror 11 | r0 = r4 ^ (r4 >>> 11);
0x00107864 eor.w r2, r2, sl | r2 ^= sl;
0x00107868 vadd.i32 q0, q0, q9 | __asm ("vadd.i32 q0, q0, q9");
0x0010786c add.w fp, fp, ip, ror 6 |
0x00107870 eor.w ip, r4, r5 |
0x00107874 vshr.u32 q9, q8, 3 | __asm ("vshr.u32 q9, q8, 3");
0x00107878 eor.w r0, r0, r4, ror 20 | r0 ^= (r4 >>> 20);
0x0010787c add fp, r2 |
0x0010787e vsli.32 q10, q8, 0x19 | __asm ("vsli.32 q10, q8, 0x19");
0x00107882 ldr r2, [sp, 4] | r2 = var_4h;
0x00107884 and.w r3, r3, ip | r3 &= ip;
0x00107888 vshr.u32 q11, q8, 0x12 | __asm ("vshr.u32 q11, q8, 0x12");
0x0010788c add r7, fp | r7 += fp;
0x0010788e add.w fp, fp, r0, ror 2 |
0x00107892 eor.w r3, r3, r5 | r3 ^= r5;
0x00107896 veor q9, q9, q10 | __asm ("veor q9, q9, q10");
0x0010789a add sl, r2 | sl += r2;
0x0010789c vsli.32 q11, q8, 0xe | __asm ("vsli.32 q11, q8, 0xe");
0x001078a0 eor.w r2, r8, sb | r2 = r8 ^ sb;
0x001078a4 eor.w r0, r7, r7, ror 5 | r0 = r7 ^ (r7 >>> 5);
0x001078a8 vshr.u32 d24, d7, 0x11 | __asm ("vshr.u32 d24, d7, 0x11");
0x001078ac add fp, r3 |
0x001078ae and.w r2, r2, r7 | r2 &= r7;
0x001078b2 veor q9, q9, q11 | __asm ("veor q9, q9, q11");
0x001078b6 eor.w r3, r0, r7, ror 19 | r3 = r0 ^ (r7 >>> 19);
0x001078ba eor.w r0, fp, fp, ror 11 | r0 = fp ^ (fp >>> 11);
0x001078be vsli.32 d24, d7, 0xf | __asm ("vsli.32 d24, d7, 0xf");
0x001078c2 eor.w r2, r2, sb | r2 ^= sb;
0x001078c6 add.w sl, sl, r3, ror 6 | sl += (r3 >>> 6);
0x001078ca vshr.u32 d25, d7, 0xa | __asm ("vshr.u32 d25, d7, 0xa");
0x001078ce eor.w r3, fp, r4 | r3 = fp ^ r4;
0x001078d2 eor.w r0, r0, fp, ror 20 | r0 ^= (fp >>> 20);
0x001078d6 vadd.i32 q0, q0, q9 | __asm ("vadd.i32 q0, q0, q9");
0x001078da add sl, r2 | sl += r2;
0x001078dc ldr r2, [sp, 8] | r2 = var_8h;
0x001078de veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x001078e2 and.w ip, ip, r3 |
0x001078e6 add r6, sl | r6 += sl;
0x001078e8 vshr.u32 d24, d7, 0x13 | __asm ("vshr.u32 d24, d7, 0x13");
0x001078ec add.w sl, sl, r0, ror 2 | sl += (r0 >>> 2);
0x001078f0 eor.w ip, ip, r4 |
0x001078f4 vsli.32 d24, d7, 0xd | __asm ("vsli.32 d24, d7, 0xd");
0x001078f8 add sb, r2 | sb += r2;
0x001078fa eor.w r2, r7, r8 | r2 = r7 ^ r8;
0x001078fe veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x00107902 eor.w r0, r6, r6, ror 5 | r0 = r6 ^ (r6 >>> 5);
0x00107906 add sl, ip | sl += ip;
0x00107908 vadd.i32 d0, d0, d25 | __asm ("vadd.i32 d0, d0, d25");
0x0010790c and.w r2, r2, r6 | r2 &= r6;
0x00107910 eor.w ip, r0, r6, ror 19 |
0x00107914 vshr.u32 d24, d0, 0x11 | __asm ("vshr.u32 d24, d0, 0x11");
0x00107918 eor.w r0, sl, sl, ror 11 | r0 = sl ^ (sl >>> 11);
0x0010791c eor.w r2, r2, r8 | r2 ^= r8;
0x00107920 vsli.32 d24, d0, 0xf | __asm ("vsli.32 d24, d0, 0xf");
0x00107924 add.w sb, sb, ip, ror 6 | sb += (ip >>> 6);
0x00107928 eor.w ip, sl, fp |
0x0010792c vshr.u32 d25, d0, 0xa | __asm ("vshr.u32 d25, d0, 0xa");
0x00107930 eor.w r0, r0, sl, ror 20 | r0 ^= (sl >>> 20);
0x00107934 add sb, r2 | sb += r2;
0x00107936 veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x0010793a ldr r2, [sp, 0xc] | r2 = var_ch;
0x0010793c and.w r3, r3, ip | r3 &= ip;
0x00107940 vshr.u32 d24, d0, 0x13 | __asm ("vshr.u32 d24, d0, 0x13");
0x00107944 add r5, sb | r5 += sb;
0x00107946 add.w sb, sb, r0, ror 2 | sb += (r0 >>> 2);
0x0010794a eor.w r3, r3, fp | r3 ^= fp;
0x0010794e vld1.32 {d16, d17}, [lr:0x80]! | __asm ("vld1.32 {d16, d17}, [lr:0x80]!");
0x00107952 add r8, r2 | r8 += r2;
0x00107954 vsli.32 d24, d0, 0xd | __asm ("vsli.32 d24, d0, 0xd");
0x00107958 eor.w r2, r6, r7 | r2 = r6 ^ r7;
0x0010795c eor.w r0, r5, r5, ror 5 | r0 = r5 ^ (r5 >>> 5);
0x00107960 veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x00107964 add sb, r3 | sb += r3;
0x00107966 and.w r2, r2, r5 | r2 &= r5;
0x0010796a vadd.i32 d1, d1, d25 | __asm ("vadd.i32 d1, d1, d25");
0x0010796e eor.w r3, r0, r5, ror 19 | r3 = r0 ^ (r5 >>> 19);
0x00107972 eor.w r0, sb, sb, ror 11 | r0 = sb ^ (sb >>> 11);
0x00107976 vadd.i32 q8, q8, q0 | __asm ("vadd.i32 q8, q8, q0");
0x0010797a eor.w r2, r2, r7 | r2 ^= r7;
0x0010797e add.w r8, r8, r3, ror 6 | r8 += (r3 >>> 6);
0x00107982 eor.w r3, sb, sl | r3 = sb ^ sl;
0x00107986 eor.w r0, r0, sb, ror 20 | r0 ^= (sb >>> 20);
0x0010798a add r8, r2 | r8 += r2;
0x0010798c ldr r2, [sp, 0x10] | r2 = var_0h_2;
0x0010798e and.w ip, ip, r3 |
0x00107992 add r4, r8 | r4 += r8;
0x00107994 vst1.32 {d16, d17}, [r1:0x80]! | __asm ("vst1.32 {d16, d17}, [r1:0x80]!");
0x00107998 add.w r8, r8, r0, ror 2 | r8 += (r0 >>> 2);
0x0010799c eor.w ip, ip, sl |
0x001079a0 vext.32 q8, q1, q2, 1 | __asm ("vext.32 q8, q1, q2, 1");
0x001079a4 add r7, r2 | r7 += r2;
0x001079a6 eor.w r2, r5, r6 | r2 = r5 ^ r6;
0x001079aa eor.w r0, r4, r4, ror 5 | r0 = r4 ^ (r4 >>> 5);
0x001079ae vext.32 q9, q3, q0, 1 | __asm ("vext.32 q9, q3, q0, 1");
0x001079b2 add r8, ip | r8 += ip;
0x001079b4 and.w r2, r2, r4 | r2 &= r4;
0x001079b8 eor.w ip, r0, r4, ror 19 |
0x001079bc vshr.u32 q10, q8, 7 | __asm ("vshr.u32 q10, q8, 7");
0x001079c0 eor.w r0, r8, r8, ror 11 | r0 = r8 ^ (r8 >>> 11);
0x001079c4 eor.w r2, r2, r6 | r2 ^= r6;
0x001079c8 vadd.i32 q1, q1, q9 | __asm ("vadd.i32 q1, q1, q9");
0x001079cc add.w r7, r7, ip, ror 6 | r7 += (ip >>> 6);
0x001079d0 eor.w ip, r8, sb |
0x001079d4 vshr.u32 q9, q8, 3 | __asm ("vshr.u32 q9, q8, 3");
0x001079d8 eor.w r0, r0, r8, ror 20 | r0 ^= (r8 >>> 20);
0x001079dc add r7, r2 | r7 += r2;
0x001079de vsli.32 q10, q8, 0x19 | __asm ("vsli.32 q10, q8, 0x19");
0x001079e2 ldr r2, [sp, 0x14] | r2 = var_4h_2;
0x001079e4 and.w r3, r3, ip | r3 &= ip;
0x001079e8 vshr.u32 q11, q8, 0x12 | __asm ("vshr.u32 q11, q8, 0x12");
0x001079ec add fp, r7 |
0x001079ee add.w r7, r7, r0, ror 2 | r7 += (r0 >>> 2);
0x001079f2 eor.w r3, r3, sb | r3 ^= sb;
0x001079f6 veor q9, q9, q10 | __asm ("veor q9, q9, q10");
0x001079fa add r6, r2 | r6 += r2;
0x001079fc vsli.32 q11, q8, 0xe | __asm ("vsli.32 q11, q8, 0xe");
0x00107a00 eor.w r2, r4, r5 | r2 = r4 ^ r5;
0x00107a04 eor.w r0, fp, fp, ror 5 | r0 = fp ^ (fp >>> 5);
0x00107a08 vshr.u32 d24, d1, 0x11 | __asm ("vshr.u32 d24, d1, 0x11");
0x00107a0c add r7, r3 | r7 += r3;
0x00107a0e and.w r2, r2, fp | r2 &= fp;
0x00107a12 veor q9, q9, q11 | __asm ("veor q9, q9, q11");
0x00107a16 eor.w r3, r0, fp, ror 19 | r3 = r0 ^ (fp >>> 19);
0x00107a1a eor.w r0, r7, r7, ror 11 | r0 = r7 ^ (r7 >>> 11);
0x00107a1e vsli.32 d24, d1, 0xf | __asm ("vsli.32 d24, d1, 0xf");
0x00107a22 eor.w r2, r2, r5 | r2 ^= r5;
0x00107a26 add.w r6, r6, r3, ror 6 | r6 += (r3 >>> 6);
0x00107a2a vshr.u32 d25, d1, 0xa | __asm ("vshr.u32 d25, d1, 0xa");
0x00107a2e eor.w r3, r7, r8 | r3 = r7 ^ r8;
0x00107a32 eor.w r0, r0, r7, ror 20 | r0 ^= (r7 >>> 20);
0x00107a36 vadd.i32 q1, q1, q9 | __asm ("vadd.i32 q1, q1, q9");
0x00107a3a add r6, r2 | r6 += r2;
0x00107a3c ldr r2, [sp, 0x18] | r2 = var_8h_2;
0x00107a3e veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x00107a42 and.w ip, ip, r3 |
0x00107a46 add sl, r6 | sl += r6;
0x00107a48 vshr.u32 d24, d1, 0x13 | __asm ("vshr.u32 d24, d1, 0x13");
0x00107a4c add.w r6, r6, r0, ror 2 | r6 += (r0 >>> 2);
0x00107a50 eor.w ip, ip, r8 |
0x00107a54 vsli.32 d24, d1, 0xd | __asm ("vsli.32 d24, d1, 0xd");
0x00107a58 add r5, r2 | r5 += r2;
0x00107a5a eor.w r2, fp, r4 | r2 = fp ^ r4;
0x00107a5e veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x00107a62 eor.w r0, sl, sl, ror 5 | r0 = sl ^ (sl >>> 5);
0x00107a66 add r6, ip | r6 += ip;
0x00107a68 vadd.i32 d2, d2, d25 | __asm ("vadd.i32 d2, d2, d25");
0x00107a6c and.w r2, r2, sl | r2 &= sl;
0x00107a70 eor.w ip, r0, sl, ror 19 |
0x00107a74 vshr.u32 d24, d2, 0x11 | __asm ("vshr.u32 d24, d2, 0x11");
0x00107a78 eor.w r0, r6, r6, ror 11 | r0 = r6 ^ (r6 >>> 11);
0x00107a7c eor.w r2, r2, r4 | r2 ^= r4;
0x00107a80 vsli.32 d24, d2, 0xf | __asm ("vsli.32 d24, d2, 0xf");
0x00107a84 add.w r5, r5, ip, ror 6 | r5 += (ip >>> 6);
0x00107a88 eor.w ip, r6, r7 |
0x00107a8c vshr.u32 d25, d2, 0xa | __asm ("vshr.u32 d25, d2, 0xa");
0x00107a90 eor.w r0, r0, r6, ror 20 | r0 ^= (r6 >>> 20);
0x00107a94 add r5, r2 | r5 += r2;
0x00107a96 veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x00107a9a ldr r2, [sp, 0x1c] | r2 = var_ch_2;
0x00107a9c and.w r3, r3, ip | r3 &= ip;
0x00107aa0 vshr.u32 d24, d2, 0x13 | __asm ("vshr.u32 d24, d2, 0x13");
0x00107aa4 add sb, r5 | sb += r5;
0x00107aa6 add.w r5, r5, r0, ror 2 | r5 += (r0 >>> 2);
0x00107aaa eor.w r3, r3, r7 | r3 ^= r7;
0x00107aae vld1.32 {d16, d17}, [lr:0x80]! | __asm ("vld1.32 {d16, d17}, [lr:0x80]!");
0x00107ab2 add r4, r2 | r4 += r2;
0x00107ab4 vsli.32 d24, d2, 0xd | __asm ("vsli.32 d24, d2, 0xd");
0x00107ab8 eor.w r2, sl, fp | r2 = sl ^ fp;
0x00107abc eor.w r0, sb, sb, ror 5 | r0 = sb ^ (sb >>> 5);
0x00107ac0 veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x00107ac4 add r5, r3 | r5 += r3;
0x00107ac6 and.w r2, r2, sb | r2 &= sb;
0x00107aca vadd.i32 d3, d3, d25 | __asm ("vadd.i32 d3, d3, d25");
0x00107ace eor.w r3, r0, sb, ror 19 | r3 = r0 ^ (sb >>> 19);
0x00107ad2 eor.w r0, r5, r5, ror 11 | r0 = r5 ^ (r5 >>> 11);
0x00107ad6 vadd.i32 q8, q8, q1 | __asm ("vadd.i32 q8, q8, q1");
0x00107ada eor.w r2, r2, fp | r2 ^= fp;
0x00107ade add.w r4, r4, r3, ror 6 | r4 += (r3 >>> 6);
0x00107ae2 eor.w r3, r5, r6 | r3 = r5 ^ r6;
0x00107ae6 eor.w r0, r0, r5, ror 20 | r0 ^= (r5 >>> 20);
0x00107aea add r4, r2 | r4 += r2;
0x00107aec ldr r2, [sp, 0x20] | r2 = var_10h_2;
0x00107aee and.w ip, ip, r3 |
0x00107af2 add r8, r4 | r8 += r4;
0x00107af4 vst1.32 {d16, d17}, [r1:0x80]! | __asm ("vst1.32 {d16, d17}, [r1:0x80]!");
0x00107af8 add.w r4, r4, r0, ror 2 | r4 += (r0 >>> 2);
0x00107afc eor.w ip, ip, r6 |
0x00107b00 vext.32 q8, q2, q3, 1 | __asm ("vext.32 q8, q2, q3, 1");
0x00107b04 add fp, r2 |
0x00107b06 eor.w r2, sb, sl | r2 = sb ^ sl;
0x00107b0a eor.w r0, r8, r8, ror 5 | r0 = r8 ^ (r8 >>> 5);
0x00107b0e vext.32 q9, q0, q1, 1 | __asm ("vext.32 q9, q0, q1, 1");
0x00107b12 add r4, ip | r4 += ip;
0x00107b14 and.w r2, r2, r8 | r2 &= r8;
0x00107b18 eor.w ip, r0, r8, ror 19 |
0x00107b1c vshr.u32 q10, q8, 7 | __asm ("vshr.u32 q10, q8, 7");
0x00107b20 eor.w r0, r4, r4, ror 11 | r0 = r4 ^ (r4 >>> 11);
0x00107b24 eor.w r2, r2, sl | r2 ^= sl;
0x00107b28 vadd.i32 q2, q2, q9 | __asm ("vadd.i32 q2, q2, q9");
0x00107b2c add.w fp, fp, ip, ror 6 |
0x00107b30 eor.w ip, r4, r5 |
0x00107b34 vshr.u32 q9, q8, 3 | __asm ("vshr.u32 q9, q8, 3");
0x00107b38 eor.w r0, r0, r4, ror 20 | r0 ^= (r4 >>> 20);
0x00107b3c add fp, r2 |
0x00107b3e vsli.32 q10, q8, 0x19 | __asm ("vsli.32 q10, q8, 0x19");
0x00107b42 ldr r2, [sp, 0x24] | r2 = var_14h_2;
0x00107b44 and.w r3, r3, ip | r3 &= ip;
0x00107b48 vshr.u32 q11, q8, 0x12 | __asm ("vshr.u32 q11, q8, 0x12");
0x00107b4c add r7, fp | r7 += fp;
0x00107b4e add.w fp, fp, r0, ror 2 |
0x00107b52 eor.w r3, r3, r5 | r3 ^= r5;
0x00107b56 veor q9, q9, q10 | __asm ("veor q9, q9, q10");
0x00107b5a add sl, r2 | sl += r2;
0x00107b5c vsli.32 q11, q8, 0xe | __asm ("vsli.32 q11, q8, 0xe");
0x00107b60 eor.w r2, r8, sb | r2 = r8 ^ sb;
0x00107b64 eor.w r0, r7, r7, ror 5 | r0 = r7 ^ (r7 >>> 5);
0x00107b68 vshr.u32 d24, d3, 0x11 | __asm ("vshr.u32 d24, d3, 0x11");
0x00107b6c add fp, r3 |
0x00107b6e and.w r2, r2, r7 | r2 &= r7;
0x00107b72 veor q9, q9, q11 | __asm ("veor q9, q9, q11");
0x00107b76 eor.w r3, r0, r7, ror 19 | r3 = r0 ^ (r7 >>> 19);
0x00107b7a eor.w r0, fp, fp, ror 11 | r0 = fp ^ (fp >>> 11);
0x00107b7e vsli.32 d24, d3, 0xf | __asm ("vsli.32 d24, d3, 0xf");
0x00107b82 eor.w r2, r2, sb | r2 ^= sb;
0x00107b86 add.w sl, sl, r3, ror 6 | sl += (r3 >>> 6);
0x00107b8a vshr.u32 d25, d3, 0xa | __asm ("vshr.u32 d25, d3, 0xa");
0x00107b8e eor.w r3, fp, r4 | r3 = fp ^ r4;
0x00107b92 eor.w r0, r0, fp, ror 20 | r0 ^= (fp >>> 20);
0x00107b96 vadd.i32 q2, q2, q9 | __asm ("vadd.i32 q2, q2, q9");
0x00107b9a add sl, r2 | sl += r2;
0x00107b9c ldr r2, [sp, 0x28] | r2 = var_18h_2;
0x00107b9e veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x00107ba2 and.w ip, ip, r3 |
0x00107ba6 add r6, sl | r6 += sl;
0x00107ba8 vshr.u32 d24, d3, 0x13 | __asm ("vshr.u32 d24, d3, 0x13");
0x00107bac add.w sl, sl, r0, ror 2 | sl += (r0 >>> 2);
0x00107bb0 eor.w ip, ip, r4 |
0x00107bb4 vsli.32 d24, d3, 0xd | __asm ("vsli.32 d24, d3, 0xd");
0x00107bb8 add sb, r2 | sb += r2;
0x00107bba eor.w r2, r7, r8 | r2 = r7 ^ r8;
0x00107bbe veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x00107bc2 eor.w r0, r6, r6, ror 5 | r0 = r6 ^ (r6 >>> 5);
0x00107bc6 add sl, ip | sl += ip;
0x00107bc8 vadd.i32 d4, d4, d25 | __asm ("vadd.i32 d4, d4, d25");
0x00107bcc and.w r2, r2, r6 | r2 &= r6;
0x00107bd0 eor.w ip, r0, r6, ror 19 |
0x00107bd4 vshr.u32 d24, d4, 0x11 | __asm ("vshr.u32 d24, d4, 0x11");
0x00107bd8 eor.w r0, sl, sl, ror 11 | r0 = sl ^ (sl >>> 11);
0x00107bdc eor.w r2, r2, r8 | r2 ^= r8;
0x00107be0 vsli.32 d24, d4, 0xf | __asm ("vsli.32 d24, d4, 0xf");
0x00107be4 add.w sb, sb, ip, ror 6 | sb += (ip >>> 6);
0x00107be8 eor.w ip, sl, fp |
0x00107bec vshr.u32 d25, d4, 0xa | __asm ("vshr.u32 d25, d4, 0xa");
0x00107bf0 eor.w r0, r0, sl, ror 20 | r0 ^= (sl >>> 20);
0x00107bf4 add sb, r2 | sb += r2;
0x00107bf6 veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x00107bfa ldr r2, [sp, 0x2c] | r2 = var_1ch_2;
0x00107bfc and.w r3, r3, ip | r3 &= ip;
0x00107c00 vshr.u32 d24, d4, 0x13 | __asm ("vshr.u32 d24, d4, 0x13");
0x00107c04 add r5, sb | r5 += sb;
0x00107c06 add.w sb, sb, r0, ror 2 | sb += (r0 >>> 2);
0x00107c0a eor.w r3, r3, fp | r3 ^= fp;
0x00107c0e vld1.32 {d16, d17}, [lr:0x80]! | __asm ("vld1.32 {d16, d17}, [lr:0x80]!");
0x00107c12 add r8, r2 | r8 += r2;
0x00107c14 vsli.32 d24, d4, 0xd | __asm ("vsli.32 d24, d4, 0xd");
0x00107c18 eor.w r2, r6, r7 | r2 = r6 ^ r7;
0x00107c1c eor.w r0, r5, r5, ror 5 | r0 = r5 ^ (r5 >>> 5);
0x00107c20 veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x00107c24 add sb, r3 | sb += r3;
0x00107c26 and.w r2, r2, r5 | r2 &= r5;
0x00107c2a vadd.i32 d5, d5, d25 | __asm ("vadd.i32 d5, d5, d25");
0x00107c2e eor.w r3, r0, r5, ror 19 | r3 = r0 ^ (r5 >>> 19);
0x00107c32 eor.w r0, sb, sb, ror 11 | r0 = sb ^ (sb >>> 11);
0x00107c36 vadd.i32 q8, q8, q2 | __asm ("vadd.i32 q8, q8, q2");
0x00107c3a eor.w r2, r2, r7 | r2 ^= r7;
0x00107c3e add.w r8, r8, r3, ror 6 | r8 += (r3 >>> 6);
0x00107c42 eor.w r3, sb, sl | r3 = sb ^ sl;
0x00107c46 eor.w r0, r0, sb, ror 20 | r0 ^= (sb >>> 20);
0x00107c4a add r8, r2 | r8 += r2;
0x00107c4c ldr r2, [sp, 0x30] | r2 = var_20h_2;
0x00107c4e and.w ip, ip, r3 |
0x00107c52 add r4, r8 | r4 += r8;
0x00107c54 vst1.32 {d16, d17}, [r1:0x80]! | __asm ("vst1.32 {d16, d17}, [r1:0x80]!");
0x00107c58 add.w r8, r8, r0, ror 2 | r8 += (r0 >>> 2);
0x00107c5c eor.w ip, ip, sl |
0x00107c60 vext.32 q8, q3, q0, 1 | __asm ("vext.32 q8, q3, q0, 1");
0x00107c64 add r7, r2 | r7 += r2;
0x00107c66 eor.w r2, r5, r6 | r2 = r5 ^ r6;
0x00107c6a eor.w r0, r4, r4, ror 5 | r0 = r4 ^ (r4 >>> 5);
0x00107c6e vext.32 q9, q1, q2, 1 | __asm ("vext.32 q9, q1, q2, 1");
0x00107c72 add r8, ip | r8 += ip;
0x00107c74 and.w r2, r2, r4 | r2 &= r4;
0x00107c78 eor.w ip, r0, r4, ror 19 |
0x00107c7c vshr.u32 q10, q8, 7 | __asm ("vshr.u32 q10, q8, 7");
0x00107c80 eor.w r0, r8, r8, ror 11 | r0 = r8 ^ (r8 >>> 11);
0x00107c84 eor.w r2, r2, r6 | r2 ^= r6;
0x00107c88 vadd.i32 q3, q3, q9 | __asm ("vadd.i32 q3, q3, q9");
0x00107c8c add.w r7, r7, ip, ror 6 | r7 += (ip >>> 6);
0x00107c90 eor.w ip, r8, sb |
0x00107c94 vshr.u32 q9, q8, 3 | __asm ("vshr.u32 q9, q8, 3");
0x00107c98 eor.w r0, r0, r8, ror 20 | r0 ^= (r8 >>> 20);
0x00107c9c add r7, r2 | r7 += r2;
0x00107c9e vsli.32 q10, q8, 0x19 | __asm ("vsli.32 q10, q8, 0x19");
0x00107ca2 ldr r2, [sp, 0x34] | r2 = var_24h_2;
0x00107ca4 and.w r3, r3, ip | r3 &= ip;
0x00107ca8 vshr.u32 q11, q8, 0x12 | __asm ("vshr.u32 q11, q8, 0x12");
0x00107cac add fp, r7 |
0x00107cae add.w r7, r7, r0, ror 2 | r7 += (r0 >>> 2);
0x00107cb2 eor.w r3, r3, sb | r3 ^= sb;
0x00107cb6 veor q9, q9, q10 | __asm ("veor q9, q9, q10");
0x00107cba add r6, r2 | r6 += r2;
0x00107cbc vsli.32 q11, q8, 0xe | __asm ("vsli.32 q11, q8, 0xe");
0x00107cc0 eor.w r2, r4, r5 | r2 = r4 ^ r5;
0x00107cc4 eor.w r0, fp, fp, ror 5 | r0 = fp ^ (fp >>> 5);
0x00107cc8 vshr.u32 d24, d5, 0x11 | __asm ("vshr.u32 d24, d5, 0x11");
0x00107ccc add r7, r3 | r7 += r3;
0x00107cce and.w r2, r2, fp | r2 &= fp;
0x00107cd2 veor q9, q9, q11 | __asm ("veor q9, q9, q11");
0x00107cd6 eor.w r3, r0, fp, ror 19 | r3 = r0 ^ (fp >>> 19);
0x00107cda eor.w r0, r7, r7, ror 11 | r0 = r7 ^ (r7 >>> 11);
0x00107cde vsli.32 d24, d5, 0xf | __asm ("vsli.32 d24, d5, 0xf");
0x00107ce2 eor.w r2, r2, r5 | r2 ^= r5;
0x00107ce6 add.w r6, r6, r3, ror 6 | r6 += (r3 >>> 6);
0x00107cea vshr.u32 d25, d5, 0xa | __asm ("vshr.u32 d25, d5, 0xa");
0x00107cee eor.w r3, r7, r8 | r3 = r7 ^ r8;
0x00107cf2 eor.w r0, r0, r7, ror 20 | r0 ^= (r7 >>> 20);
0x00107cf6 vadd.i32 q3, q3, q9 | __asm ("vadd.i32 q3, q3, q9");
0x00107cfa add r6, r2 | r6 += r2;
0x00107cfc ldr r2, [sp, 0x38] | r2 = var_28h;
0x00107cfe veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x00107d02 and.w ip, ip, r3 |
0x00107d06 add sl, r6 | sl += r6;
0x00107d08 vshr.u32 d24, d5, 0x13 | __asm ("vshr.u32 d24, d5, 0x13");
0x00107d0c add.w r6, r6, r0, ror 2 | r6 += (r0 >>> 2);
0x00107d10 eor.w ip, ip, r8 |
0x00107d14 vsli.32 d24, d5, 0xd | __asm ("vsli.32 d24, d5, 0xd");
0x00107d18 add r5, r2 | r5 += r2;
0x00107d1a eor.w r2, fp, r4 | r2 = fp ^ r4;
0x00107d1e veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x00107d22 eor.w r0, sl, sl, ror 5 | r0 = sl ^ (sl >>> 5);
0x00107d26 add r6, ip | r6 += ip;
0x00107d28 vadd.i32 d6, d6, d25 | __asm ("vadd.i32 d6, d6, d25");
0x00107d2c and.w r2, r2, sl | r2 &= sl;
0x00107d30 eor.w ip, r0, sl, ror 19 |
0x00107d34 vshr.u32 d24, d6, 0x11 | __asm ("vshr.u32 d24, d6, 0x11");
0x00107d38 eor.w r0, r6, r6, ror 11 | r0 = r6 ^ (r6 >>> 11);
0x00107d3c eor.w r2, r2, r4 | r2 ^= r4;
0x00107d40 vsli.32 d24, d6, 0xf | __asm ("vsli.32 d24, d6, 0xf");
0x00107d44 add.w r5, r5, ip, ror 6 | r5 += (ip >>> 6);
0x00107d48 eor.w ip, r6, r7 |
0x00107d4c vshr.u32 d25, d6, 0xa | __asm ("vshr.u32 d25, d6, 0xa");
0x00107d50 eor.w r0, r0, r6, ror 20 | r0 ^= (r6 >>> 20);
0x00107d54 add r5, r2 | r5 += r2;
0x00107d56 veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x00107d5a ldr r2, [sp, 0x3c] | r2 = var_2ch;
0x00107d5c and.w r3, r3, ip | r3 &= ip;
0x00107d60 vshr.u32 d24, d6, 0x13 | __asm ("vshr.u32 d24, d6, 0x13");
0x00107d64 add sb, r5 | sb += r5;
0x00107d66 add.w r5, r5, r0, ror 2 | r5 += (r0 >>> 2);
0x00107d6a eor.w r3, r3, r7 | r3 ^= r7;
0x00107d6e vld1.32 {d16, d17}, [lr:0x80]! | __asm ("vld1.32 {d16, d17}, [lr:0x80]!");
0x00107d72 add r4, r2 | r4 += r2;
0x00107d74 vsli.32 d24, d6, 0xd | __asm ("vsli.32 d24, d6, 0xd");
0x00107d78 eor.w r2, sl, fp | r2 = sl ^ fp;
0x00107d7c eor.w r0, sb, sb, ror 5 | r0 = sb ^ (sb >>> 5);
0x00107d80 veor d25, d25, d24 | __asm ("veor d25, d25, d24");
0x00107d84 add r5, r3 | r5 += r3;
0x00107d86 and.w r2, r2, sb | r2 &= sb;
0x00107d8a vadd.i32 d7, d7, d25 | __asm ("vadd.i32 d7, d7, d25");
0x00107d8e eor.w r3, r0, sb, ror 19 | r3 = r0 ^ (sb >>> 19);
0x00107d92 eor.w r0, r5, r5, ror 11 | r0 = r5 ^ (r5 >>> 11);
0x00107d96 vadd.i32 q8, q8, q3 | __asm ("vadd.i32 q8, q8, q3");
0x00107d9a eor.w r2, r2, fp | r2 ^= fp;
0x00107d9e add.w r4, r4, r3, ror 6 | r4 += (r3 >>> 6);
0x00107da2 eor.w r3, r5, r6 | r3 = r5 ^ r6;
0x00107da6 eor.w r0, r0, r5, ror 20 | r0 ^= (r5 >>> 20);
0x00107daa add r4, r2 | r4 += r2;
0x00107dac ldr.w r2, [lr] | r2 = *(lr);
0x00107db0 and.w ip, ip, r3 |
0x00107db4 add r8, r4 | r8 += r4;
0x00107db6 vst1.32 {d16, d17}, [r1:0x80]! | __asm ("vst1.32 {d16, d17}, [r1:0x80]!");
0x00107dba add.w r4, r4, r0, ror 2 | r4 += (r0 >>> 2);
0x00107dbe eor.w ip, ip, r6 |
0x00107dc2 teq.w r2, 0 | __asm ("teq.w r2, 0");
0x00107dc6 ldr r2, [sp] | r2 = *(sp);
0x00107dc8 sub.w r1, r1, 0x40 | r1 -= 0x40;
0x00107dcc bne.w 0x107840 |
| }
0x00107dd0 ldr r1, [sp, 0x44] | r1 = var_34h;
0x00107dd2 ldr r0, [sp, 0x48] | r0 = var_38h;
0x00107dd4 sub.w lr, lr, 0x100 | lr -= 0x100;
0x00107dd8 teq.w r1, r0 | __asm ("teq.w r1, r0");
0x00107ddc it eq |
| if (r3 != 0xf2) {
0x00107dde subeq r1, 0x40 | r1 -= 0x40;
| }
0x00107de0 vld1.8 {d0, d1}, [r1]! | __asm ("vld1.8 {d0, d1}, [r1]!");
0x00107de4 vld1.8 {d2, d3}, [r1]! | __asm ("vld1.8 {d2, d3}, [r1]!");
0x00107de8 vld1.8 {d4, d5}, [r1]! | __asm ("vld1.8 {d4, d5}, [r1]!");
0x00107dec vld1.8 {d6, d7}, [r1]! | __asm ("vld1.8 {d6, d7}, [r1]!");
0x00107df0 it ne |
| if (r3 == 0xf2) {
0x00107df2 strne r1, [sp, 0x44] | var_34h = r1;
| }
0x00107df4 mov r1, sp | r1 = sp;
0x00107df6 add fp, r2 |
0x00107df8 eor.w r2, sb, sl | r2 = sb ^ sl;
0x00107dfc eor.w r0, r8, r8, ror 5 | r0 = r8 ^ (r8 >>> 5);
0x00107e00 add r4, ip | r4 += ip;
0x00107e02 vld1.32 {d16, d17}, [lr:0x80]! | __asm ("vld1.32 {d16, d17}, [lr:0x80]!");
0x00107e06 and.w r2, r2, r8 | r2 &= r8;
0x00107e0a eor.w ip, r0, r8, ror 19 |
0x00107e0e eor.w r0, r4, r4, ror 11 | r0 = r4 ^ (r4 >>> 11);
0x00107e12 eor.w r2, r2, sl | r2 ^= sl;
0x00107e16 vrev32.8 q0, q0 | __asm ("vrev32.8 q0, q0");
0x00107e1a add.w fp, fp, ip, ror 6 |
0x00107e1e eor.w ip, r4, r5 |
0x00107e22 eor.w r0, r0, r4, ror 20 | r0 ^= (r4 >>> 20);
0x00107e26 add fp, r2 |
0x00107e28 vadd.i32 q8, q8, q0 | __asm ("vadd.i32 q8, q8, q0");
0x00107e2c ldr r2, [sp, 4] | r2 = var_4h;
0x00107e2e and.w r3, r3, ip | r3 &= ip;
0x00107e32 add r7, fp | r7 += fp;
0x00107e34 add.w fp, fp, r0, ror 2 |
0x00107e38 eor.w r3, r3, r5 | r3 ^= r5;
0x00107e3c add sl, r2 | sl += r2;
0x00107e3e eor.w r2, r8, sb | r2 = r8 ^ sb;
0x00107e42 eor.w r0, r7, r7, ror 5 | r0 = r7 ^ (r7 >>> 5);
0x00107e46 add fp, r3 |
0x00107e48 and.w r2, r2, r7 | r2 &= r7;
0x00107e4c eor.w r3, r0, r7, ror 19 | r3 = r0 ^ (r7 >>> 19);
0x00107e50 eor.w r0, fp, fp, ror 11 | r0 = fp ^ (fp >>> 11);
0x00107e54 eor.w r2, r2, sb | r2 ^= sb;
0x00107e58 add.w sl, sl, r3, ror 6 | sl += (r3 >>> 6);
0x00107e5c eor.w r3, fp, r4 | r3 = fp ^ r4;
0x00107e60 eor.w r0, r0, fp, ror 20 | r0 ^= (fp >>> 20);
0x00107e64 add sl, r2 | sl += r2;
0x00107e66 ldr r2, [sp, 8] | r2 = var_8h;
0x00107e68 and.w ip, ip, r3 |
0x00107e6c add r6, sl | r6 += sl;
0x00107e6e add.w sl, sl, r0, ror 2 | sl += (r0 >>> 2);
0x00107e72 eor.w ip, ip, r4 |
0x00107e76 add sb, r2 | sb += r2;
0x00107e78 eor.w r2, r7, r8 | r2 = r7 ^ r8;
0x00107e7c eor.w r0, r6, r6, ror 5 | r0 = r6 ^ (r6 >>> 5);
0x00107e80 add sl, ip | sl += ip;
0x00107e82 and.w r2, r2, r6 | r2 &= r6;
0x00107e86 eor.w ip, r0, r6, ror 19 |
0x00107e8a eor.w r0, sl, sl, ror 11 | r0 = sl ^ (sl >>> 11);
0x00107e8e eor.w r2, r2, r8 | r2 ^= r8;
0x00107e92 add.w sb, sb, ip, ror 6 | sb += (ip >>> 6);
0x00107e96 eor.w ip, sl, fp |
0x00107e9a eor.w r0, r0, sl, ror 20 | r0 ^= (sl >>> 20);
0x00107e9e add sb, r2 | sb += r2;
0x00107ea0 ldr r2, [sp, 0xc] | r2 = var_ch;
0x00107ea2 and.w r3, r3, ip | r3 &= ip;
0x00107ea6 add r5, sb | r5 += sb;
0x00107ea8 add.w sb, sb, r0, ror 2 | sb += (r0 >>> 2);
0x00107eac eor.w r3, r3, fp | r3 ^= fp;
0x00107eb0 add r8, r2 | r8 += r2;
0x00107eb2 eor.w r2, r6, r7 | r2 = r6 ^ r7;
0x00107eb6 eor.w r0, r5, r5, ror 5 | r0 = r5 ^ (r5 >>> 5);
0x00107eba add sb, r3 | sb += r3;
0x00107ebc and.w r2, r2, r5 | r2 &= r5;
0x00107ec0 eor.w r3, r0, r5, ror 19 | r3 = r0 ^ (r5 >>> 19);
0x00107ec4 eor.w r0, sb, sb, ror 11 | r0 = sb ^ (sb >>> 11);
0x00107ec8 eor.w r2, r2, r7 | r2 ^= r7;
0x00107ecc add.w r8, r8, r3, ror 6 | r8 += (r3 >>> 6);
0x00107ed0 eor.w r3, sb, sl | r3 = sb ^ sl;
0x00107ed4 eor.w r0, r0, sb, ror 20 | r0 ^= (sb >>> 20);
0x00107ed8 add r8, r2 | r8 += r2;
0x00107eda ldr r2, [sp, 0x10] | r2 = var_0h_2;
0x00107edc and.w ip, ip, r3 |
0x00107ee0 add r4, r8 | r4 += r8;
0x00107ee2 add.w r8, r8, r0, ror 2 | r8 += (r0 >>> 2);
0x00107ee6 eor.w ip, ip, sl |
0x00107eea vst1.32 {d16, d17}, [r1:0x80]! | __asm ("vst1.32 {d16, d17}, [r1:0x80]!");
0x00107eee add r7, r2 | r7 += r2;
0x00107ef0 eor.w r2, r5, r6 | r2 = r5 ^ r6;
0x00107ef4 eor.w r0, r4, r4, ror 5 | r0 = r4 ^ (r4 >>> 5);
0x00107ef8 add r8, ip | r8 += ip;
0x00107efa vld1.32 {d16, d17}, [lr:0x80]! | __asm ("vld1.32 {d16, d17}, [lr:0x80]!");
0x00107efe and.w r2, r2, r4 | r2 &= r4;
0x00107f02 eor.w ip, r0, r4, ror 19 |
0x00107f06 eor.w r0, r8, r8, ror 11 | r0 = r8 ^ (r8 >>> 11);
0x00107f0a eor.w r2, r2, r6 | r2 ^= r6;
0x00107f0e vrev32.8 q1, q1 | __asm ("vrev32.8 q1, q1");
0x00107f12 add.w r7, r7, ip, ror 6 | r7 += (ip >>> 6);
0x00107f16 eor.w ip, r8, sb |
0x00107f1a eor.w r0, r0, r8, ror 20 | r0 ^= (r8 >>> 20);
0x00107f1e add r7, r2 | r7 += r2;
0x00107f20 vadd.i32 q8, q8, q1 | __asm ("vadd.i32 q8, q8, q1");
0x00107f24 ldr r2, [sp, 0x14] | r2 = var_4h_2;
0x00107f26 and.w r3, r3, ip | r3 &= ip;
0x00107f2a add fp, r7 |
0x00107f2c add.w r7, r7, r0, ror 2 | r7 += (r0 >>> 2);
0x00107f30 eor.w r3, r3, sb | r3 ^= sb;
0x00107f34 add r6, r2 | r6 += r2;
0x00107f36 eor.w r2, r4, r5 | r2 = r4 ^ r5;
0x00107f3a eor.w r0, fp, fp, ror 5 | r0 = fp ^ (fp >>> 5);
0x00107f3e add r7, r3 | r7 += r3;
0x00107f40 and.w r2, r2, fp | r2 &= fp;
0x00107f44 eor.w r3, r0, fp, ror 19 | r3 = r0 ^ (fp >>> 19);
0x00107f48 eor.w r0, r7, r7, ror 11 | r0 = r7 ^ (r7 >>> 11);
0x00107f4c eor.w r2, r2, r5 | r2 ^= r5;
0x00107f50 add.w r6, r6, r3, ror 6 | r6 += (r3 >>> 6);
0x00107f54 eor.w r3, r7, r8 | r3 = r7 ^ r8;
0x00107f58 eor.w r0, r0, r7, ror 20 | r0 ^= (r7 >>> 20);
0x00107f5c add r6, r2 | r6 += r2;
0x00107f5e ldr r2, [sp, 0x18] | r2 = var_8h_2;
0x00107f60 and.w ip, ip, r3 |
0x00107f64 add sl, r6 | sl += r6;
0x00107f66 add.w r6, r6, r0, ror 2 | r6 += (r0 >>> 2);
0x00107f6a eor.w ip, ip, r8 |
0x00107f6c lsrs r0, r1, 0x10 | r0 = r1 >> 0x10;
0x00107f6e add r5, r2 | r5 += r2;
0x00107f70 eor.w r2, fp, r4 | r2 = fp ^ r4;
0x00107f74 eor.w r0, sl, sl, ror 5 | r0 = sl ^ (sl >>> 5);
0x00107f78 add r6, ip | r6 += ip;
0x00107f7a and.w r2, r2, sl | r2 &= sl;
0x00107f7e eor.w ip, r0, sl, ror 19 |
0x00107f82 eor.w r0, r6, r6, ror 11 | r0 = r6 ^ (r6 >>> 11);
0x00107f86 eor.w r2, r2, r4 | r2 ^= r4;
0x00107f8a add.w r5, r5, ip, ror 6 | r5 += (ip >>> 6);
0x00107f8e eor.w ip, r6, r7 |
0x00107f92 eor.w r0, r0, r6, ror 20 | r0 ^= (r6 >>> 20);
0x00107f96 add r5, r2 | r5 += r2;
0x00107f98 ldr r2, [sp, 0x1c] | r2 = var_ch_2;
0x00107f9a and.w r3, r3, ip | r3 &= ip;
0x00107f9e add sb, r5 | sb += r5;
0x00107fa0 add.w r5, r5, r0, ror 2 | r5 += (r0 >>> 2);
0x00107fa4 eor.w r3, r3, r7 | r3 ^= r7;
0x00107fa8 add r4, r2 | r4 += r2;
0x00107faa eor.w r2, sl, fp | r2 = sl ^ fp;
0x00107fae eor.w r0, sb, sb, ror 5 | r0 = sb ^ (sb >>> 5);
0x00107fb0 asrs r1, r7, 1 | r1 = r7 >> 1;
0x00107fb2 add r5, r3 | r5 += r3;
0x00107fb4 and.w r2, r2, sb | r2 &= sb;
0x00107fb8 eor.w r3, r0, sb, ror 19 | r3 = r0 ^ (sb >>> 19);
0x00107fbc eor.w r0, r5, r5, ror 11 | r0 = r5 ^ (r5 >>> 11);
0x00107fc0 eor.w r2, r2, fp | r2 ^= fp;
0x00107fc4 add.w r4, r4, r3, ror 6 | r4 += (r3 >>> 6);
0x00107fc8 eor.w r3, r5, r6 | r3 = r5 ^ r6;
0x00107fcc eor.w r0, r0, r5, ror 20 | r0 ^= (r5 >>> 20);
0x00107fd0 add r4, r2 | r4 += r2;
0x00107fd2 ldr r2, [sp, 0x20] | r2 = var_10h_2;
0x00107fd4 and.w ip, ip, r3 |
0x00107fd8 add r8, r4 | r8 += r4;
0x00107fda add.w r4, r4, r0, ror 2 | r4 += (r0 >>> 2);
0x00107fde eor.w ip, ip, r6 |
0x00107fe2 vst1.32 {d16, d17}, [r1:0x80]! | __asm ("vst1.32 {d16, d17}, [r1:0x80]!");
0x00107fe6 add fp, r2 |
0x00107fe8 eor.w r2, sb, sl | r2 = sb ^ sl;
0x00107fec eor.w r0, r8, r8, ror 5 | r0 = r8 ^ (r8 >>> 5);
0x00107ff0 add r4, ip | r4 += ip;
0x00107ff2 vld1.32 {d16, d17}, [lr:0x80]! | __asm ("vld1.32 {d16, d17}, [lr:0x80]!");
0x00107ff6 and.w r2, r2, r8 | r2 &= r8;
0x00107ffa eor.w ip, r0, r8, ror 19 |
0x00107ffe eor.w r0, r4, r4, ror 11 | r0 = r4 ^ (r4 >>> 11);
0x00108000 movs r0, 0xf4 | r0 = 0xf4;
0x00108002 eor.w r2, r2, sl | r2 ^= sl;
0x00108006 vrev32.8 q2, q2 | __asm ("vrev32.8 q2, q2");
0x0010800a add.w fp, fp, ip, ror 6 |
0x0010800e eor.w ip, r4, r5 |
0x00108010 lsrs r5, r0, 0x10 | r5 = r0 >> 0x10;
0x00108012 eor.w r0, r0, r4, ror 20 | r0 ^= (r4 >>> 20);
0x00108016 add fp, r2 |
0x00108018 vadd.i32 q8, q8, q2 | __asm ("vadd.i32 q8, q8, q2");
0x0010801c ldr r2, [sp, 0x24] | r2 = var_14h_2;
0x0010801e and.w r3, r3, ip | r3 &= ip;
0x00108022 add r7, fp | r7 += fp;
0x00108024 add.w fp, fp, r0, ror 2 |
0x00108028 eor.w r3, r3, r5 | r3 ^= r5;
0x0010802c add sl, r2 | sl += r2;
0x0010802e eor.w r2, r8, sb | r2 = r8 ^ sb;
0x00108032 eor.w r0, r7, r7, ror 5 | r0 = r7 ^ (r7 >>> 5);
0x00108036 add fp, r3 |
0x00108038 and.w r2, r2, r7 | r2 &= r7;
0x0010803c eor.w r3, r0, r7, ror 19 | r3 = r0 ^ (r7 >>> 19);
0x00108040 eor.w r0, fp, fp, ror 11 | r0 = fp ^ (fp >>> 11);
0x00108044 eor.w r2, r2, sb | r2 ^= sb;
0x00108048 add.w sl, sl, r3, ror 6 | sl += (r3 >>> 6);
0x0010804c eor.w r3, fp, r4 | r3 = fp ^ r4;
0x00108050 eor.w r0, r0, fp, ror 20 | r0 ^= (fp >>> 20);
0x00108054 add sl, r2 | sl += r2;
0x00108056 ldr r2, [sp, 0x28] | r2 = var_18h_2;
0x00108058 and.w ip, ip, r3 |
0x0010805c add r6, sl | r6 += sl;
0x0010805e add.w sl, sl, r0, ror 2 | sl += (r0 >>> 2);
0x00108062 eor.w ip, ip, r4 |
0x00108066 add sb, r2 | sb += r2;
0x00108068 eor.w r2, r7, r8 | r2 = r7 ^ r8;
0x0010806c eor.w r0, r6, r6, ror 5 | r0 = r6 ^ (r6 >>> 5);
0x00108070 add sl, ip | sl += ip;
0x00108072 and.w r2, r2, r6 | r2 &= r6;
0x00108076 eor.w ip, r0, r6, ror 19 |
0x0010807a eor.w r0, sl, sl, ror 3 | r0 = sl ^ (sl >>> 3);
0x0010807e eor.w r2, r0, r8 | r2 = r0 ^ r8;
0x00108082 add.w sb, sb, ip, ror 6 | sb += (ip >>> 6);
0x00108086 eor.w ip, sl, fp |
0x0010808a eor.w r0, r0, sl, ror 20 | r0 ^= (sl >>> 20);
0x0010808e add sb, r2 | sb += r2;
0x00108090 ldr r2, [sp, 0x2c] | r2 = var_1ch_2;
0x00108092 and.w r3, r3, ip | r3 &= ip;
0x00108096 add r5, sb | r5 += sb;
0x00108098 add.w sb, sb, r0, ror 2 | sb += (r0 >>> 2);
0x0010809c eor.w r3, r3, fp | r3 ^= fp;
0x001080a0 add r8, r2 | r8 += r2;
0x001080a2 eor.w r2, r6, r7 | r2 = r6 ^ r7;
0x001080a6 eor.w r0, r5, r5, ror 5 | r0 = r5 ^ (r5 >>> 5);
0x001080aa add sb, r3 | sb += r3;
0x001080ac and.w r2, r2, r5 | r2 &= r5;
0x001080b0 eor.w r3, r0, r5, ror 19 | r3 = r0 ^ (r5 >>> 19);
0x001080b4 eor.w r0, sb, sb, ror 11 | r0 = sb ^ (sb >>> 11);
0x001080b8 eor.w r2, r2, r7 | r2 ^= r7;
0x001080bc add.w r8, r8, r3, ror 6 | r8 += (r3 >>> 6);
0x001080c0 eor.w r3, sb, sl | r3 = sb ^ sl;
0x001080c4 eor.w r0, r0, sb, ror 20 | r0 ^= (sb >>> 20);
0x001080c8 add r8, r2 | r8 += r2;
0x001080ca ldr r2, [sp, 0x30] | r2 = var_20h_2;
0x001080cc and.w ip, ip, r3 |
0x001080d0 add r4, r8 | r4 += r8;
0x001080d2 add.w r8, r8, r0, ror 2 | r8 += (r0 >>> 2);
0x001080d6 eor.w ip, ip, sl |
0x001080da vst1.32 {d16, d17}, [r1:0x80]! | __asm ("vst1.32 {d16, d17}, [r1:0x80]!");
0x001080de add r7, r2 | r7 += r2;
0x001080e0 eor.w r2, r5, r6 | r2 = r5 ^ r6;
0x001080e4 eor.w r0, r4, r4, ror 5 | r0 = r4 ^ (r4 >>> 5);
0x001080e8 add r8, ip | r8 += ip;
0x001080ea vld1.32 {d16, d17}, [lr:0x80]! | __asm ("vld1.32 {d16, d17}, [lr:0x80]!");
0x001080ee and.w r2, r2, r4 | r2 &= r4;
0x001080f2 eor.w ip, r0, r4, ror 19 |
0x001080f6 eor.w r0, r8, r8, ror 11 | r0 = r8 ^ (r8 >>> 11);
0x001080fa eor.w r2, r2, r6 | r2 ^= r6;
0x001080fe vrev32.8 q3, q3 | __asm ("vrev32.8 q3, q3");
0x00108102 add.w r7, r7, ip, ror 6 | r7 += (ip >>> 6);
0x00108106 eor.w ip, r8, sb |
0x0010810a eor.w r0, r0, r8, ror 20 | r0 ^= (r8 >>> 20);
0x0010810e add r7, r2 | r7 += r2;
0x00108110 vadd.i32 q8, q8, q3 | __asm ("vadd.i32 q8, q8, q3");
0x00108114 ldr r2, [sp, 0x34] | r2 = var_24h_2;
0x00108116 and.w r3, r3, ip | r3 &= ip;
0x0010811a add fp, r7 |
0x0010811c add.w r7, r7, r0, ror 2 | r7 += (r0 >>> 2);
0x00108120 eor.w r3, r3, sb | r3 ^= sb;
0x00108124 add r6, r2 | r6 += r2;
0x00108126 eor.w r2, r4, r5 | r2 = r4 ^ r5;
0x0010812a eor.w r0, fp, fp, ror 5 | r0 = fp ^ (fp >>> 5);
0x0010812e add r7, r3 | r7 += r3;
0x00108130 and.w r2, r2, fp | r2 &= fp;
0x00108134 eor.w r3, r0, fp, ror 19 | r3 = r0 ^ (fp >>> 19);
0x00108138 eor.w r0, r7, r7, ror 11 | r0 = r7 ^ (r7 >>> 11);
0x0010813c eor.w r2, r2, r5 | r2 ^= r5;
0x00108140 add.w r6, r6, r3, ror 6 | r6 += (r3 >>> 6);
0x00108144 eor.w r3, r7, r8 | r3 = r7 ^ r8;
0x00108148 eor.w r0, r0, r7, ror 20 | r0 ^= (r7 >>> 20);
0x0010814c add r6, r2 | r6 += r2;
0x0010814e ldr r2, [sp, 0x38] | r2 = var_28h;
0x00108150 and.w ip, ip, r3 |
0x00108154 add sl, r6 | sl += r6;
0x00108156 add.w r6, r6, r0, ror 2 | r6 += (r0 >>> 2);
0x0010815a eor.w ip, ip, r8 |
0x0010815e add r5, r2 | r5 += r2;
0x00108160 eor.w r2, fp, r4 | r2 = fp ^ r4;
0x00108164 eor.w r0, sl, sl, ror 5 | r0 = sl ^ (sl >>> 5);
0x00108168 add r6, ip | r6 += ip;
0x0010816a and.w r2, r2, sl | r2 &= sl;
0x0010816e eor.w ip, r0, sl, ror 19 |
0x00108172 eor.w r0, r6, r6, ror 11 | r0 = r6 ^ (r6 >>> 11);
0x00108176 eor.w r2, r2, r4 | r2 ^= r4;
0x0010817a add.w r5, r5, ip, ror 6 | r5 += (ip >>> 6);
0x0010817e eor.w ip, r6, r7 |
0x00108182 eor.w r0, r0, r6, ror 20 | r0 ^= (r6 >>> 20);
0x00108186 add r5, r2 | r5 += r2;
0x00108188 ldr r2, [sp, 0x3c] | r2 = var_2ch;
0x0010818a and.w r3, r3, ip | r3 &= ip;
0x0010818e add sb, r5 | sb += r5;
0x00108190 add.w r5, r5, r0, ror 2 | r5 += (r0 >>> 2);
0x00108194 eor.w r3, r3, r7 | r3 ^= r7;
0x00108198 add r4, r2 | r4 += r2;
0x0010819a eor.w r2, sl, fp | r2 = sl ^ fp;
0x0010819e eor.w r0, sb, sb, ror 5 | r0 = sb ^ (sb >>> 5);
0x001081a2 add r5, r3 | r5 += r3;
0x001081a4 and.w r2, r2, sb | r2 &= sb;
0x001081a8 eor.w r3, r0, sb, ror 19 | r3 = r0 ^ (sb >>> 19);
0x001081ac eor.w r0, r5, r5, ror 11 | r0 = r5 ^ (r5 >>> 11);
0x001081b0 eor.w r2, r2, fp | r2 ^= fp;
0x001081b4 add.w r4, r4, r3, ror 6 | r4 += (r3 >>> 6);
0x001081b8 eor.w r3, r5, r6 | r3 = r5 ^ r6;
0x001081bc eor.w r0, r0, r5, ror 20 | r0 ^= (r5 >>> 20);
0x001081c0 add r4, r2 | r4 += r2;
0x001081c2 ldr r2, [sp, 0x40] | r2 = var_30h;
0x001081c4 and.w ip, ip, r3 |
0x001081c8 add r8, r4 | r8 += r4;
0x001081ca add.w r4, r4, r0, ror 2 | r4 += (r0 >>> 2);
0x001081ce eor.w ip, ip, r6 |
0x001081d2 vst1.32 {d16, d17}, [r1:0x80]! | __asm ("vst1.32 {d16, d17}, [r1:0x80]!");
0x001081d6 ldr r0, [r2] | r0 = *(r2);
0x001081d8 add r4, ip | r4 += ip;
0x001081da ldr.w ip, [r2, 4] | ip = *((r2 + 4));
0x001081de ldr r3, [r2, 8] | r3 = *((r2 + 8));
0x001081e0 ldr r1, [r2, 0xc] | r1 = *((r2 + 0xc));
0x001081e2 add r4, r0 | r4 += r0;
0x001081e4 ldr r0, [r2, 0x10] | r0 = *((r2 + 0x10));
0x001081e6 add r5, ip | r5 += ip;
0x001081e8 ldr.w ip, [r2, 0x14] | ip = *((r2 + 0x14));
0x001081ec add r6, r3 | r6 += r3;
0x001081ee ldr r3, [r2, 0x18] | r3 = *((r2 + 0x18));
0x001081f0 add r7, r1 | r7 += r1;
0x001081f2 ldr r1, [r2, 0x1c] | r1 = *((r2 + 0x1c));
0x001081f4 add r8, r0 | r8 += r0;
0x001081f6 str r4, [r2], 4 | *(r2) = r4;
| r2 += 4;
0x001081fa add sb, ip | sb += ip;
0x001081fc str r5, [r2], 4 | *(r2) = r5;
| r2 += 4;
0x00108200 add sl, r3 | sl += r3;
0x00108202 str r6, [r2], 4 | *(r2) = r6;
| r2 += 4;
0x00108206 add fp, r1 |
0x00108208 str r7, [r2], 4 | *(r2) = r7;
| r2 += 4;
0x0010820c stm.w r2, {r8, sb, sl, fp} | *(r2) = r8;
| *((r2 + 4)) = sb;
| *((r2 + 8)) = sl;
| *((r2 + 12)) = fp;
0x00108210 ittte ne |
| if (r5 == r0) {
0x00108212 movne r1, sp | r1 = sp;
| }
| if (r5 == r0) {
0x00108214 ldrne r2, [sp] | r2 = *(sp);
| }
| if (r5 == r0) {
0x00108216 eorne ip, ip, ip |
| }
| if (r5 == r0) {
0x0010821a ldr.w sp, [sp, 0x4c] | sp = var_3ch;
| }
0x0010821e itt ne |
| if (r5 == r0) {
0x00108220 eorne r3, r5, r6 | r3 = r5 ^ r6;
| }
| if (r5 != r0) {
0x00108224 b.w 0x107840 |
| }
| label_0:
0x00108240 vld1.32 {d0, d1, d2, d3}, [r0] | __asm ("vld1.32 {d0, d1, d2, d3}, [r0]");
0x00108244 sub.w r3, r3, 0x120 | r3 -= 0x120;
0x00108248 add.w r2, r1, r2, lsl 6 | r2 = r1 + (r2 << 6);
0x0010824c b 0x108250 |
0x00108250 vld1.8 {d16, d17, d18, d19}, [r1]! | __asm ("vld1.8 {d16, d17, d18, d19}, [r1]!");
0x00108254 vld1.8 {d20, d21, d22, d23}, [r1]! | __asm ("vld1.8 {d20, d21, d22, d23}, [r1]!");
0x00108258 vld1.32 {d24, d25}, [r3]! | __asm ("vld1.32 {d24, d25}, [r3]!");
0x0010825c vrev32.8 q8, q8 | __asm ("vrev32.8 q8, q8");
0x00108260 vrev32.8 q9, q9 | __asm ("vrev32.8 q9, q9");
0x00108264 vrev32.8 q10, q10 | __asm ("vrev32.8 q10, q10");
0x00108268 vrev32.8 q11, q11 | __asm ("vrev32.8 q11, q11");
0x0010826c vorr q14, q0, q0 | __asm ("vorr q14, q0, q0");
0x00108270 vorr q15, q1, q1 | __asm ("vorr q15, q1, q1");
0x00108274 teq.w r1, r2 | __asm ("teq.w r1, r2");
0x00108278 vld1.32 {d26, d27}, [r3]! | __asm ("vld1.32 {d26, d27}, [r3]!");
0x0010827c vadd.i32 q12, q12, q8 | __asm ("vadd.i32 q12, q12, q8");
0x00108280 invalid |
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/patool_extraction/rootfs.img_unblob_extracted/rootfs.img_extract/0-50593792.squashfs_v4_le_extract/usr/lib/libcrypto.so.1.1 @ 0x999d4 */
| #include <stdint.h>
|
; (fcn) sym.EC_GROUP_new_from_ecparameters () | void EC_GROUP_new_from_ecparameters (int16_t arg1) {
| int16_t var_0h;
| int16_t var_ch;
| r0 = arg1;
0x000999d4 ldr r3, [r0, 4] | r3 = *((r0 + 4));
0x000999d6 push.w {r4, r5, r6, r7, r8, sb, sl, fp, lr} |
0x000999da sub sp, 0x14 |
0x000999dc cmp r3, 0 |
| if (r3 == 0) {
0x000999de beq.w 0x99c66 | goto label_11;
| }
0x000999e2 ldr r2, [r3] | r2 = *(r3);
0x000999e4 cmp r2, 0 |
| if (r2 == 0) {
0x000999e6 beq.w 0x99c66 | goto label_11;
| }
0x000999ea ldr r3, [r3, 4] | r3 = *((r3 + 4));
0x000999ec cmp r3, 0 |
| if (r3 == 0) {
0x000999ee beq.w 0x99c66 | goto label_11;
| }
0x000999f2 ldr r3, [r0, 8] | r3 = *((r0 + 8));
0x000999f4 mov r5, r0 | r5 = r0;
0x000999f6 cmp r3, 0 |
| if (r3 != 0) {
0x000999f8 beq.w 0x99c0a |
0x000999fc ldr r2, [r3] | r2 = *(r3);
0x000999fe cmp r2, 0 |
| if (r2 == 0) {
0x00099a00 beq.w 0x99c0a | goto label_12;
| }
0x00099a04 ldr r0, [r2, 8] | r0 = *((r2 + 8));
0x00099a06 cmp r0, 0 |
| if (r0 == 0) {
0x00099a08 beq.w 0x99c0a | goto label_12;
| }
0x00099a0c ldr r3, [r3, 4] | r3 = *((r3 + 4));
0x00099a0e cmp r3, 0 |
| if (r3 == 0) {
0x00099a10 beq.w 0x99c0a | goto label_12;
| }
0x00099a14 ldr r3, [r3, 8] | r3 = *((r3 + 8));
0x00099a16 cmp r3, 0 |
| if (r3 == 0) {
0x00099a18 beq.w 0x99c0a | goto label_12;
| }
0x00099a1c ldr r1, [r2] | r1 = *(r2);
0x00099a1e movs r2, 0 | r2 = 0;
0x00099a20 bl 0x6f180 | r0 = BN_bin2bn ();
0x00099a24 mov r6, r0 | r6 = r0;
0x00099a26 cmp r0, 0 |
| if (r0 == 0) {
0x00099a28 beq.w 0x99c72 | goto label_13;
| }
0x00099a2c ldr r3, [r5, 8] | r3 = *((r5 + 8));
0x00099a2e movs r2, 0 | r2 = 0;
0x00099a30 ldr r3, [r3, 4] | r3 = *((r3 + 4));
0x00099a32 ldr r1, [r3] | r1 = *(r3);
0x00099a34 ldr r0, [r3, 8] | r0 = *((r3 + 8));
0x00099a36 bl 0x6f180 | r0 = BN_bin2bn ();
0x00099a3a mov r7, r0 | r7 = r0;
0x00099a3c cmp r0, 0 |
| if (r0 == 0) {
0x00099a3e beq.w 0x99d18 | goto label_14;
| }
0x00099a42 ldr r3, [r5, 4] | r3 = *((r5 + 4));
0x00099a44 ldr r0, [r3] | r0 = *(r3);
0x00099a46 bl 0xe8ad4 | OBJ_obj2nid ();
0x00099a4a movw r3, 0x197 | r3 = 0x197;
0x00099a4e cmp r0, r3 |
| if (r0 == r3) {
0x00099a50 beq.w 0x99cb8 | goto label_15;
| }
0x00099a54 cmp.w r0, 0x196 |
| if (r0 != 0x196) {
0x00099a58 bne.w 0x99d3a | goto label_16;
| }
0x00099a5c ldr r3, [r5, 4] | r3 = *((r5 + 4));
0x00099a5e ldr r3, [r3, 4] | r3 = *((r3 + 4));
0x00099a60 str r3, [sp, 0xc] | var_ch = r3;
0x00099a62 cmp r3, 0 |
| if (r3 == 0) {
0x00099a64 beq.w 0x99d62 | goto label_17;
| }
0x00099a68 ldr r0, [sp, 0xc] | r0 = var_ch;
0x00099a6a movs r1, 0 | r1 = 0;
0x00099a6c bl 0x4bed0 | r0 = ASN1_INTEGER_to_BN ();
0x00099a70 mov r8, r0 | r8 = r0;
0x00099a72 cmp r0, 0 |
| if (r0 == 0) {
0x00099a74 beq.w 0x99c96 | goto label_18;
| }
0x00099a78 bl 0x6edd4 | r0 = BN_is_negative ();
0x00099a7c cmp r0, 0 |
| if (r0 != 0) {
0x00099a7e bne.w 0x99d46 | goto label_19;
| }
0x00099a80 strh r2, [r4, 0xa] | *((r4 + 0xa)) = r2;
0x00099a82 mov r0, r8 | r0 = r8;
0x00099a84 bl 0x6ecd8 | r0 = BN_is_zero ();
0x00099a88 mov sb, r0 | sb = r0;
0x00099a8a cmp r0, 0 |
| if (r0 != 0) {
0x00099a8c bne.w 0x99d46 | goto label_19;
| }
0x00099a90 mov r0, r8 | r0 = r8;
0x00099a92 bl 0x6ece4 | BN_num_bits ();
0x00099a96 movw r3, 0x295 | r3 = 0x295;
0x00099a9a mov r4, r0 | r4 = r0;
0x00099a9c cmp r0, r3 |
| if (r0 > r3) {
0x00099a9e bgt.w 0x99dfa | goto label_20;
| }
0x00099aa2 mov r3, sb | r3 = sb;
0x00099aa4 mov r2, r7 | r2 = r7;
0x00099aa6 mov r1, r6 | r1 = r6;
0x00099aa8 mov r0, r8 | r0 = r8;
0x00099aaa bl 0x9b1c8 | EC_GROUP_new_curve_GFp ();
0x00099aae str r0, [sp, 0xc] | var_ch = r0;
| label_4:
0x00099ab0 ldr r3, [sp, 0xc] | r3 = var_ch;
0x00099ab2 cmp r3, 0 |
| if (r3 == 0) {
0x00099ab4 beq.w 0x99eda | goto label_21;
| }
0x00099ab8 ldr r3, [r5, 8] | r3 = *((r5 + 8));
0x00099aba ldr r3, [r3, 8] | r3 = *((r3 + 8));
| if (r3 != 0) {
0x00099abc cbz r3, 0x99b0c |
0x00099abe ldr r3, [r3] | r3 = *(r3);
0x00099ac0 cmp r3, 0 |
| if (r3 == 0) {
0x00099ac2 beq.w 0x99eac | goto label_22;
| }
0x00099ac6 ldr.w sl, [pc, 0x564] |
0x00099aca mov.w r2, 0x2fc | r2 = 0x2fc;
0x00099ace ldr r3, [sp, 0xc] | r3 = var_ch;
0x00099ad0 add sl, pc | sl = 0x133b02;
0x00099ad2 ldr r0, [r3, 0x20] | r0 = *((r3 + 0x20));
0x00099ad4 mov r1, sl | r1 = sl;
0x00099ad6 bl 0xe1c8c | CRYPTO_free ();
0x00099ada ldr r3, [r5, 8] | r3 = *((r5 + 8));
0x00099adc movw r2, 0x2fd | r2 = 0x2fd;
0x00099ae0 mov r1, sl | r1 = sl;
0x00099ae2 ldr r3, [r3, 8] | r3 = *((r3 + 8));
0x00099ae4 ldr r0, [r3] | r0 = *(r3);
0x00099ae6 bl 0xe1cc8 | CRYPTO_malloc ();
0x00099aea ldr r3, [sp, 0xc] | r3 = var_ch;
0x00099aec mov sb, r0 | sb = r0;
0x00099aee str r0, [r3, 0x20] | *((r3 + 0x20)) = r0;
0x00099af0 cmp r0, 0 |
| if (r0 == 0) {
0x00099af2 beq.w 0x99ee8 | goto label_23;
| }
0x00099af6 ldr r3, [r5, 8] | r3 = *((r5 + 8));
0x00099af8 ldr r3, [r3, 8] | r3 = *((r3 + 8));
0x00099afa ldr r2, [r3] | r2 = *(r3);
0x00099afc ldr r1, [r3, 8] | r1 = *((r3 + 8));
0x00099afe blx 0x44140 | fcn_00044140 ();
0x00099b02 ldr r3, [r5, 8] | r3 = *((r5 + 8));
0x00099b04 ldr r2, [sp, 0xc] | r2 = var_ch;
0x00099b06 ldr r3, [r3, 8] | r3 = *((r3 + 8));
0x00099b08 ldr r3, [r3] | r3 = *(r3);
0x00099b0a str r3, [r2, 0x24] | *((r2 + 0x24)) = r3;
| }
0x00099b0c ldr r3, [r5, 0x10] | r3 = *((r5 + 0x10));
0x00099b0e cmp r3, 0 |
| if (r3 == 0) {
0x00099b10 beq.w 0x99e1a | goto label_24;
| }
0x00099b14 ldr r3, [r5, 0xc] | r3 = *((r5 + 0xc));
0x00099b16 cmp r3, 0 |
| if (r3 == 0) {
0x00099b18 beq.w 0x99e1a | goto label_24;
| }
0x00099b1c ldr r2, [r3, 8] | r2 = *((r3 + 8));
0x00099b1e cmp r2, 0 |
| if (r2 == 0) {
0x00099b20 beq.w 0x99e1a | goto label_24;
| }
0x00099b24 ldr r3, [r3] | r3 = *(r3);
0x00099b26 cmp r3, 0 |
| if (r3 == 0) {
0x00099b28 beq.w 0x99e1a | goto label_24;
| }
0x00099b2c ldr.w sb, [sp, 0xc] | sb = var_ch;
0x00099b30 mov r0, sb | r0 = sb;
0x00099b32 bl 0x9c294 | r0 = EC_POINT_new ();
0x00099b36 mov sl, r0 | sl = r0;
0x00099b38 cmp r0, 0 |
| if (r0 == 0) {
0x00099b3a beq.w 0x99f0e | goto label_25;
| }
0x00099b3e ldr r3, [r5, 0xc] | r3 = *((r5 + 0xc));
0x00099b40 mov r0, sb | r0 = sb;
0x00099b42 ldr r3, [r3, 8] | r3 = *((r3 + 8));
0x00099b44 ldrb r1, [r3] | r1 = *(r3);
0x00099b46 and r1, r1, 0xfe | r1 &= 0xfe;
0x00099b4a bl 0x9c12c | EC_GROUP_set_point_conversion_form ();
0x00099b4e ldr r2, [r5, 0xc] | r2 = *((r5 + 0xc));
0x00099b50 mov.w ip, 0 |
0x00099b54 mov r1, sl | r1 = sl;
0x00099b56 mov r0, sb | r0 = sb;
0x00099b58 ldr r3, [r2] | r3 = *(r2);
0x00099b5a ldr r2, [r2, 8] | r2 = *((r2 + 8));
0x00099b5c str.w ip, [sp] | __asm ("str.w ip, [sp]");
0x00099b60 bl 0x9e7ec | r0 = EC_POINT_oct2point ();
0x00099b64 cmp r0, 0 |
| if (r0 == 0) {
0x00099b66 beq.w 0x99f14 | goto label_26;
| }
0x00099b6a ldr r0, [r5, 0x10] | r0 = *((r5 + 0x10));
0x00099b6c mov r1, r6 | r1 = r6;
0x00099b6e bl 0x4bed0 | r0 = ASN1_INTEGER_to_BN ();
0x00099b72 mov sb, r0 | sb = r0;
0x00099b74 cmp r0, 0 |
| if (r0 == 0) {
0x00099b76 beq.w 0x99f4c | goto label_27;
| }
0x00099b7a mov r0, r6 | r0 = r6;
0x00099b7c bl 0x6edd4 | r0 = BN_is_negative ();
0x00099b80 cmp r0, 0 |
| if (r0 != 0) {
0x00099b82 bne.w 0x99f30 | goto label_28;
| }
0x00099b86 mov r0, r6 | r0 = r6;
0x00099b88 bl 0x6ecd8 | r0 = BN_is_zero ();
0x00099b8c cmp r0, 0 |
| if (r0 != 0) {
0x00099b8e bne.w 0x99f30 | goto label_28;
| }
0x00099b92 mov r0, r6 | r0 = r6;
0x00099b94 adds r4, 1 | r4++;
0x00099b96 bl 0x6ece4 | r0 = BN_num_bits ();
0x00099b9a cmp r0, r4 |
| if (r0 > r4) {
0x00099b9c bgt.w 0x99fb0 | goto label_29;
| }
0x00099ba0 ldr r4, [r5, 0x14] | r4 = *((r5 + 0x14));
0x00099ba2 cmp r4, 0 |
| if (r4 == 0) {
0x00099ba4 beq.w 0x99fa6 | goto label_30;
| }
0x00099ba8 mov r0, r4 | r0 = r4;
0x00099baa mov r1, r7 | r1 = r7;
0x00099bac bl 0x4bed0 | r0 = ASN1_INTEGER_to_BN ();
0x00099bb0 mov sb, r0 | sb = r0;
0x00099bb2 cmp r0, 0 |
| if (r0 == 0) {
0x00099bb4 beq.w 0x99f9a | goto label_31;
| }
| label_7:
0x00099bb8 ldr r0, [sp, 0xc] | r0 = var_ch;
0x00099bba mov r3, r7 | r3 = r7;
0x00099bbc mov r2, r6 | r2 = r6;
0x00099bbe mov r1, sl | r1 = sl;
0x00099bc0 bl 0x9c650 | r0 = EC_GROUP_set_generator ();
0x00099bc4 mov r4, r0 | r4 = r0;
0x00099bc6 cmp r0, 0 |
| if (r0 == 0) {
0x00099bc8 beq.w 0x99f66 | goto label_32;
| }
0x00099bcc bl 0x6a874 | r0 = BN_CTX_new ();
0x00099bd0 mov r4, r0 | r4 = r0;
0x00099bd2 cmp r0, 0 |
| if (r0 == 0) {
0x00099bd4 beq.w 0x99f80 | goto label_33;
| }
0x00099bd8 ldr r0, [sp, 0xc] | r0 = var_ch;
0x00099bda bl 0x9c620 | r0 = EC_GROUP_dup ();
0x00099bde mov sb, r0 | sb = r0;
| if (r0 != 0) {
0x00099be0 cbz r0, 0x99bf0 |
0x00099be2 movs r2, 0 | r2 = 0;
0x00099be4 mov r1, r2 | r1 = r2;
0x00099be6 bl 0x9c134 | r0 = EC_GROUP_set_seed ();
0x00099bea cmp r0, 1 |
| if (r0 == 1) {
0x00099bec beq.w 0x99fbc | goto label_34;
| }
| }
| label_9:
0x00099bf0 movw r3, 0x34b | r3 = 0x34b;
0x00099bf4 movs r2, 0x10 | r2 = 0x10;
0x00099bf6 str r3, [sp] | *(sp) = r3;
0x00099bf8 movw r1, 0x107 | r1 = 0x107;
0x00099bfc ldr.w r3, [pc, 0x430] |
0x00099c00 mov r0, r2 | r0 = r2;
0x00099c02 add r3, pc | r3 = 0x133c36;
0x00099c04 bl 0xcfe08 | ERR_put_error ();
0x00099c08 b 0x99c30 | goto label_0;
| }
| label_12:
0x00099c0a ldr.w r3, [pc, 0x428] |
0x00099c0e movw r0, 0x262 | r0 = 0x262;
0x00099c12 movs r4, 0 | r4 = 0;
0x00099c14 add r3, pc | r3 = 0x133c4e;
| do {
0x00099c16 mov sl, r4 | sl = r4;
0x00099c18 mov r7, r4 | r7 = r4;
0x00099c1a mov r6, r4 | r6 = r4;
0x00099c1c mov r8, r4 | r8 = r4;
0x00099c1e mov sb, r4 | sb = r4;
0x00099c20 str r0, [sp] | *(sp) = r0;
0x00099c22 movs r2, 0x73 | r2 = 0x73;
0x00099c24 movw r1, 0x107 | r1 = 0x107;
0x00099c28 movs r0, 0x10 | r0 = 0x10;
0x00099c2a bl 0xcfe08 | ERR_put_error ();
0x00099c2e str r4, [sp, 0xc] | var_ch = r4;
| label_0:
0x00099c30 mov.w fp, 0 |
0x00099c34 ldr r0, [sp, 0xc] | r0 = var_ch;
0x00099c36 bl 0x9c354 | EC_GROUP_free ();
| label_10:
0x00099c3a mov r0, sb | r0 = sb;
0x00099c3c bl 0x9c354 | EC_GROUP_free ();
0x00099c40 mov r0, r8 | r0 = r8;
0x00099c42 bl 0x6ef18 | BN_free ();
0x00099c46 mov r0, r6 | r0 = r6;
0x00099c48 bl 0x6ef18 | BN_free ();
0x00099c4c mov r0, r7 | r0 = r7;
0x00099c4e bl 0x6ef18 | BN_free ();
0x00099c52 mov r0, sl | r0 = sl;
0x00099c54 bl 0x9c32c | EC_POINT_free ();
0x00099c58 mov r0, r4 | r0 = r4;
0x00099c5a bl 0x6a8c8 | BN_CTX_free ();
0x00099c5e mov r0, fp | r0 = fp;
0x00099c60 add sp, 0x14 |
0x00099c62 pop.w {r4, r5, r6, r7, r8, sb, sl, fp, pc} |
| label_11:
0x00099c66 ldr r3, [pc, 0x3d0] |
0x00099c68 movw r0, 0x255 | r0 = 0x255;
0x00099c6c movs r4, 0 | r4 = 0;
0x00099c6e add r3, pc | r3 = 0x133cac;
0x00099c70 b 0x99c16 |
| } while (1);
| label_13:
0x00099c72 ldr r3, [pc, 0x3c8] |
0x00099c74 movw r0, 0x267 | r0 = 0x267;
0x00099c78 str r0, [sp] | *(sp) = r0;
0x00099c7a movs r2, 3 | r2 = 3;
0x00099c7c movw r1, 0x107 | r1 = 0x107;
0x00099c80 movs r0, 0x10 | r0 = 0x10;
0x00099c82 add r3, pc | r3 = 0x133cc4;
0x00099c84 mov r4, r6 | r4 = r6;
0x00099c86 bl 0xcfe08 | ERR_put_error ();
0x00099c8a mov sl, r6 | sl = r6;
0x00099c8c mov r7, r6 | r7 = r6;
0x00099c8e mov r8, r6 | r8 = r6;
0x00099c90 mov sb, r6 | sb = r6;
0x00099c92 str r6, [sp, 0xc] | var_ch = r6;
0x00099c94 b 0x99c30 | goto label_0;
| label_18:
0x00099c96 ldr r3, [pc, 0x3a8] |
0x00099c98 movw r2, 0x2d5 | r2 = 0x2d5;
0x00099c9c str r2, [sp] | *(sp) = r2;
0x00099c9e movs r2, 0xd | r2 = 0xd;
0x00099ca0 add r3, pc | r3 = 0x133ce6;
| label_3:
0x00099ca2 movw r1, 0x107 | r1 = 0x107;
0x00099ca6 movs r0, 0x10 | r0 = 0x10;
0x00099ca8 bl 0xcfe08 | ERR_put_error ();
0x00099cac mov r4, r8 | r4 = r8;
0x00099cae mov sl, r8 | sl = r8;
0x00099cb0 mov sb, r8 | sb = r8;
0x00099cb2 str.w r8, [sp, 0xc] | __asm ("str.w r8, [var_ch]");
0x00099cb6 b 0x99c30 | goto label_0;
| label_15:
0x00099cb8 ldr r3, [r5, 4] | r3 = *((r5 + 4));
0x00099cba ldr.w sb, [r3, 4] | sb = *((r3 + 4));
0x00099cbe movw r3, 0x295 | r3 = 0x295;
0x00099cc2 ldr.w r4, [sb] | r4 = *(sb);
0x00099cc6 cmp r4, r3 |
| if (r4 > r3) {
0x00099cc8 bgt 0x99d56 | goto label_35;
| }
0x00099cca bl 0x6e97c | r0 = BN_new ();
0x00099cce mov r8, r0 | r8 = r0;
0x00099cd0 cmp r0, 0 |
| if (r0 == 0) {
0x00099cd2 beq.w 0x99dec | goto label_36;
| }
0x00099cd6 ldr.w r0, [sb, 4] | r0 = *((sb + 4));
0x00099cda bl 0xe8ad4 | OBJ_obj2nid ();
0x00099cde movw r3, 0x2aa | r3 = 0x2aa;
0x00099ce2 cmp r0, r3 |
| if (r0 == r3) {
0x00099ce4 beq 0x99d84 | goto label_37;
| }
0x00099ce6 movw r3, 0x2ab | r3 = 0x2ab;
0x00099cea cmp r0, r3 |
| if (r0 == r3) {
0x00099cec beq 0x99db4 | goto label_38;
| }
0x00099cee movw r3, 0x2a9 | r3 = 0x2a9;
0x00099cf2 cmp r0, r3 |
| if (r0 == r3) {
0x00099cf4 beq.w 0x99e38 | goto label_39;
| }
0x00099cf8 ldr r3, [pc, 0x348] |
0x00099cfa mov.w r2, 0x2c4 | r2 = 0x2c4;
0x00099cfe str r2, [sp] | *(sp) = r2;
0x00099d00 movs r4, 0 | r4 = 0;
0x00099d02 movs r2, 0x73 | r2 = 0x73;
0x00099d04 add r3, pc | r3 = 0x133d4c;
| label_1:
0x00099d06 movw r1, 0x107 | r1 = 0x107;
0x00099d0a movs r0, 0x10 | r0 = 0x10;
0x00099d0c bl 0xcfe08 | ERR_put_error ();
0x00099d10 mov sl, r4 | sl = r4;
0x00099d12 mov sb, r4 | sb = r4;
0x00099d14 str r4, [sp, 0xc] | var_ch = r4;
0x00099d16 b 0x99c30 | goto label_0;
| label_14:
0x00099d18 ldr r3, [pc, 0x32c] |
0x00099d1a mov.w r1, 0x26c | r1 = 0x26c;
0x00099d1e movs r2, 3 | r2 = 3;
0x00099d20 add r3, pc | r3 = 0x133d6c;
| do {
| label_2:
0x00099d22 movs r4, 0 | r4 = 0;
0x00099d24 str r1, [sp] | *(sp) = r1;
0x00099d26 movs r0, 0x10 | r0 = 0x10;
0x00099d28 movw r1, 0x107 | r1 = 0x107;
0x00099d2c bl 0xcfe08 | ERR_put_error ();
0x00099d30 mov sl, r4 | sl = r4;
0x00099d32 mov r8, r4 | r8 = r4;
0x00099d34 mov sb, r4 | sb = r4;
0x00099d36 str r4, [sp, 0xc] | var_ch = r4;
0x00099d38 b 0x99c30 | goto label_0;
| label_16:
0x00099d3a ldr r3, [pc, 0x310] |
0x00099d3c movw r1, 0x2e7 | r1 = 0x2e7;
0x00099d40 movs r2, 0x67 | r2 = 0x67;
0x00099d42 add r3, pc | r3 = 0x133d94;
0x00099d44 b 0x99d22 |
| } while (1);
| label_19:
0x00099d46 ldr r3, [pc, 0x308] |
0x00099d48 movw r2, 0x2da | r2 = 0x2da;
0x00099d4c str r2, [sp] | *(sp) = r2;
0x00099d4e movs r4, 0 | r4 = 0;
0x00099d50 movs r2, 0x67 | r2 = 0x67;
0x00099d52 add r3, pc | r3 = 0x133da8;
0x00099d54 b 0x99d06 | goto label_1;
| label_35:
0x00099d56 ldr r3, [pc, 0x2fc] |
0x00099d58 mov.w r1, 0x280 | r1 = 0x280;
0x00099d5c movs r2, 0x8f | r2 = 0x8f;
0x00099d5e add r3, pc | r3 = 0x133db8;
0x00099d60 b 0x99d22 | goto label_2;
| label_17:
0x00099d62 ldr r3, [pc, 0x2f4] |
0x00099d64 mov.w r2, 0x2d0 | r2 = 0x2d0;
0x00099d68 str r2, [sp] | *(sp) = r2;
0x00099d6a movw r1, 0x107 | r1 = 0x107;
0x00099d6e movs r2, 0x73 | r2 = 0x73;
0x00099d70 movs r0, 0x10 | r0 = 0x10;
0x00099d72 add r3, pc | r3 = 0x133dd0;
0x00099d74 bl 0xcfe08 | ERR_put_error ();
0x00099d78 ldr.w sb, [sp, 0xc] | sb = var_ch;
0x00099d7c mov r4, sb | r4 = sb;
0x00099d7e mov sl, sb | sl = sb;
0x00099d80 mov r8, sb | r8 = sb;
0x00099d82 b 0x99c30 | goto label_0;
| label_37:
0x00099d84 ldr.w r3, [sb, 8] | r3 = *((sb + 8));
0x00099d88 str r3, [sp, 0xc] | var_ch = r3;
0x00099d8a cmp r3, 0 |
| if (r3 == 0) {
0x00099d8c beq.w 0x99eba | goto label_40;
| }
0x00099d90 ldr r0, [sp, 0xc] | r0 = var_ch;
0x00099d92 bl 0x4be64 | ASN1_INTEGER_get ();
0x00099d96 ldr.w r1, [sb] | r1 = *(sb);
0x00099d9a mov sb, r0 | sb = r0;
0x00099d9c cmp r1, r0 |
0x00099d9e it gt |
| if (r1 > r0) {
0x00099da0 cmpgt r0, 0 | __asm ("cmpgt r0, 0");
| }
| if (r1 <= r0) {
0x00099da2 bgt 0x99e48 |
0x00099da4 ldr r3, [pc, 0x2b4] |
0x00099da6 movw r2, 0x297 | r2 = 0x297;
0x00099daa str r2, [sp] | *(sp) = r2;
0x00099dac movs r4, 0 | r4 = 0;
0x00099dae movs r2, 0x89 | r2 = 0x89;
0x00099db0 add r3, pc | r3 = 0x133e10;
0x00099db2 b 0x99d06 | goto label_1;
| label_38:
0x00099db4 ldr.w r3, [sb, 8] | r3 = *((sb + 8));
0x00099db8 str r3, [sp, 0xc] | var_ch = r3;
0x00099dba cmp r3, 0 |
| if (r3 == 0) {
0x00099dbc beq.w 0x99f02 | goto label_41;
| }
0x00099dc0 ldr r0, [sp, 0xc] | r0 = var_ch;
0x00099dc2 ldr.w r1, [sb] | r1 = *(sb);
0x00099dc6 ldr r3, [r0, 8] | r3 = *((r0 + 8));
0x00099dc8 cmp r1, r3 |
| if (r1 > r3) {
0x00099dca ble 0x99ddc |
0x00099dcc ldr r2, [r0, 4] | r2 = *((r0 + 4));
0x00099dce cmp r3, r2 |
| if (r3 <= r2) {
0x00099dd0 ble 0x99ddc | goto label_42;
| }
0x00099dd2 ldr r3, [r0] | r3 = *(r0);
0x00099dd4 cmp r2, r3 |
0x00099dd6 it gt |
| if (r2 > r3) {
0x00099dd8 cmpgt r3, 0 | __asm ("cmpgt r3, 0");
| }
| if (r2 > r3) {
0x00099dda bgt 0x99e74 | goto label_43;
| }
| }
| label_42:
0x00099ddc ldr r3, [pc, 0x280] |
0x00099dde movw r2, 0x2af | r2 = 0x2af;
0x00099de2 str r2, [sp] | *(sp) = r2;
0x00099de4 movs r4, 0 | r4 = 0;
0x00099de6 movs r2, 0x84 | r2 = 0x84;
0x00099de8 add r3, pc | r3 = 0x133e4c;
0x00099dea b 0x99d06 | goto label_1;
| label_36:
0x00099dec ldr r3, [pc, 0x274] |
0x00099dee movw r2, 0x285 | r2 = 0x285;
0x00099df2 str r2, [sp] | *(sp) = r2;
0x00099df4 movs r2, 0x41 | r2 = 0x41;
0x00099df6 add r3, pc | r3 = 0x133e5e;
0x00099df8 b 0x99ca2 | goto label_3;
| label_20:
0x00099dfa mov.w r3, 0x2e0 | r3 = 0x2e0;
0x00099dfe movs r2, 0x8f | r2 = 0x8f;
0x00099e00 str r3, [sp] | *(sp) = r3;
0x00099e02 movw r1, 0x107 | r1 = 0x107;
0x00099e06 ldr r3, [pc, 0x260] |
0x00099e08 movs r0, 0x10 | r0 = 0x10;
0x00099e0a mov r4, sb | r4 = sb;
0x00099e0c mov sl, sb | sl = sb;
0x00099e0e add r3, pc | r3 = 0x133e7c;
0x00099e10 bl 0xcfe08 | ERR_put_error ();
0x00099e14 str.w sb, [sp, 0xc] | __asm ("str.w sb, [var_ch]");
0x00099e18 b 0x99c30 | goto label_0;
| label_24:
0x00099e1a movw r3, 0x30a | r3 = 0x30a;
0x00099e1e movs r4, 0 | r4 = 0;
0x00099e20 str r3, [sp] | *(sp) = r3;
0x00099e22 ldr r3, [pc, 0x248] |
0x00099e24 add r3, pc | r3 = 0x133e96;
| label_5:
0x00099e26 movs r2, 0x73 | r2 = 0x73;
0x00099e28 movw r1, 0x107 | r1 = 0x107;
0x00099e2c movs r0, 0x10 | r0 = 0x10;
0x00099e2e mov sl, r4 | sl = r4;
0x00099e30 mov sb, r4 | sb = r4;
0x00099e32 bl 0xcfe08 | ERR_put_error ();
0x00099e36 b 0x99c30 | goto label_0;
| label_39:
0x00099e38 ldr r3, [pc, 0x234] |
0x00099e3a mov.w r2, 0x2c0 | r2 = 0x2c0;
0x00099e3e str r2, [sp] | *(sp) = r2;
0x00099e40 movs r4, 0 | r4 = 0;
0x00099e42 movs r2, 0x7e | r2 = 0x7e;
0x00099e44 add r3, pc | r3 = 0x133eb8;
0x00099e46 b 0x99d06 | goto label_1;
| }
0x00099e48 mov r0, r8 | r0 = r8;
0x00099e4a bl 0x6f100 | r0 = BN_set_bit ();
| if (r0 == 0) {
0x00099e4e cbz r0, 0x99ea2 | goto label_44;
| }
0x00099e50 mov r1, sb | r1 = sb;
0x00099e52 mov r0, r8 | r0 = r8;
0x00099e54 bl 0x6f100 | r0 = BN_set_bit ();
| if (r0 == 0) {
0x00099e58 cbz r0, 0x99ea2 | goto label_44;
| }
| do {
0x00099e5a movs r1, 0 | r1 = 0;
0x00099e5c mov r0, r8 | r0 = r8;
0x00099e5e bl 0x6f100 | r0 = BN_set_bit ();
| if (r0 == 0) {
0x00099e62 cbz r0, 0x99ea2 | goto label_44;
| }
0x00099e64 movs r3, 0 | r3 = 0;
0x00099e66 mov r2, r7 | r2 = r7;
0x00099e68 mov r1, r6 | r1 = r6;
0x00099e6a mov r0, r8 | r0 = r8;
0x00099e6c bl 0x9b208 | EC_GROUP_new_curve_GF2m ();
0x00099e70 str r0, [sp, 0xc] | var_ch = r0;
0x00099e72 b 0x99ab0 | goto label_4;
| label_43:
0x00099e74 mov r0, r8 | r0 = r8;
0x00099e76 bl 0x6f100 | r0 = BN_set_bit ();
| if (r0 == 0) {
0x00099e7a cbz r0, 0x99ea2 | goto label_44;
| }
0x00099e7c ldr r3, [sp, 0xc] | r3 = var_ch;
0x00099e7e mov r0, r8 | r0 = r8;
0x00099e80 ldr r1, [r3] | r1 = *(r3);
0x00099e82 bl 0x6f100 | r0 = BN_set_bit ();
| if (r0 == 0) {
0x00099e86 cbz r0, 0x99ea2 | goto label_44;
| }
0x00099e88 ldr r3, [sp, 0xc] | r3 = var_ch;
0x00099e8a mov r0, r8 | r0 = r8;
0x00099e8c ldr r1, [r3, 4] | r1 = *((r3 + 4));
0x00099e8e bl 0x6f100 | r0 = BN_set_bit ();
| if (r0 == 0) {
0x00099e92 cbz r0, 0x99ea2 | goto label_44;
| }
0x00099e94 ldr r3, [sp, 0xc] | r3 = var_ch;
0x00099e96 mov r0, r8 | r0 = r8;
0x00099e98 ldr r1, [r3, 8] | r1 = *((r3 + 8));
0x00099e9a bl 0x6f100 | r0 = BN_set_bit ();
0x00099e9e cmp r0, 0 |
0x00099ea0 bne 0x99e5a |
| } while (r0 != 0);
| label_44:
0x00099ea2 movs r4, 0 | r4 = 0;
0x00099ea4 mov sl, r4 | sl = r4;
0x00099ea6 mov sb, r4 | sb = r4;
0x00099ea8 str r4, [sp, 0xc] | var_ch = r4;
0x00099eaa b 0x99c30 | goto label_0;
| label_22:
0x00099eac mov r4, r3 | r4 = r3;
0x00099eae movw r3, 0x2f9 | r3 = 0x2f9;
0x00099eb2 str r3, [sp] | *(sp) = r3;
0x00099eb4 ldr r3, [pc, 0x1bc] |
0x00099eb6 add r3, pc | r3 = 0x133f2e;
0x00099eb8 b 0x99e26 | goto label_5;
| label_40:
0x00099eba mov.w r3, 0x290 | r3 = 0x290;
0x00099ebe str r3, [sp] | *(sp) = r3;
0x00099ec0 ldr r3, [pc, 0x1b4] |
0x00099ec2 add r3, pc | r3 = 0x133f3e;
| label_6:
0x00099ec4 movs r2, 0x73 | r2 = 0x73;
| do {
0x00099ec6 movw r1, 0x107 | r1 = 0x107;
0x00099eca movs r0, 0x10 | r0 = 0x10;
0x00099ecc bl 0xcfe08 | ERR_put_error ();
0x00099ed0 ldr.w sb, [sp, 0xc] | sb = var_ch;
0x00099ed4 mov r4, sb | r4 = sb;
0x00099ed6 mov sl, sb | sl = sb;
0x00099ed8 b 0x99c30 | goto label_0;
| label_21:
0x00099eda mov.w r3, 0x2ec | r3 = 0x2ec;
0x00099ede movs r2, 0x10 | r2 = 0x10;
0x00099ee0 str r3, [sp] | *(sp) = r3;
0x00099ee2 ldr r3, [pc, 0x198] |
0x00099ee4 add r3, pc | r3 = 0x133f66;
0x00099ee6 b 0x99ec6 |
| } while (1);
| label_23:
0x00099ee8 movw r2, 0x2fe | r2 = 0x2fe;
0x00099eec mov r3, sl | r3 = sl;
0x00099eee str r2, [sp] | *(sp) = r2;
0x00099ef0 movw r1, 0x107 | r1 = 0x107;
0x00099ef4 movs r2, 0x41 | r2 = 0x41;
0x00099ef6 movs r0, 0x10 | r0 = 0x10;
0x00099ef8 mov r4, sb | r4 = sb;
0x00099efa mov sl, sb | sl = sb;
0x00099efc bl 0xcfe08 | ERR_put_error ();
0x00099f00 b 0x99c30 | goto label_0;
| label_41:
0x00099f02 mov.w r3, 0x2a8 | r3 = 0x2a8;
0x00099f06 str r3, [sp] | *(sp) = r3;
0x00099f08 ldr r3, [pc, 0x174] |
0x00099f0a add r3, pc | r3 = 0x133f8e;
0x00099f0c b 0x99ec4 | goto label_6;
| label_25:
0x00099f0e mov r4, r0 | r4 = r0;
0x00099f10 mov sb, r0 | sb = r0;
0x00099f12 b 0x99c30 | goto label_0;
| label_26:
0x00099f14 mov.w r3, 0x318 | r3 = 0x318;
0x00099f18 movs r2, 0x10 | r2 = 0x10;
0x00099f1a str r3, [sp] | *(sp) = r3;
0x00099f1c mov r4, r0 | r4 = r0;
0x00099f1e ldr r3, [pc, 0x164] |
0x00099f20 movw r1, 0x107 | r1 = 0x107;
0x00099f24 mov r0, r2 | r0 = r2;
0x00099f26 mov sb, r4 | sb = r4;
0x00099f28 add r3, pc | r3 = 0x133fb2;
0x00099f2a bl 0xcfe08 | ERR_put_error ();
0x00099f2e b 0x99c30 | goto label_0;
| label_28:
0x00099f30 movw r3, 0x322 | r3 = 0x322;
0x00099f34 str r3, [sp] | *(sp) = r3;
0x00099f36 ldr r3, [pc, 0x150] |
0x00099f38 add r3, pc | r3 = 0x133fc6;
| label_8:
0x00099f3a movs r2, 0x7a | r2 = 0x7a;
0x00099f3c movw r1, 0x107 | r1 = 0x107;
0x00099f40 movs r0, 0x10 | r0 = 0x10;
0x00099f42 movs r4, 0 | r4 = 0;
0x00099f44 mov sb, r4 | sb = r4;
0x00099f46 bl 0xcfe08 | ERR_put_error ();
0x00099f4a b 0x99c30 | goto label_0;
| label_27:
0x00099f4c movw r3, 0x31e | r3 = 0x31e;
0x00099f50 str r3, [sp] | *(sp) = r3;
0x00099f52 ldr r3, [pc, 0x138] |
0x00099f54 add r3, pc | r3 = 0x133fe6;
| do {
0x00099f56 movs r2, 0xd | r2 = 0xd;
0x00099f58 movw r1, 0x107 | r1 = 0x107;
0x00099f5c movs r0, 0x10 | r0 = 0x10;
0x00099f5e mov r4, sb | r4 = sb;
0x00099f60 bl 0xcfe08 | ERR_put_error ();
0x00099f64 b 0x99c30 | goto label_0;
| label_32:
0x00099f66 mov.w r3, 0x334 | r3 = 0x334;
0x00099f6a movs r2, 0x10 | r2 = 0x10;
0x00099f6c str r3, [sp] | *(sp) = r3;
0x00099f6e movw r1, 0x107 | r1 = 0x107;
0x00099f72 ldr r3, [pc, 0x11c] |
0x00099f74 mov r0, r2 | r0 = r2;
0x00099f76 mov sb, r4 | sb = r4;
0x00099f78 add r3, pc | r3 = 0x13400e;
0x00099f7a bl 0xcfe08 | ERR_put_error ();
0x00099f7e b 0x99c30 | goto label_0;
| label_33:
0x00099f80 movw r3, 0x345 | r3 = 0x345;
0x00099f84 movs r2, 3 | r2 = 3;
0x00099f86 str r3, [sp] | *(sp) = r3;
0x00099f88 movw r1, 0x107 | r1 = 0x107;
0x00099f8c ldr r3, [pc, 0x104] |
0x00099f8e movs r0, 0x10 | r0 = 0x10;
0x00099f90 mov sb, r4 | sb = r4;
0x00099f92 add r3, pc | r3 = 0x13402a;
0x00099f94 bl 0xcfe08 | ERR_put_error ();
0x00099f98 b 0x99c30 | goto label_0;
| label_31:
0x00099f9a movw r3, 0x32f | r3 = 0x32f;
0x00099f9e str r3, [sp] | *(sp) = r3;
0x00099fa0 ldr r3, [pc, 0xf4] |
0x00099fa2 add r3, pc | r3 = 0x13403e;
0x00099fa4 b 0x99f56 |
| } while (1);
| label_30:
0x00099fa6 mov r0, r7 | r0 = r7;
0x00099fa8 mov r7, r4 | r7 = r4;
0x00099faa bl 0x6ef18 | BN_free ();
0x00099fae b 0x99bb8 | goto label_7;
| label_29:
0x00099fb0 movw r3, 0x326 | r3 = 0x326;
0x00099fb4 str r3, [sp] | *(sp) = r3;
0x00099fb6 ldr r3, [pc, 0xe4] |
0x00099fb8 add r3, pc | r3 = "5mmQ";
0x00099fba b 0x99f3a | goto label_8;
| label_34:
0x00099fbc movs r3, 0 | r3 = 0;
0x00099fbe mov r2, r6 | r2 = r6;
0x00099fc0 mov r1, sl | r1 = sl;
0x00099fc2 mov r0, sb | r0 = sb;
0x00099fc4 bl 0x9c650 | r0 = EC_GROUP_set_generator ();
0x00099fc8 cmp r0, 0 |
| if (r0 == 0) {
0x00099fca beq.w 0x99bf0 | goto label_9;
| }
0x00099fce mov r1, r4 | r1 = r4;
0x00099fd0 mov r0, sb | r0 = sb;
0x00099fd2 bl 0x9af9c | r0 = fcn_0009af9c (r0, r1, r2, r3);
| if (r0 == 0) {
0x00099fd6 cbnz r0, 0x99fde |
0x00099fd8 ldr.w fp, [sp, 0xc] | fp = var_ch;
0x00099fdc b 0x99c3a | goto label_10;
| }
0x00099fde bl 0x9ab2c | r0 = EC_GROUP_new_by_curve_name ();
0x00099fe2 mov fp, r0 |
| if (r0 == 0) {
0x00099fe4 cbz r0, 0x9a012 | goto label_45;
| }
0x00099fe6 ldr r0, [sp, 0xc] | r0 = var_ch;
0x00099fe8 bl 0x9c354 | EC_GROUP_free ();
0x00099fec movs r1, 0 | r1 = 0;
0x00099fee mov r0, fp | r0 = fp;
0x00099ff0 bl 0x9c124 | EC_GROUP_set_asn1_flag ();
0x00099ff4 ldr r3, [r5, 8] | r3 = *((r5 + 8));
0x00099ff6 ldr r2, [r3, 8] | r2 = *((r3 + 8));
0x00099ff8 cmp r2, 0 |
| if (r2 != 0) {
0x00099ffa bne.w 0x99c3a | goto label_10;
| }
0x00099ffe mov r1, r2 | r1 = r2;
0x0009a000 mov r0, fp | r0 = fp;
0x0009a002 bl 0x9c134 | r0 = EC_GROUP_set_seed ();
0x0009a006 cmp r0, 1 |
| if (r0 == 1) {
0x0009a008 beq.w 0x99c3a | goto label_10;
| }
0x0009a00c str.w fp, [sp, 0xc] | __asm ("str.w fp, [var_ch]");
0x0009a010 b 0x99c30 | goto label_0;
| label_45:
0x0009a012 mov.w r3, 0x364 | r3 = 0x364;
0x0009a016 movs r2, 0x10 | r2 = 0x10;
0x0009a018 str r3, [sp] | *(sp) = r3;
0x0009a01a movw r1, 0x107 | r1 = 0x107;
0x0009a01e ldr r3, [pc, 0x80] |
0x0009a020 mov r0, r2 | r0 = r2;
0x0009a022 add r3, pc | r3 = 0x1340c8;
0x0009a024 bl 0xcfe08 | ERR_put_error ();
0x0009a028 b 0x99c30 | goto label_0;
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/patool_extraction/rootfs.img_unblob_extracted/rootfs.img_extract/0-50593792.squashfs_v4_le_extract/usr/lib/libcrypto.so.1.1 @ 0x9b5e4 */
| #include <stdint.h>
|
; (fcn) sym.EC_KEY_check_key () | void EC_KEY_check_key (int16_t arg1) {
| int16_t var_0h;
| r0 = arg1;
0x0009b5e4 push {r4, lr} |
0x0009b5e6 sub sp, 8 |
| if (r0 != 0) {
0x0009b5e8 cbz r0, 0x9b602 |
0x0009b5ea ldr r2, [r0, 0xc] | r2 = *((r0 + 0xc));
| if (r2 == 0) {
0x0009b5ec cbz r2, 0x9b602 | goto label_0;
| }
0x0009b5ee ldr r3, [r0, 0x10] | r3 = *((r0 + 0x10));
| if (r3 == 0) {
0x0009b5f0 cbz r3, 0x9b602 | goto label_0;
| }
0x0009b5f2 ldr r3, [r2] | r3 = *(r2);
0x0009b5f4 ldr.w r3, [r3, 0xb4] | r3 = *((r3 + 0xb4));
| if (r3 == 0) {
0x0009b5f8 cbz r3, 0x9b61c | goto label_1;
| }
0x0009b5fa add sp, 8 |
0x0009b5fc pop.w {r4, lr} |
0x0009b600 bx r3 | return uint32_t (*r3)() ();
| }
| label_0:
0x0009b602 ldr r3, [pc, 0x30] |
0x0009b604 movw r4, 0x103 | r4 = 0x103;
0x0009b608 movs r2, 0x43 | r2 = 0x43;
0x0009b60a movs r1, 0xb1 | r1 = 0xb1;
0x0009b60c movs r0, 0x10 | r0 = 0x10;
0x0009b60e str r4, [sp] | *(sp) = r4;
0x0009b610 add r3, pc | r3 = 0x136c4a;
0x0009b612 bl 0xcfe08 | ERR_put_error ();
| do {
0x0009b616 movs r0, 0 | r0 = 0;
0x0009b618 add sp, 8 |
0x0009b61a pop {r4, pc} |
| label_1:
0x0009b61c ldr r3, [pc, 0x18] |
0x0009b61e mov.w r4, 0x108 | r4 = 0x108;
0x0009b622 movs r2, 0x42 | r2 = 0x42;
0x0009b624 movs r1, 0xb1 | r1 = 0xb1;
0x0009b626 movs r0, 0x10 | r0 = 0x10;
0x0009b628 str r4, [sp] | *(sp) = r4;
0x0009b62a add r3, pc | r3 = 0x136c66;
0x0009b62c bl 0xcfe08 | ERR_put_error ();
0x0009b630 b 0x9b616 |
| } while (1);
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/patool_extraction/rootfs.img_unblob_extracted/rootfs.img_extract/0-50593792.squashfs_v4_le_extract/usr/lib/libcrypto.so.1.1 @ 0xf34f8 */
| #include <stdint.h>
|
; (fcn) sym.PKCS12_SAFEBAG_get1_cert () | void PKCS12_SAFEBAG_get1_cert (int16_t arg1) {
| r0 = arg1;
0x000f34f8 push {r3, r4, r5, lr} |
0x000f34fa mov r4, r0 | r4 = r0;
0x000f34fc ldr r5, [pc, 0x28] |
0x000f34fe bl 0xf34b8 | r0 = PKCS12_SAFEBAG_get_nid ();
0x000f3502 cmp r0, 0x98 |
0x000f3504 add r5, pc | r5 = 0x1e6a30;
| if (r0 == 0x98) {
0x000f3506 bne 0xf3524 |
0x000f3508 ldr r3, [r4, 4] | r3 = *((r4 + 4));
0x000f350a ldr r0, [r3] | r0 = *(r3);
0x000f350c bl 0xe8ad4 | r0 = OBJ_obj2nid ();
0x000f3510 cmp r0, 0x9e |
| if (r0 != 0x9e) {
0x000f3512 bne 0xf3524 | goto label_0;
| }
0x000f3514 ldr r3, [pc, 0x14] | r3 = *(0xf352c);
0x000f3516 ldr r2, [r4, 4] | r2 = *((r4 + 4));
0x000f3518 ldr r1, [r5, r3] | r1 = *((r5 + r3));
0x000f351a ldr r0, [r2, 4] | r0 = *((r2 + 4));
0x000f351c pop.w {r3, r4, r5, lr} |
0x000f3520 b.w 0x53474 | void (*0x53474)() ();
| }
| label_0:
0x000f3524 movs r0, 0 | r0 = 0;
0x000f3526 pop {r3, r4, r5, pc} |
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/patool_extraction/rootfs.img_unblob_extracted/rootfs.img_extract/0-50593792.squashfs_v4_le_extract/usr/lib/libcrypto.so.1.1 @ 0x10d834 */
| #include <stdint.h>
|
; (fcn) sym.PKCS7_to_TS_TST_INFO () | void PKCS7_to_TS_TST_INFO (int16_t arg1) {
| int16_t var_0h_2;
| int16_t var_0h;
| int16_t var_8h;
| int16_t var_ch;
| r0 = arg1;
0x0010d834 ldr r2, [pc, 0xb8] |
0x0010d836 ldr r3, [pc, 0xbc] | r3 = *(0x10d8f6);
0x0010d838 push {r4, r5, lr} |
0x0010d83a mov r5, r0 | r5 = r0;
0x0010d83c add r2, pc | r2 = 0x21b130;
0x0010d83e sub sp, 0x14 |
0x0010d840 ldr r3, [r2, r3] |
0x0010d842 ldr r0, [r0, 0x10] | r0 = *((r0 + 0x10));
0x0010d844 ldr r3, [r3] | r3 = *(0x21b130);
0x0010d846 str r3, [sp, 0xc] | var_ch = r3;
0x0010d848 mov.w r3, 0 | r3 = 0;
0x0010d84c bl 0xe8ad4 | r0 = OBJ_obj2nid ();
0x0010d850 cmp r0, 0x16 |
| if (r0 != 0x16) {
0x0010d852 bne 0x10d8a4 | goto label_5;
| }
0x0010d854 movs r3, 0 | r3 = 0;
0x0010d856 movs r1, 2 | r1 = 2;
0x0010d858 mov r2, r3 | r2 = r3;
0x0010d85a mov r0, r5 | r0 = r5;
0x0010d85c bl 0xf58f8 | r0 = PKCS7_ctrl ();
0x0010d860 mov r4, r0 | r4 = r0;
0x0010d862 cmp r0, 0 |
| if (r0 != 0) {
0x0010d864 bne 0x10d8de | goto label_6;
| }
0x0010d866 ldr r3, [r5, 0x14] | r3 = *((r5 + 0x14));
0x0010d868 ldr r5, [r3, 0x14] | r5 = *((r3 + 0x14));
0x0010d86a ldr r0, [r5, 0x10] | r0 = *((r5 + 0x10));
0x0010d86c bl 0xe8ad4 | r0 = OBJ_obj2nid ();
0x0010d870 cmp r0, 0xcf |
| if (r0 != 0xcf) {
0x0010d872 bne 0x10d8ba | goto label_7;
| }
0x0010d874 ldr r3, [r5, 0x14] | r3 = *((r5 + 0x14));
0x0010d876 ldr r2, [r3] | r2 = *(r3);
0x0010d878 cmp r2, 4 |
| if (r2 != 4) {
0x0010d87a bne 0x10d8d2 | goto label_8;
| }
0x0010d87c ldr r3, [r3, 4] | r3 = *((r3 + 4));
0x0010d87e mov r0, r4 | r0 = r4;
0x0010d880 add r1, sp, 8 | r1 += var_8h;
0x0010d882 ldr r4, [r3, 8] | r4 = *((r3 + 8));
0x0010d884 ldr r2, [r3] | r2 = *(r3);
0x0010d886 str r4, [sp, 8] | var_8h = r4;
0x0010d888 bl 0x10d268 | d2i_TS_TST_INFO ();
| do {
| label_0:
0x0010d88c ldr r2, [pc, 0x68] |
0x0010d88e ldr r3, [pc, 0x64] | r3 = *(0x10d8f6);
0x0010d890 add r2, pc | r2 = 0x21b18c;
0x0010d892 ldr r3, [r2, r3] | r3 = *(0x21b18c);
0x0010d894 ldr r2, [r3] | r2 = *(0x21b18c);
0x0010d896 ldr r3, [sp, 0xc] | r3 = var_ch;
0x0010d898 eors r2, r3 | r2 ^= r3;
0x0010d89a mov.w r3, 0 | r3 = 0;
| if (r2 != r3) {
0x0010d89e bne 0x10d8ea | goto label_9;
| }
0x0010d8a0 add sp, 0x14 |
0x0010d8a2 pop {r4, r5, pc} |
| label_5:
0x0010d8a4 ldr r3, [pc, 0x54] |
0x0010d8a6 movs r4, 0xff | r4 = 0xff;
0x0010d8a8 movs r2, 0x84 | r2 = 0x84;
0x0010d8aa add r3, pc | r3 = 0x21b1aa;
| label_1:
0x0010d8ac movs r0, 0x2f | r0 = 0x2f;
0x0010d8ae movs r1, 0x94 | r1 = 0x94;
0x0010d8b0 str r4, [sp] | *(sp) = r4;
0x0010d8b2 bl 0xcfe08 | ERR_put_error ();
0x0010d8b6 movs r0, 0 | r0 = 0;
0x0010d8b8 b 0x10d88c |
| } while (1);
| label_7:
0x0010d8ba ldr r3, [pc, 0x44] |
0x0010d8bc movw r0, 0x109 | r0 = 0x109;
0x0010d8c0 movs r2, 0x84 | r2 = 0x84;
0x0010d8c2 add r3, pc | r3 = 0x21b1c8;
| do {
0x0010d8c4 str r0, [sp] | *(sp) = r0;
0x0010d8c6 movs r1, 0x94 | r1 = 0x94;
0x0010d8c8 movs r0, 0x2f | r0 = 0x2f;
0x0010d8ca bl 0xcfe08 | ERR_put_error ();
0x0010d8ce mov r0, r4 | r0 = r4;
0x0010d8d0 b 0x10d88c | goto label_0;
| label_8:
0x0010d8d2 ldr r3, [pc, 0x30] |
0x0010d8d4 mov.w r0, 0x10e | r0 = 0x10e;
0x0010d8d8 movs r2, 0x85 | r2 = 0x85;
0x0010d8da add r3, pc | r3 = 0x21b1e4;
0x0010d8dc b 0x10d8c4 |
| } while (1);
| label_6:
0x0010d8de ldr r3, [pc, 0x28] |
0x0010d8e0 movw r4, 0x103 | r4 = 0x103;
0x0010d8e4 movs r2, 0x86 | r2 = 0x86;
0x0010d8e6 add r3, pc | r3 = 0x21b1f4;
0x0010d8e8 b 0x10d8ac | goto label_1;
| label_9:
0x0010d8ea blx 0x442bc | fcn_000442bc ();
0x0010d8ee nop |
0x0010d8f0 strb r0, [r1] | *(r1) = r0;
0x0010d8f2 movs r0, r1 | r0 = r1;
0x0010d8f4 lsls r0, r1, 0x16 | r0 = r1 << 0x16;
0x0010d8f6 movs r0, r0 |
0x0010d8f8 ldr r4, [r6, 0x78] | r4 = *((r6 + 0x78));
0x0010d8fa movs r0, r1 | r0 = r1;
0x0010d8fc strh r2, [r3, 0x2c] | *((r3 + 0x2c)) = r2;
0x0010d8fe movs r5, r0 | r5 = r0;
0x0010d900 strh r2, [r0, 0x2c] | *((r0 + 0x2c)) = r2;
0x0010d902 movs r5, r0 | r5 = r0;
0x0010d904 strh r2, [r5, 0x2a] | *((r5 + 0x2a)) = r2;
0x0010d906 movs r5, r0 | r5 = r0;
0x0010d908 strh r6, [r3, 0x2a] | *((r3 + 0x2a)) = r6;
0x0010d90a movs r5, r0 | r5 = r0;
0x0010d90c push {r4, r5, lr} |
0x0010d90e cmp r0, 1 |
0x0010d910 ldr r5, [r1] | r5 = *(r1);
0x0010d912 it eq |
| if (r0 != 1) {
0x0010d914 moveq r3, 0 | r3 = 0;
| }
0x0010d916 sub sp, 0xc |
0x0010d918 it eq |
| if (r0 != 1) {
0x0010d91a streq r3, [r5, 8] | *((r5 + 8)) = r3;
| }
| if (r0 == 1) {
0x0010d91c beq 0x10d928 | goto label_2;
| }
0x0010d91e cmp r0, 3 |
| if (r0 == 3) {
0x0010d920 beq 0x10d966 | goto label_10;
| }
0x0010d922 cmp r0, 5 |
0x0010d924 beq 0x10d92c |
| while (r0 != 0) {
| label_3:
0x0010d926 movs r0, 1 | r0 = 1;
| label_2:
0x0010d928 add sp, 0xc |
0x0010d92a pop {r4, r5, pc} |
0x0010d92c ldr r3, [r5] | r3 = *(r5);
0x0010d92e ldr r0, [r3] | r0 = *(r3);
0x0010d930 bl 0x4be64 | ASN1_INTEGER_get ();
0x0010d934 ldr r4, [r5, 4] | r4 = *((r5 + 4));
| if (r4 == 0) {
0x0010d936 cbz r4, 0x10d988 | goto label_11;
| }
0x0010d938 cmp r0, 1 |
| if (r0 > 1) {
0x0010d93a bhi 0x10d972 | goto label_12;
| }
0x0010d93c ldr r0, [r5, 8] | r0 = *((r5 + 8));
0x0010d93e bl 0x10d4c4 | TS_TST_INFO_free ();
0x0010d942 ldr r0, [r5, 4] | r0 = *((r5 + 4));
0x0010d944 bl 0x10d834 | r0 = PKCS7_to_TS_TST_INFO ();
0x0010d948 mov r4, r0 | r4 = r0;
0x0010d94a str r0, [r5, 8] | *((r5 + 8)) = r0;
0x0010d94c cmp r0, 0 |
0x0010d94e bne 0x10d926 |
| }
0x0010d950 ldr r3, [pc, 0x44] |
0x0010d952 movs r0, 0x93 | r0 = 0x93;
0x0010d954 movs r2, 0x81 | r2 = 0x81;
0x0010d956 add r3, pc | r3 = 0x21b2f2;
| label_4:
0x0010d958 str r0, [sp] | *(sp) = r0;
0x0010d95a movs r1, 0x96 | r1 = 0x96;
0x0010d95c movs r0, 0x2f | r0 = 0x2f;
0x0010d95e bl 0xcfe08 | ERR_put_error ();
0x0010d962 mov r0, r4 | r0 = r4;
0x0010d964 b 0x10d928 | goto label_2;
| label_10:
0x0010d966 ldr r0, [r5, 8] | r0 = *((r5 + 8));
0x0010d968 bl 0x10d4c4 | TS_TST_INFO_free ();
0x0010d96c movs r0, 1 | r0 = 1;
0x0010d96e add sp, 0xc |
0x0010d970 pop {r4, r5, pc} |
| label_12:
0x0010d972 ldr r3, [pc, 0x28] |
0x0010d974 movs r4, 0x8d | r4 = 0x8d;
0x0010d976 movs r0, 0x2f | r0 = 0x2f;
0x0010d978 movs r2, 0x83 | r2 = 0x83;
0x0010d97a movs r1, 0x96 | r1 = 0x96;
0x0010d97c str r4, [sp] | *(sp) = r4;
0x0010d97e add r3, pc | r3 = 0x21b320;
0x0010d980 bl 0xcfe08 | ERR_put_error ();
0x0010d984 movs r0, 0 | r0 = 0;
0x0010d986 b 0x10d928 | goto label_2;
| label_11:
0x0010d988 cmp r0, 1 |
| if (r0 > 1) {
0x0010d98a bhi 0x10d926 | goto label_3;
| }
0x0010d98c ldr r3, [pc, 0x10] |
0x0010d98e movs r0, 0x98 | r0 = 0x98;
0x0010d990 movs r2, 0x82 | r2 = 0x82;
0x0010d992 add r3, pc | r3 = 0x21b336;
0x0010d994 b 0x10d958 | goto label_4;
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/patool_extraction/rootfs.img_unblob_extracted/rootfs.img_extract/0-50593792.squashfs_v4_le_extract/usr/lib/libcrypto.so.1.1 @ 0x12b7a0 */
| #include <stdint.h>
|
; (fcn) sym.SXNET_get_id_INTEGER () | void SXNET_get_id_INTEGER (int16_t arg1, int16_t arg2) {
| r0 = arg1;
| r1 = arg2;
0x0012b7a0 push {r3, r4, r5, r6, r7, lr} |
0x0012b7a2 mov r6, r0 | r6 = r0;
0x0012b7a4 mov r7, r1 | r7 = r1;
0x0012b7a6 movs r4, 0 | r4 = 0;
0x0012b7a8 b 0x12b7bc |
| while (r4 < r0) {
0x0012b7aa ldr r0, [r6, 4] | r0 = *((r6 + 4));
0x0012b7ac bl 0x10ac0c | OPENSSL_sk_value ();
0x0012b7b0 mov r1, r7 | r1 = r7;
0x0012b7b2 mov r5, r0 | r5 = r0;
0x0012b7b4 ldr r0, [r0] | r0 = *(r0);
0x0012b7b6 bl 0x4ba34 | r0 = ASN1_INTEGER_cmp ();
| if (r0 == 0) {
0x0012b7ba cbz r0, 0x12b7d0 | goto label_0;
| }
0x0012b7bc ldr r0, [r6, 4] | r0 = *((r6 + 4));
0x0012b7be bl 0x10ac00 | r0 = OPENSSL_sk_num ();
0x0012b7c2 cmp r4, r0 |
0x0012b7c4 mov r1, r4 | r1 = r4;
0x0012b7c6 add.w r4, r4, 1 | r4++;
0x0012b7ca blt 0x12b7aa |
| }
0x0012b7cc movs r0, 0 | r0 = 0;
0x0012b7ce pop {r3, r4, r5, r6, r7, pc} |
| label_0:
0x0012b7d0 ldr r0, [r5, 4] | r0 = *((r5 + 4));
0x0012b7d2 pop {r3, r4, r5, r6, r7, pc} |
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/patool_extraction/rootfs.img_unblob_extracted/rootfs.img_extract/0-50593792.squashfs_v4_le_extract/usr/lib/libcrypto.so.1.1 @ 0x11271c */
| #include <stdint.h>
|
| #define BIT_MASK(t,v) ((t)(-((v)!= 0)))&(((t)-1)>>((sizeof(t)*CHAR_BIT)-(v)))
|
; (fcn) sym.UI_set_result_ex () | void UI_set_result_ex (int16_t arg1, int16_t arg2, int16_t arg3, int16_t arg4) {
| int16_t var_0h;
| int32_t var_0h_2;
| int16_t var_ch;
| int16_t var_1ch;
| int16_t var_2ch;
| r0 = arg1;
| r1 = arg2;
| r2 = arg3;
| r3 = arg4;
0x0011271c push.w {r4, r5, r6, r7, r8, sb, sl, lr} |
0x00112720 mov r5, r0 | r5 = r0;
0x00112722 ldr r4, [pc, 0x17c] |
0x00112724 mov r6, r1 | r6 = r1;
0x00112726 sub sp, 0x30 |
0x00112728 mov r7, r2 | r7 = r2;
0x0011272a ldr r1, [r0, 0x10] | r1 = *((r0 + 0x10));
0x0011272c ldr r0, [pc, 0x174] | r0 = *(0x1128a4);
0x0011272e add r4, pc | r4 = 0x224fd4;
0x00112730 bic r1, r1, 1 | r1 = BIT_MASK (r1, 1);
0x00112734 ldr r0, [r4, r0] |
0x00112736 ldr r0, [r0] | r0 = *(0x224fd4);
0x00112738 str r0, [sp, 0x2c] | var_2ch = r0;
0x0011273a mov.w r0, 0 | r0 = 0;
0x0011273e ldr r0, [r6] | r0 = *(r6);
0x00112740 str r1, [r5, 0x10] | *((r5 + 0x10)) = r1;
0x00112742 cmp r0, 2 |
| if (r0 < 2) {
0x00112744 bls 0x112790 | goto label_3;
| }
0x00112746 cmp r0, 3 |
| if (r0 != 3) {
0x00112748 bne 0x1127ac | goto label_4;
| }
0x0011274a ldr r3, [r6, 0xc] | r3 = *((r6 + 0xc));
0x0011274c cmp r3, 0 |
| if (r3 == 0) {
0x0011274e beq 0x112812 | goto label_5;
| }
0x00112750 movs r2, 0 | r2 = 0;
0x00112752 strb r2, [r3] | *(r3) = r2;
0x00112754 ldrb r5, [r7] | r5 = *(r7);
0x00112756 cmp r5, 0 |
| if (r5 == 0) {
0x00112758 beq 0x11282c | goto label_6;
| }
0x0011275a ldr.w sb, [r6, 0x18] | sb = *((r6 + 0x18));
0x0011275e b 0x112776 |
| while (r0 == 0) {
0x00112760 ldr.w r8, [r6, 0x1c] | r8 = *((r6 + 0x1c));
0x00112764 mov r1, r5 | r1 = r5;
0x00112766 mov r0, r8 | r0 = r8;
0x00112768 blx 0x43f2c | r0 = fcn_00043f2c ();
0x0011276c cmp r0, 0 |
| if (r0 != 0) {
0x0011276e bne 0x112806 | goto label_7;
| }
0x00112770 ldrb r5, [r7, 1]! | r5 = *((r7 += 1));
| if (r5 == 0) {
0x00112774 cbz r5, 0x1127ac | goto label_4;
| }
0x00112776 mov r1, r5 | r1 = r5;
0x00112778 mov r0, sb | r0 = sb;
0x0011277a blx 0x43f2c | r0 = fcn_00043f2c ();
0x0011277e mov r4, r0 | r4 = r0;
0x00112780 cmp r0, 0 |
0x00112782 beq 0x112760 |
| }
0x00112784 ldr r3, [r6, 0xc] | r3 = *((r6 + 0xc));
0x00112786 movs r0, 0 | r0 = 0;
0x00112788 ldrb.w r2, [sb] | r2 = *(sb);
0x0011278c strb r2, [r3] | *(r3) = r2;
0x0011278e b 0x112792 | goto label_0;
| if (r0 != 0) {
| label_3:
0x00112790 cbnz r0, 0x1127b0 | goto label_8;
| }
| do {
| label_0:
0x00112792 ldr r2, [pc, 0x114] |
0x00112794 ldr r3, [pc, 0x10c] | r3 = *(0x1128a4);
0x00112796 add r2, pc | r2 = 0x225044;
0x00112798 ldr r3, [r2, r3] | r3 = *(0x225044);
0x0011279a ldr r2, [r3] | r2 = *(0x225044);
0x0011279c ldr r3, [sp, 0x2c] | r3 = var_2ch;
0x0011279e eors r2, r3 | r2 ^= r3;
0x001127a0 mov.w r3, 0 | r3 = 0;
| if (r2 != r3) {
0x001127a4 bne 0x11289a | goto label_9;
| }
0x001127a6 add sp, 0x30 |
0x001127a8 pop.w {r4, r5, r6, r7, r8, sb, sl, pc} |
| label_4:
0x001127ac movs r0, 0 | r0 = 0;
0x001127ae b 0x112792 |
| } while (1);
| label_8:
0x001127b0 ldr r4, [pc, 0xf8] |
0x001127b2 add.w sl, sp, 0xc | sl += var_ch;
0x001127b6 mov r8, r3 | r8 = r3;
0x001127b8 movs r1, 0xd | r1 = 0xd;
0x001127ba ldr r3, [r6, 0x14] | r3 = *((r6 + 0x14));
0x001127bc mov r0, sl | r0 = sl;
0x001127be add r4, pc | r4 = 0x22506e;
0x001127c0 add.w sb, sp, 0x1c | sb += var_1ch;
0x001127c4 mov r2, r4 | r2 = r4;
0x001127c6 bl 0x5d400 | BIO_snprintf ();
0x001127ca ldr r3, [r6, 0x18] | r3 = *((r6 + 0x18));
0x001127cc mov r2, r4 | r2 = r4;
0x001127ce movs r1, 0xd | r1 = 0xd;
0x001127d0 mov r0, sb | r0 = sb;
0x001127d2 bl 0x5d400 | BIO_snprintf ();
0x001127d6 ldr r3, [r6, 0x14] | r3 = *((r6 + 0x14));
0x001127d8 cmp r3, r8 |
| if (r3 > r8) {
0x001127da bgt 0x112830 | goto label_10;
| }
0x001127dc ldr r3, [r6, 0x18] | r3 = *((r6 + 0x18));
0x001127de cmp r3, r8 |
| if (r3 < r8) {
0x001127e0 blt 0x112870 | goto label_11;
| }
0x001127e2 ldr r0, [r6, 0xc] | r0 = *((r6 + 0xc));
0x001127e4 cmp r0, 0 |
| if (r0 == 0) {
0x001127e6 beq 0x112866 | goto label_12;
| }
0x001127e8 mov r2, r8 | r2 = r8;
0x001127ea mov r1, r7 | r1 = r7;
0x001127ec blx 0x44140 | fcn_00044140 ();
0x001127f0 ldr r3, [r6, 0x18] | r3 = *((r6 + 0x18));
0x001127f2 movs r0, 0 | r0 = 0;
0x001127f4 cmp r3, r8 |
0x001127f6 ittt ge |
| if (r3 < r8) {
0x001127f8 ldrge r3, [r6, 0xc] | r3 = *((r6 + 0xc));
| }
| if (r3 < r8) {
0x001127fa movge r2, 0 | r2 = 0;
| }
| if (r3 < r8) {
0x001127fc strbge r2, [r3, r8] | *((r3 + r8)) = r2;
| }
0x00112800 str.w r8, [r6, 0x10] | __asm ("str.w r8, [r6, 0x10]");
0x00112804 b 0x112792 | goto label_0;
| label_7:
0x00112806 ldr r3, [r6, 0xc] | r3 = *((r6 + 0xc));
0x00112808 mov r0, r4 | r0 = r4;
0x0011280a ldrb.w r2, [r8] | r2 = *(r8);
0x0011280e strb r2, [r3] | *(r3) = r2;
0x00112810 b 0x112792 | goto label_0;
| label_5:
0x00112812 ldr r3, [pc, 0x9c] |
0x00112814 movw r4, 0x3a6 | r4 = 0x3a6;
0x00112818 add r3, pc | r3 = 0x2250ce;
| label_1:
0x0011281a movs r2, 0x69 | r2 = 0x69;
0x0011281c movs r1, 0x78 | r1 = 0x78;
0x0011281e movs r0, 0x28 | r0 = 0x28;
0x00112820 str r4, [sp] | *(sp) = r4;
0x00112822 bl 0xcfe08 | ERR_put_error ();
| do {
0x00112826 mov.w r0, -1 | r0 = -1;
0x0011282a b 0x112792 | goto label_0;
| label_6:
0x0011282c mov r0, r5 | r0 = r5;
0x0011282e b 0x112792 | goto label_0;
| label_10:
0x00112830 ldr r2, [r5, 0x10] | r2 = *((r5 + 0x10));
0x00112832 movw r3, 0x389 | r3 = 0x389;
0x00112836 str r3, [sp] | *(sp) = r3;
0x00112838 movs r1, 0x78 | r1 = 0x78;
0x0011283a ldr r3, [pc, 0x78] |
0x0011283c movs r0, 0x28 | r0 = 0x28;
0x0011283e orr r2, r2, 1 | r2 |= 1;
0x00112842 str r2, [r5, 0x10] | *((r5 + 0x10)) = r2;
0x00112844 movs r2, 0x65 | r2 = 0x65;
0x00112846 add r3, pc | r3 = 0x225100;
0x00112848 bl 0xcfe08 | ERR_put_error ();
0x0011284c ldr r0, [pc, 0x68] |
0x0011284e ldr r3, [pc, 0x6c] |
0x00112850 ldr r1, [pc, 0x6c] |
0x00112852 add r0, pc | r0 = 0x22510e;
0x00112854 add r3, pc | r3 = 0x225116;
0x00112856 add r1, pc | r1 = 0x22511a;
| label_2:
0x00112858 strd sb, r0, [sp] | __asm ("strd sb, r0, [sp]");
0x0011285c mov r2, sl | r2 = sl;
0x0011285e movs r0, 5 | r0 = 5;
0x00112860 bl 0xd0420 | ERR_add_error_data ();
0x00112864 b 0x112826 |
| } while (1);
| label_12:
0x00112866 ldr r3, [pc, 0x5c] |
0x00112868 mov.w r4, 0x398 | r4 = 0x398;
0x0011286c add r3, pc | r3 = 0x225136;
0x0011286e b 0x11281a | goto label_1;
| label_11:
0x00112870 ldr r2, [r5, 0x10] | r2 = *((r5 + 0x10));
0x00112872 mov.w r3, 0x390 | r3 = 0x390;
0x00112876 str r3, [sp] | *(sp) = r3;
0x00112878 movs r1, 0x78 | r1 = 0x78;
0x0011287a ldr r3, [pc, 0x4c] |
0x0011287c movs r0, 0x28 | r0 = 0x28;
0x0011287e orr r2, r2, 1 | r2 |= 1;
0x00112882 str r2, [r5, 0x10] | *((r5 + 0x10)) = r2;
0x00112884 movs r2, 0x64 | r2 = 0x64;
0x00112886 add r3, pc | r3 = 0x225154;
0x00112888 bl 0xcfe08 | ERR_put_error ();
0x0011288c ldr r0, [pc, 0x3c] |
0x0011288e ldr r3, [pc, 0x40] |
0x00112890 ldr r1, [pc, 0x40] |
0x00112892 add r0, pc | r0 = 0x225162;
0x00112894 add r3, pc | r3 = 0x22516a;
0x00112896 add r1, pc | r1 = 0x22516e;
0x00112898 b 0x112858 | goto label_2;
| label_9:
0x0011289a blx 0x442bc | fcn_000442bc ();
0x0011289e nop |
0x001128a0 movs r1, 0x16 | r1 = 0x16;
0x001128a2 movs r0, r1 | r0 = r1;
0x001128a4 lsls r0, r1, 0x16 | r0 = r1 << 0x16;
0x001128a6 movs r0, r0 |
0x001128a8 movs r0, 0xae | r0 = 0xae;
0x001128aa movs r0, r1 | r0 = r1;
0x001128ac sub sp, 0x138 |
0x001128ae movs r5, r0 | r5 = r0;
0x001128b0 ldr r2, [pc, 0x290] | r2 = *(0x112b44);
0x001128b2 movs r5, r0 | r5 = r0;
0x001128b4 ldr r2, [pc, 0x1d8] | r2 = *(0x112a90);
0x001128b6 movs r5, r0 | r5 = r0;
0x001128b8 invalid |
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/patool_extraction/rootfs.img_unblob_extracted/rootfs.img_extract/0-50593792.squashfs_v4_le_extract/usr/lib/libcrypto.so.1.1 @ 0x125178 */
| #include <stdint.h>
|
; (fcn) sym.X509v3_asid_canonize () | uint32_t X509v3_asid_canonize (uint32_t arg1) {
| int16_t var_0h;
| r0 = arg1;
0x00125178 eorsle r2, r4, r0, lsl 16 | __asm ("eorsle r2, r4, r0, lsl 16");
0x0012517c push {r4, r5, lr} |
0x0012517e mov r4, r0 | r4 = r0;
0x00125180 ldr r5, [r0] | r5 = *(r0);
0x00125182 sub sp, 0xc |
| if (r5 == 0) {
0x00125184 cbz r5, 0x1251bc | goto label_2;
| }
0x00125186 ldr r3, [r5] | r3 = *(r5);
| if (r3 == 0) {
0x00125188 cbz r3, 0x1251bc | goto label_2;
| }
0x0012518a cmp r3, 1 |
0x0012518c beq 0x1251a8 |
| while (r0 == 0) {
| label_1:
0x0012518e ldr r3, [pc, 0x5c] |
0x00125190 mov.w r4, 0x178 | r4 = 0x178;
0x00125194 movs r0, 0x22 | r0 = 0x22;
0x00125196 movs r2, 0x74 | r2 = 0x74;
0x00125198 movs r1, 0xa1 | r1 = 0xa1;
0x0012519a str r4, [sp] | *(sp) = r4;
0x0012519c add r3, pc | r3 = 0x24a38e;
0x0012519e bl 0xcfe08 | ERR_put_error ();
0x001251a2 movs r0, 0 | r0 = 0;
| label_0:
0x001251a4 add sp, 0xc |
0x001251a6 pop {r4, r5, pc} |
0x001251a8 ldr r0, [r5, 4] | r0 = *((r5 + 4));
0x001251aa bl 0x10ac00 | r0 = OPENSSL_sk_num ();
0x001251ae cmp r0, 0 |
0x001251b0 beq 0x12518e |
| }
0x001251b2 mov r0, r5 | r0 = r5;
0x001251b4 bl 0x124a18 | r0 = fcn_00124a18 (r0, r1, r2);
0x001251b8 cmp r0, 0 |
| if (r0 == 0) {
0x001251ba beq 0x1251a4 | goto label_0;
| }
| label_2:
0x001251bc ldr r4, [r4, 4] | r4 = *((r4 + 4));
| if (r4 == 0) {
0x001251be cbz r4, 0x1251e0 | goto label_3;
| }
0x001251c0 ldr r3, [r4] | r3 = *(r4);
| if (r3 == 0) {
0x001251c2 cbz r3, 0x1251e0 | goto label_3;
| }
0x001251c4 cmp r3, 1 |
| if (r3 != 1) {
0x001251c6 bne 0x12518e | goto label_1;
| }
0x001251c8 ldr r0, [r4, 4] | r0 = *((r4 + 4));
0x001251ca bl 0x10ac00 | r0 = OPENSSL_sk_num ();
0x001251ce cmp r0, 0 |
| if (r0 == 0) {
0x001251d0 beq 0x12518e | goto label_1;
| }
0x001251d2 mov r0, r4 | r0 = r4;
0x001251d4 bl 0x124a18 | fcn_00124a18 (r0, r1, r2);
0x001251d8 subs r0, 0 |
0x001251da it ne |
| if (r0 == 0) {
0x001251dc movne r0, 1 | r0 = 1;
| }
0x001251de b 0x1251a4 | goto label_0;
| label_3:
0x001251e0 movs r0, 1 | r0 = 1;
0x001251e2 add sp, 0xc |
0x001251e4 pop {r4, r5, pc} |
0x001251e6 movs r0, 1 | r0 = 1;
0x001251e8 bx lr | return r0;
| }
[*] Function system used 1 times libcrypto.so.1.1
