[*] Binary protection state of libdbus-1.so.3.19.13
Full RELRO Canary found NX enabled DSO No RPATH No RUNPATH No Symbols
[*] Function mmap tear down of libdbus-1.so.3.19.13
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/patool_extraction/rootfs.img_unblob_extracted/rootfs.img_extract/0-50593792.squashfs_v4_le_extract/usr/lib/libdbus-1.so.3.19.13 @ 0x1dd74 */
| #include <stdint.h>
|
| #define BIT_MASK(t,v) ((t)(-((v)!= 0)))&(((t)-1)>>((sizeof(t)*CHAR_BIT)-(v)))
|
; (fcn) fcn.0001dd74 () | void fcn_0001dd74 (int16_t arg_38h, int16_t arg1, int16_t arg2, int16_t arg3, int16_t arg4) {
| int32_t var_0h;
| int32_t var_0h_2;
| int16_t var_ch;
| r0 = arg1;
| r1 = arg2;
| r2 = arg3;
| r3 = arg4;
0x0001dd74 svcmi 0xf0e92d | __asm ("svcmi 0xf0e92d");
0x0001dd78 mov r6, r0 | r6 = r0;
0x0001dd7a sub sp, 0x14 |
0x0001dd7c movs r0, 0x70 | r0 = 0x70;
0x0001dd7e mov r5, r3 | r5 = r3;
0x0001dd80 mov r7, r1 | r7 = r1;
0x0001dd82 mov sl, r2 | sl = r2;
0x0001dd84 blx 0xa2e0 | fcn_0000a2e0 ();
0x0001dd88 ldr r3, [pc, 0x1a0] |
0x0001dd8a mov r4, r0 | r4 = r0;
0x0001dd8c add r3, pc | r3 = 0x3bcbc;
0x0001dd8e str r3, [sp, 0xc] | var_ch = r3;
0x0001dd90 cmp r0, 0 |
| if (r0 == 0) {
0x0001dd92 beq 0x1de2a | goto label_2;
| }
0x0001dd94 lsl.w sb, r7, 2 | sb = r7 << 2;
0x0001dd98 str r5, [r0, 0x6c] | *((r0 + 0x6c)) = r5;
0x0001dd9a mov r0, sb | r0 = sb;
0x0001dd9c blx 0x9e18 | fcn_00009e18 ();
0x0001dda0 str r0, [r4, 0x60] | *((r4 + 0x60)) = r0;
0x0001dda2 cmp r0, 0 |
| if (r0 == 0) {
0x0001dda4 beq 0x1de2a | goto label_2;
| }
0x0001dda6 mov r0, sb | r0 = sb;
0x0001dda8 blx 0xa2e0 | fcn_0000a2e0 ();
0x0001ddac str r0, [r4, 0x64] | *((r4 + 0x64)) = r0;
0x0001ddae cmp r0, 0 |
| if (r0 == 0) {
0x0001ddb0 beq 0x1de24 | goto label_3;
| }
0x0001ddb2 cmp r7, 0 |
| if (r7 <= 0) {
0x0001ddb4 ble.w 0x1df14 | goto label_4;
| }
0x0001ddb8 ldr.w fp, [pc, 0x174] | fp = *(0x0001df30);
0x0001ddbc movs r5, 0 | r5 = 0;
0x0001ddbe subs r6, 4 | r6 -= 4;
0x0001ddc0 mov r8, r5 | r8 = r5;
0x0001ddc2 add fp, pc |
0x0001ddc4 b 0x1dde0 |
| while (r0 != 0) {
0x0001ddc6 ldrd r2, r3, [r4, 0x5c] | __asm ("ldrd r2, r3, [r4, 0x5c]");
0x0001ddca ldr r1, [r6] | r1 = *(r6);
0x0001ddcc adds r2, 1 | r2++;
0x0001ddce str r2, [r4, 0x5c] | *((r4 + 0x5c)) = r2;
0x0001ddd0 str.w r1, [r3, r5, lsl 2] | __asm ("str.w r1, [r3, r5, lsl 2]");
0x0001ddd4 ldr r3, [r4, 0x64] | r3 = *((r4 + 0x64));
0x0001ddd6 str.w r0, [r3, r5, lsl 2] | __asm ("str.w r0, [r3, r5, lsl 2]");
0x0001ddd8 movs r5, r4 | r5 = r4;
0x0001ddda adds r5, 1 | r5++;
0x0001dddc cmp r7, r5 |
| if (r7 == r5) {
0x0001ddde beq 0x1de62 | goto label_5;
| }
0x0001dde0 movs r2, 1 | r2 = 1;
0x0001dde2 ldr r0, [r6, 4]! | r0 = *((r6 += 4));
0x0001dde6 mov r3, fp | r3 = fp;
0x0001dde8 mov r1, r2 | r1 = r2;
0x0001ddea strd r4, r8, [sp] | __asm ("strd r4, r8, [sp]");
0x0001ddee blx 0xa41c | r0 = fcn_0000a41c ();
0x0001ddf2 cmp r0, 0 |
0x0001ddf4 bne 0x1ddc6 |
| }
| label_0:
0x0001ddf6 ldr r3, [r4, 0x64] | r3 = *((r4 + 0x64));
0x0001ddf8 movs r5, 0 | r5 = 0;
0x0001ddfa mov r6, r5 | r6 = r5;
| do {
0x0001ddfc ldr.w r0, [r3, r5, lsl 2] | offset_0 = r5 << 2;
| r0 = *((r3 + offset_0));
| if (r0 != 0) {
0x0001de00 cbz r0, 0x1de18 |
0x0001de02 blx 0xa6c0 | fcn_0000a6c0 ();
0x0001de06 ldr r3, [r4, 0x64] | r3 = *((r4 + 0x64));
0x0001de08 ldr.w r0, [r3, r5, lsl 2] | offset_1 = r5 << 2;
| r0 = *((r3 + offset_1));
0x0001de0c blx 0xaa0c | fcn_0000aa0c ();
0x0001de10 ldr r3, [r4, 0x64] | r3 = *((r4 + 0x64));
0x0001de12 str.w r6, [r3, r5, lsl 2] | __asm ("str.w r6, [r3, r5, lsl 2]");
0x0001de16 ldr r3, [r4, 0x64] | r3 = *((r4 + 0x64));
| }
0x0001de18 adds r5, 1 | r5++;
0x0001de1a cmp r7, r5 |
0x0001de1c bgt 0x1ddfc |
| } while (r7 > r5);
| label_1:
0x0001de1e mov r0, r3 | r0 = r3;
0x0001de20 blx 0x9a14 | fcn_00009a14 ();
| label_3:
0x0001de24 ldr r0, [r4, 0x60] | r0 = *((r4 + 0x60));
0x0001de26 blx 0x9a14 | fcn_00009a14 ();
| label_2:
0x0001de2a mov r0, r4 | r0 = r4;
0x0001de2c blx 0x9a14 | fcn_00009a14 ();
0x0001de30 ldr r3, [sp, 0x38] | r3 = *(arg_38h);
| if (r3 != 0) {
0x0001de32 cbz r3, 0x1de3e |
0x0001de34 ldr r0, [sp, 0x38] | r0 = *(arg_38h);
0x0001de36 blx 0xaac8 | r0 = fcn_0000aac8 ();
0x0001de3a mov r4, r0 | r4 = r0;
| if (r0 == 0) {
0x0001de3c cbz r0, 0x1de48 | goto label_6;
| }
| }
0x0001de3e movs r4, 0 | r4 = 0;
0x0001de40 mov r0, r4 | r0 = r4;
0x0001de42 add sp, 0x14 |
0x0001de44 pop.w {r4, r5, r6, r7, r8, sb, sl, fp, pc} |
| label_6:
0x0001de48 ldr r2, [sp, 0xc] | r2 = var_ch;
0x0001de4a ldr r3, [pc, 0xe8] | r3 = *(0x1df36);
0x0001de4c ldr r1, [pc, 0xe8] |
0x0001de4e ldr r0, [sp, 0x38] | r0 = *(arg_38h);
0x0001de50 ldr r3, [r2, r3] | r3 = *((r2 + r3));
0x0001de52 add r1, pc | r1 = 0x3bd8e;
0x0001de54 ldr r2, [r3] | r2 = *(0x1df36);
0x0001de56 blx 0xa0b0 | fcn_0000a0b0 ();
0x0001de5a mov r0, r4 | r0 = r4;
0x0001de5c add sp, 0x14 |
0x0001de5e pop.w {r4, r5, r6, r7, r8, sb, sl, fp, pc} |
| label_5:
0x0001de62 ldr r1, [pc, 0xd8] |
0x0001de64 mov r2, sl | r2 = sl;
0x0001de66 ldr r3, [sp, 0x38] | r3 = *(arg_38h);
0x0001de68 mov r0, r4 | r0 = r4;
0x0001de6a add r1, pc | r1 = 0x3bdac;
0x0001de6c bl 0x1cef8 | r0 = fcn_0001cef8 (r0, r1, r2, r3);
0x0001de70 cmp r0, 0 |
| if (r0 == 0) {
0x0001de72 beq 0x1ddf6 | goto label_0;
| }
0x0001de74 ldr r0, [r4, 8] | r0 = *((r4 + 8));
0x0001de76 movs r5, 0 | r5 = 0;
0x0001de78 blx 0xa738 | fcn_0000a738 ();
0x0001de7c ldrb.w r3, [r4, 0x58] | r3 = *((r4 + 0x58));
0x0001de80 orr r3, r3, 2 | r3 |= 2;
0x0001de84 strb.w r3, [r4, 0x58] | *((r4 + 0x58)) = r3;
0x0001de88 b 0x1de90 |
| while (r0 != 0) {
0x0001de8a adds r5, 1 | r5++;
0x0001de8c cmp r7, r5 |
| if (r7 == r5) {
0x0001de8e beq 0x1defa | goto label_7;
| }
0x0001de90 ldr r3, [r4, 0x64] | r3 = *((r4 + 0x64));
0x0001de92 mov r0, r4 | r0 = r4;
0x0001de94 ldr.w r1, [r3, r5, lsl 2] | offset_2 = r5 << 2;
| r1 = *((r3 + offset_2));
0x0001de98 bl 0x1d10c | r0 = fcn_0001d10c (r0, r1);
0x0001de9c cmp r0, 0 |
0x0001de9e bne 0x1de8a |
| }
0x0001dea0 mov.w r2, -1 | r2 = -1;
| do {
0x0001dea4 ldr r3, [r4, 0x60] | r3 = *((r4 + 0x60));
0x0001dea6 str r2, [r3, r0] | *((r3 + r0)) = r2;
0x0001dea8 adds r0, 4 | r0 += 4;
0x0001deaa cmp sb, r0 |
0x0001deac bne 0x1dea4 |
| } while (sb != r0);
0x0001deae cmp r7, r5 |
| if (r7 <= r5) {
0x0001deb0 ble 0x1ded4 | goto label_8;
| }
0x0001deb2 movs r6, 0 | r6 = 0;
| do {
0x0001deb4 ldr r3, [r4, 0x64] | r3 = *((r4 + 0x64));
0x0001deb6 ldr.w r0, [r3, r5, lsl 2] | offset_3 = r5 << 2;
| r0 = *((r3 + offset_3));
0x0001deba blx 0xa6c0 | fcn_0000a6c0 ();
0x0001debe ldr r3, [r4, 0x64] | r3 = *((r4 + 0x64));
0x0001dec0 ldr.w r0, [r3, r5, lsl 2] | offset_4 = r5 << 2;
| r0 = *((r3 + offset_4));
0x0001dec4 blx 0xaa0c | fcn_0000aa0c ();
0x0001dec8 ldr r3, [r4, 0x64] | r3 = *((r4 + 0x64));
0x0001deca str.w r6, [r3, r5, lsl 2] | __asm ("str.w r6, [r3, r5, lsl 2]");
0x0001dece adds r5, 1 | r5++;
0x0001ded0 cmp r7, r5 |
0x0001ded2 bne 0x1deb4 |
| } while (r7 != r5);
| label_8:
0x0001ded4 mov r0, r4 | r0 = r4;
0x0001ded6 bl 0x1d52c | fcn_0001d52c (r0);
0x0001deda ldrb.w r3, [r4, 0x58] | r3 = *((r4 + 0x58));
0x0001dede ldr r0, [r4, 8] | r0 = *((r4 + 8));
0x0001dee0 bfc r3, 1, 1 | value_5 = BIT_MASK (1, );
| value_5 = ~value_5;
| r3 &= value_5;
0x0001dee4 strb.w r3, [r4, 0x58] | *((r4 + 0x58)) = r3;
0x0001dee8 blx 0xada0 | fcn_0000ada0 ();
0x0001deea vmax.s16 d20, d10, d16 | __asm ("vmax.s16 d20, d10, d16");
0x0001deee bl 0x1d768 | fcn_0001d768 (r0);
0x0001def2 b 0x1ddf6 | goto label_0;
| do {
0x0001def4 ldr r0, [r4, 8] | r0 = *((r4 + 8));
0x0001def6 blx 0xa738 | fcn_0000a738 ();
| label_7:
0x0001defa ldrb.w r3, [r4, 0x58] | r3 = *((r4 + 0x58));
0x0001defe ldr r0, [r4, 8] | r0 = *((r4 + 8));
0x0001df00 bfc r3, 1, 1 | value_6 = BIT_MASK (1, );
| value_6 = ~value_6;
| r3 &= value_6;
0x0001df04 strb.w r3, [r4, 0x58] | *((r4 + 0x58)) = r3;
0x0001df08 blx 0xada0 | fcn_0000ada0 ();
0x0001df0c mov r0, r4 | r0 = r4;
0x0001df0e add sp, 0x14 |
0x0001df10 pop.w {r4, r5, r6, r7, r8, sb, sl, fp, pc} |
| label_4:
0x0001df14 ldr r1, [pc, 0x28] |
0x0001df16 mov r2, sl | r2 = sl;
0x0001df18 ldr r3, [sp, 0x38] | r3 = *(arg_38h);
0x0001df1a mov r0, r4 | r0 = r4;
0x0001df1c add r1, pc | r1 = 0x3be60;
0x0001df1e bl 0x1cef8 | r0 = fcn_0001cef8 (r0, r1, r2, r3);
0x0001df22 cmp r0, 0 |
0x0001df24 bne 0x1def4 |
| } while (r0 != 0);
0x0001df26 ldr r3, [r4, 0x64] | r3 = *((r4 + 0x64));
0x0001df28 b 0x1de1e | goto label_1;
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/patool_extraction/rootfs.img_unblob_extracted/rootfs.img_extract/0-50593792.squashfs_v4_le_extract/usr/lib/libdbus-1.so.3.19.13 @ 0x1e908 */
| #include <stdint.h>
|
| uint32_t rotate_right32 (uint32_t value, uint32_t count) {
| const uint32_t mask = (CHAR_BIT * sizeof (value)) - 1;
| count &= mask;
| return (value >> count) | (value << (-count & mask));
| }
|
; (fcn) fcn.0001e908 () | void fcn_0001e908 (int16_t arg1, int16_t arg2) {
| int16_t var_0h;
| int16_t var_4h;
| int16_t var_8h;
| int16_t var_ch;
| int16_t var_10h;
| int16_t var_14h;
| int16_t var_18h;
| int16_t var_1ch;
| int16_t var_20h;
| int16_t var_24h;
| int16_t var_28h;
| int16_t var_2ch;
| int16_t var_30h;
| int16_t var_34h;
| int16_t var_38h;
| int16_t var_3ch;
| int16_t var_40h;
| int16_t var_44h;
| int16_t var_48h;
| int16_t var_4ch;
| int16_t var_50h;
| int16_t var_54h;
| int16_t var_5ch;
| int16_t var_60h;
| int16_t var_64h;
| int16_t var_68h;
| int16_t var_6ch;
| int16_t var_70h;
| int16_t var_74h;
| int16_t var_78h;
| int16_t var_7ch;
| int16_t var_80h;
| int16_t var_84h;
| int16_t var_88h;
| int16_t var_8ch;
| int16_t var_90h;
| int16_t var_94h;
| int16_t var_98h;
| int16_t var_9ch;
| r0 = arg1;
| r1 = arg2;
0x0001e908 push.w {r4, r5, r6, r7, r8, sb, sl, fp, lr} |
0x0001e90c sub sp, 0xa4 |
0x0001e90e ldr r3, [r0] | r3 = *(r0);
0x0001e910 mov r4, r1 | r4 = r1;
0x0001e912 add r6, sp, 0x5c | r6 += var_5ch;
0x0001e914 add.w r7, r1, 0x40 | r7 = r1 + 0x40;
0x0001e916 lsls r0, r0, 0x1d | r0 <<= 0x1d;
0x0001e918 ldr r2, [pc, 0x24] |
0x0001e91a str r3, [sp, 0x44] | var_44h = r3;
0x0001e91c ldr r3, [r0, 4] | r3 = *((r0 + 4));
0x0001e91e add r2, pc | r2 = 0x3d262;
0x0001e920 str r0, [sp, 0x54] | var_54h = r0;
0x0001e922 str r3, [sp, 0x34] | var_34h = r3;
0x0001e924 ldr r3, [r0, 8] | r3 = *((r0 + 8));
0x0001e926 str r3, [sp, 0x48] | var_48h = r3;
0x0001e928 ldr r3, [pc, 0x18] | r3 = *(0x1e944);
0x0001e92a ldr r3, [r2, r3] |
0x0001e92c ldr r2, [r0, 0xc] | r2 = *((r0 + 0xc));
0x0001e92e ldr r3, [r3] | r3 = *(0x3d262);
0x0001e930 str r3, [sp, 0x9c] | var_9ch = r3;
0x0001e932 mov.w r3, 0 | r3 = 0;
0x0001e936 ldr r3, [r0, 0x10] | r3 = *((r0 + 0x10));
0x0001e938 str r2, [sp, 0x38] | var_38h = r2;
0x0001e93a str r3, [sp, 0x4c] | var_4ch = r3;
0x0001e93c b 0x1e948 |
| while (r4 != r7) {
0x0001e948 ldr r0, [r4] | r0 = *(r4);
0x0001e94a adds r4, 0x10 | r4 += 0x10;
0x0001e94c ldr r1, [r4, -0xc] | r1 = *((r4 - 0xc));
0x0001e94e adds r4, r1, 0 | r4 = r1 + 0;
0x0001e950 mov r5, r6 | r5 = r6;
0x0001e952 ldr r2, [r4, -0x8] | r2 = *((r4 - 0x8));
0x0001e956 ldr r3, [r4, -0x4] | r3 = *((r4 - 0x4));
0x0001e95a cmp r4, r7 |
0x0001e95c stm r5!, {r0, r1, r2, r3} | *(r5!) = r0;
| *((r5! + 4)) = r1;
| *((r5! + 8)) = r2;
| *((r5! + 12)) = r3;
0x0001e95e mov r6, r5 | r6 = r5;
0x0001e960 bne 0x1e948 |
| }
0x0001e962 movw r4, 0x7999 |
0x0001e966 ldr r2, [sp, 0x5c] | r2 = var_5ch;
0x0001e968 movt r4, 0x5a82 | r4 = 0x5a827999;
0x0001e96c ldr r3, [sp, 0x48] | r3 = var_48h;
0x0001e96e ldr r5, [sp, 0x34] | r5 = var_34h;
0x0001e970 ldr r7, [sp, 0x4c] | r7 = var_4ch;
0x0001e972 ldr r6, [sp, 0x44] | r6 = var_44h;
0x0001e974 str r4, [sp] | *(sp) = r4;
0x0001e976 adds r4, r2, r4 | r4 = r2 + r4;
0x0001e978 add r4, r7 | r4 += r7;
0x0001e97a ldr r7, [sp, 0x38] | r7 = var_38h;
0x0001e97c eor.w r0, r3, r5, ror 2 | r0 = r3 ^ (r5 >>> 2);
0x0001e980 ldr r1, [sp, 0x60] | r1 = var_60h;
0x0001e982 ror.w sb, r6, 2 | sb = rotate_right32 (r6, 2);
0x0001e986 add.w r4, r4, r6, ror 27 | r4 += (r6 >>> 27);
0x0001e98a ldr.w lr, [sp, 0x6c] | lr = var_6ch;
0x0001e98e ands r0, r6 | r0 &= r6;
0x0001e990 eor.w r6, r3, r7 | r6 = r3 ^ r7;
0x0001e994 ands r6, r5 | r6 &= r5;
0x0001e996 mov r7, r5 | r7 = r5;
0x0001e998 ldr r5, [sp, 0x38] | r5 = var_38h;
0x0001e99a eor.w ip, sb, r7, ror 2 |
0x0001e99e eors r0, r3 | r0 ^= r3;
0x0001e9a0 eors r6, r5 | r6 ^= r5;
0x0001e9a2 add r6, r4 | r6 += r4;
0x0001e9a4 ldr r4, [sp] | r4 = *(sp);
0x0001e9a6 and.w ip, ip, r6 |
0x0001e9aa eor.w ip, ip, r7, ror 2 |
0x0001e9ae adds r4, r1, r4 | r4 = r1 + r4;
0x0001e9b0 add r4, r5 | r4 += r5;
0x0001e9b2 ldr r5, [sp, 0x64] | r5 = var_64h;
0x0001e9b4 add r0, r4 | r0 += r4;
0x0001e9b6 ldr r4, [sp, 0x68] | r4 = var_68h;
0x0001e9b8 add.w r0, r0, r6, ror 27 | r0 += (r6 >>> 27);
0x0001e9bc eors r2, r5 | r2 ^= r5;
0x0001e9be str r2, [sp, 4] | var_4h = r2;
0x0001e9c0 eor.w r8, r1, r4 | r8 = r1 ^ r4;
0x0001e9c4 ldr r2, [sp] | r2 = *(sp);
0x0001e9c6 eor.w r1, sb, r6, ror 2 | r1 = sb ^ (r6 >>> 2);
0x0001e9ca eor.w sl, r5, lr | sl = r5 ^ lr;
0x0001e9ce ands r1, r0 | r1 &= r0;
0x0001e9d0 adds r7, r5, r2 | r7 = r5 + r2;
0x0001e9d2 eor.w r1, r1, sb | r1 ^= sb;
0x0001e9d6 add r7, r3 | r7 += r3;
0x0001e9d8 ldr r3, [sp, 0x34] | r3 = var_34h;
0x0001e9da add ip, r7 |
0x0001e9dc adds r7, r4, r2 | r7 = r4 + r2;
0x0001e9de add.w ip, ip, r0, ror 27 |
0x0001e9e2 ror.w r0, r0, 2 | r0 = rotate_right32 (r0, 2);
0x0001e9e6 add.w r7, r7, r3, ror 2 | r7 += (r3 >>> 2);
0x0001e9ea eor.w r5, r0, r6, ror 2 | r5 = r0 ^ (r6 >>> 2);
0x0001e9ee add r1, r7 | r1 += r7;
0x0001e9f0 ldr r7, [sp, 0x70] | r7 = var_70h;
0x0001e9f2 and.w r5, r5, ip | r5 &= ip;
0x0001e9f6 add.w r1, r1, ip, ror 27 | r1 += (ip >>> 27);
0x0001e9fa mov r3, sl | r3 = sl;
0x0001e9fc eor.w r5, r5, r6, ror 2 | r5 ^= (r6 >>> 2);
0x0001ea00 eor.w sl, r4, r7 | sl = r4 ^ r7;
0x0001ea04 eor.w r4, r0, ip, ror 2 | r4 = r0 ^ (ip >>> 2);
0x0001ea08 add.w fp, lr, r2 |
0x0001ea0c add fp, sb |
0x0001ea0e add.w sb, r7, r2 | sb = r7 + r2;
0x0001ea12 add.w sb, sb, r6, ror 2 | sb += (r6 >>> 2);
0x0001ea16 ands r4, r1 | r4 &= r1;
0x0001ea18 add r5, fp | r5 += fp;
0x0001ea1a ldr.w fp, [sp, 0x74] | fp = var_74h;
0x0001ea1e add.w r5, r5, r1, ror 27 | r5 += (r1 >>> 27);
0x0001ea22 eors r4, r0 | r4 ^= r0;
0x0001ea24 ror.w r1, r1, 2 | r1 = rotate_right32 (r1, 2);
0x0001ea28 add r4, sb | r4 += sb;
0x0001ea2a ldr.w sb, [sp, 0x78] | sb = var_78h;
0x0001ea2e eor.w lr, lr, fp | lr ^= fp;
0x0001ea32 eor.w r6, r1, ip, ror 2 | r6 = r1 ^ (ip >>> 2);
0x0001ea36 str.w lr, [sp, 8] | __asm ("str.w lr, [var_8h]");
0x0001ea3a add.w r4, r4, r5, ror 27 | r4 += (r5 >>> 27);
0x0001ea3e eor.w lr, r7, sb | lr = r7 ^ sb;
0x0001ea42 eor.w r7, r1, r5, ror 2 | r7 = r1 ^ (r5 >>> 2);
0x0001ea46 ands r6, r5 | r6 &= r5;
0x0001ea48 str.w lr, [sp, 0xc] | __asm ("str.w lr, [var_ch]");
0x0001ea4a b 0x1ea66 | goto label_0;
0x0001ea4c eor.w r6, r6, ip, ror 2 | r6 ^= (ip >>> 2);
0x0001ea50 add.w lr, fp, r2 | lr = fp + r2;
0x0001ea52 lsrs r2, r0, 0x18 | r2 = r0 >> 0x18;
0x0001ea54 add lr, r0 | lr += r0;
0x0001ea56 add r6, lr | r6 += lr;
0x0001ea58 add.w r0, sb, r2 | r0 = sb + r2;
0x0001ea5c ldr.w lr, [sp, 0x7c] | lr = var_7ch;
0x0001ea60 add.w r0, r0, ip, ror 2 | r0 += (ip >>> 2);
0x0001ea64 ldr r2, [sp, 4] | r2 = var_4h;
| label_0:
0x0001ea66 ands r7, r4 | r7 &= r4;
0x0001ea68 eors r7, r1 | r7 ^= r1;
0x0001ea6a add.w r6, r6, r4, ror 27 | r6 += (r4 >>> 27);
0x0001ea6e add r7, r0 | r7 += r0;
0x0001ea70 ror.w r4, r4, 2 | r4 = rotate_right32 (r4, 2);
0x0001ea74 eor.w r0, r2, lr | r0 = r2 ^ lr;
0x0001ea78 ldr r2, [sp] | r2 = *(sp);
0x0001ea7a str r0, [sp, 4] | var_4h = r0;
0x0001ea7c eor.w r0, fp, lr | r0 = fp ^ lr;
0x0001ea80 str r0, [sp, 0x1c] | var_1ch = r0;
0x0001ea82 eor.w ip, r4, r5, ror 2 |
0x0001ea86 ldr r0, [sp, 0x80] | r0 = var_80h;
0x0001ea88 add.w r7, r7, r6, ror 27 | r7 += (r6 >>> 27);
0x0001ea8c and.w ip, ip, r6 |
0x0001ea90 eor.w ip, ip, r5, ror 2 |
0x0001ea94 eor.w r8, r8, r0 | r8 ^= r0;
0x0001ea98 str.w r8, [sp, 0x14] | __asm ("str.w r8, [var_14h]");
0x0001ea9c eor.w r8, sb, r0 | r8 = sb ^ r0;
0x0001ea9e lsrs r0, r0, 0x20 | r0 >>= 0x20;
0x0001eaa0 str.w r8, [sp, 0x24] | __asm ("str.w r8, [var_24h]");
0x0001eaa4 eor.w sb, r4, r6, ror 2 | sb = r4 ^ (r6 >>> 2);
0x0001eaa8 add.w r8, lr, r2 | r8 = lr + r2;
0x0001eaac add r8, r1 | r8 += r1;
0x0001eaae adds r1, r0, r2 | r1 = r0 + r2;
0x0001eab0 add.w r1, r1, r5, ror 2 | r1 += (r5 >>> 2);
0x0001eab4 and.w sb, sb, r7 | sb &= r7;
0x0001eab8 add ip, r8 |
0x0001eaba ldr.w r8, [sp, 0x84] | r8 = var_84h;
0x0001eabe add.w ip, ip, r7, ror 27 |
0x0001eac2 eor.w sb, sb, r4 | sb ^= r4;
0x0001eac6 ror.w r7, r7, 2 | r7 = rotate_right32 (r7, 2);
0x0001eaca add sb, r1 | sb += r1;
0x0001eacc ldr r1, [sp, 0x88] | r1 = var_88h;
0x0001eace eor.w fp, r3, r8 |
0x0001ead2 eor.w r5, r7, r6, ror 2 | r5 = r7 ^ (r6 >>> 2);
0x0001ead6 add.w sb, sb, ip, ror 27 | sb += (ip >>> 27);
0x0001eada str.w fp, [sp, 0x18] | __asm ("str.w fp, [var_18h]");
0x0001eade and.w r5, r5, ip | r5 &= ip;
0x0001eae2 eor.w fp, r0, r1 |
0x0001eae6 str.w fp, [sp, 0x20] | __asm ("str.w fp, [var_20h]");
0x0001eaea eor.w r5, r5, r6, ror 2 | r5 ^= (r6 >>> 2);
0x0001eaee add.w fp, r8, r2 |
0x0001eaf2 eor.w r0, r7, ip, ror 2 | r0 = r7 ^ (ip >>> 2);
0x0001eaf6 add fp, r4 |
0x0001eaf8 ror.w r4, sb, 2 | r4 = rotate_right32 (sb, 2);
0x0001eafc add r5, fp | r5 += fp;
0x0001eafe add.w r3, r5, sb, ror 27 | r3 = r5 + (sb >>> 27);
0x0001eb02 mov r5, r4 | r5 = r4;
0x0001eb04 adds r4, r1, r2 | r4 = r1 + r2;
0x0001eb06 str r5, [sp, 0x10] | var_10h = r5;
0x0001eb08 add.w r4, r4, r6, ror 2 | r4 += (r6 >>> 2);
0x0001eb0c and.w r0, r0, sb | r0 &= sb;
0x0001eb10 eors r0, r7 | r0 ^= r7;
0x0001eb12 ldr r6, [sp, 0x8c] | r6 = var_8ch;
0x0001eb14 add r0, r4 | r0 += r4;
0x0001eb16 ldr r4, [sp, 8] | r4 = var_8h;
0x0001eb18 add.w r0, r0, r3, ror 27 | r0 += (r3 >>> 27);
0x0001eb1c str r3, [sp, 8] | var_8h = r3;
0x0001eb1e eor.w lr, lr, r8 | lr ^= r8;
0x0001eb22 eor.w sb, r4, r6 | sb = r4 ^ r6;
0x0001eb24 lsrs r6, r0, 4 | r6 = r0 >> 4;
0x0001eb26 eor.w r4, r8, r6 | r4 = r8 ^ r6;
0x0001eb2a str r4, [sp, 0x30] | var_30h = r4;
0x0001eb2c eor.w r4, r5, ip, ror 2 | r4 = r5 ^ (ip >>> 2);
0x0001eb30 ldr.w r8, [sp, 0x90] | r8 = var_90h;
0x0001eb34 eor.w sl, sl, r1 | sl ^= r1;
0x0001eb38 ands r4, r3 | r4 &= r3;
0x0001eb3a ldr r3, [sp, 4] | r3 = var_4h;
0x0001eb3c eor.w r4, r4, ip, ror 2 | r4 ^= (ip >>> 2);
0x0001eb40 eor.w r1, r1, r8 | r1 ^= r8;
0x0001eb44 eor.w r2, r3, r8 | r2 = r3 ^ r8;
0x0001eb48 ldr r3, [sp, 0xc] | r3 = var_ch;
0x0001eb4a eor.w fp, r3, r8 |
0x0001eb4c lsrs r0, r1, 0xc | r0 = r1 >> 0xc;
0x0001eb4e ror.w r3, r2, 0x1f | r3 = rotate_right32 (r2, 31);
0x0001eb52 ldr r2, [sp, 8] | r2 = var_8h;
0x0001eb54 eor.w sl, sl, r3 | sl ^= r3;
0x0001eb58 eor.w lr, lr, r3 | lr ^= r3;
0x0001eb5c str.w lr, [sp, 0x28] | __asm ("str.w lr, [var_28h]");
0x0001eb60 ror.w lr, sl, 0x1f | lr = rotate_right32 (sl, 31);
0x0001eb64 str r3, [sp, 4] | var_4h = r3;
0x0001eb66 mov r3, lr | r3 = lr;
0x0001eb68 eor.w lr, r1, lr | lr = r1 ^ lr;
0x0001eb6c eor.w r1, r5, r2, ror 2 | r1 = r5 ^ (r2 >>> 2);
0x0001eb6e lsls r2, r6, 6 | r2 = r6 << 6;
0x0001eb70 str.w lr, [sp, 0x3c] | __asm ("str.w lr, [var_3ch]");
0x0001eb74 ands r1, r0 | r1 &= r0;
0x0001eb76 eors r1, r5 | r1 ^= r5;
0x0001eb78 ldr r5, [sp] | r5 = *(sp);
0x0001eb7a add.w lr, r6, r5 | lr = r6 + r5;
0x0001eb7e add lr, r7 | lr += r7;
0x0001eb80 add.w r7, r8, r5 | r7 = r8 + r5;
0x0001eb84 add.w r7, r7, ip, ror 2 | r7 += (ip >>> 2);
0x0001eb88 add r4, lr | r4 += lr;
0x0001eb8a add.w r4, r4, r0, ror 27 | r4 += (r0 >>> 27);
0x0001eb8e ror.w r0, r0, 2 | r0 = rotate_right32 (r0, 2);
0x0001eb92 add r1, r7 | r1 += r7;
0x0001eb94 add.w r7, r1, r4, ror 27 | r7 = r1 + (r4 >>> 27);
0x0001eb98 ldr r1, [sp, 0x14] | r1 = var_14h;
0x0001eb9a str r7, [sp, 0xc] | var_ch = r7;
0x0001eb9c ldr r7, [sp, 0x94] | r7 = var_94h;
0x0001eb9e eor.w lr, r1, r7 | lr = r1 ^ r7;
0x0001eba0 lsrs r7, r0, 0x18 | r7 = r0 >> 0x18;
0x0001eba2 ldr r1, [sp, 0x1c] | r1 = var_1ch;
0x0001eba4 ror.w lr, lr, 0x1f | lr = rotate_right32 (lr, 31);
0x0001eba8 eors r6, r7 | r6 ^= r7;
0x0001ebaa eor.w ip, r1, r7 |
0x0001ebae ldr r1, [sp, 0x20] | r1 = var_20h;
0x0001ebb0 eor.w ip, ip, r3 |
0x0001ebb4 eor.w sb, sb, lr | sb ^= lr;
0x0001ebb8 ror.w ip, ip, 0x1f | ip = rotate_right32 (ip, 31);
0x0001ebbc ror.w sb, sb, 0x1f | sb = rotate_right32 (sb, 31);
0x0001ebc0 mov r2, ip | r2 = ip;
0x0001ebc2 eor.w ip, r1, lr |
0x0001ebc6 eor.w ip, ip, r2 |
0x0001ebca mov r5, sb | r5 = sb;
0x0001ebcc ror.w ip, ip, 0x1f | ip = rotate_right32 (ip, 31);
0x0001ebd0 eors r6, r5 | r6 ^= r5;
0x0001ebd2 str r5, [sp, 0x50] | var_50h = r5;
0x0001ebd4 mov r1, ip | r1 = ip;
0x0001ebd6 str.w ip, [sp, 0x20] | __asm ("str.w ip, [var_20h]");
0x0001ebda eors r6, r1 | r6 ^= r1;
0x0001ebdc ldr r1, [sp, 8] | r1 = var_8h;
0x0001ebde ror.w r6, r6, 0x1f | r6 = rotate_right32 (r6, 31);
0x0001ebe2 str r6, [sp, 0x2c] | var_2ch = r6;
0x0001ebe4 eor.w sb, r0, r1, ror 2 | sb = r0 ^ (r1 >>> 2);
0x0001ebe8 ldr r6, [sp, 0x98] | r6 = var_98h;
0x0001ebea and.w sb, sb, r4 | sb &= r4;
0x0001ebee eor.w sb, sb, r1, ror 2 | sb ^= (r1 >>> 2);
0x0001ebf2 ldr r1, [sp, 0x18] | r1 = var_18h;
0x0001ebf4 eor.w r8, r8, r6 | r8 ^= r6;
0x0001ebf8 eor.w ip, r1, r6 |
0x0001ebfc ldr r1, [sp, 0x24] | r1 = var_24h;
0x0001ebfe ror.w ip, ip, 0x1f | ip = rotate_right32 (ip, 31);
0x0001ec02 eor.w sl, r1, r6 | sl = r1 ^ r6;
0x0001ec06 ldr r1, [sp, 0x30] | r1 = var_30h;
0x0001ec08 eor.w sl, sl, r5 | sl ^= r5;
0x0001ec0c eor.w fp, fp, ip |
0x0001ec10 ror.w sl, sl, 0x1f | sl = rotate_right32 (sl, 31);
0x0001ec14 ror.w fp, fp, 0x1f | fp = rotate_right32 (fp, 31);
0x0001ec16 ldrb r3, [r7, 0xf] | r3 = *((r7 + 0xf));
0x0001ec18 mov r5, sl | r5 = sl;
0x0001ec1a eor.w sl, r1, ip | sl = r1 ^ ip;
0x0001ec1e eor.w sl, sl, r5 | sl ^= r5;
0x0001ec20 lsrs r5, r0, 8 | r5 = r0 >> 8;
0x0001ec22 str r5, [sp, 0x18] | var_18h = r5;
0x0001ec24 ror.w sl, sl, 0x1f | sl = rotate_right32 (sl, 31);
0x0001ec28 ldr r5, [sp, 0x28] | r5 = var_28h;
0x0001ec2a eor.w r8, r8, fp | r8 ^= fp;
0x0001ec2e mov r1, sl | r1 = sl;
0x0001ec30 eor.w r8, r8, r1 | r8 ^= r1;
0x0001ec32 lsrs r1, r0, 0x20 | r1 = r0 >> 0x20;
0x0001ec34 eor.w sl, r5, fp | sl = r5 ^ fp;
0x0001ec38 str r1, [sp, 0x24] | var_24h = r1;
0x0001ec3a ror.w sl, sl, 0x1f | sl = rotate_right32 (sl, 31);
0x0001ec3c ldrb r2, [r7, 0xb] | r2 = *((r7 + 0xb));
0x0001ec3e ldr r1, [sp, 0x3c] | r1 = var_3ch;
0x0001ec40 ror.w r8, r8, 0x1f | r8 = rotate_right32 (r8, 31);
0x0001ec42 ldrb r0, [r7, 3] | r0 = *((r7 + 3));
0x0001ec44 str.w sl, [sp, 0x1c] | __asm ("str.w sl, [var_1ch]");
0x0001ec48 str.w r8, [sp, 0x30] | __asm ("str.w r8, [var_30h]");
0x0001ec4c eor.w r8, r1, sl | r8 = r1 ^ sl;
0x0001ec50 eor.w sl, r0, r4, ror 2 | sl = r0 ^ (r4 >>> 2);
0x0001ec54 ror.w r8, r8, 0x1f | r8 = rotate_right32 (r8, 31);
0x0001ec58 str.w r8, [sp, 0x28] | __asm ("str.w r8, [var_28h]");
0x0001ec5c ldr r1, [sp, 0xc] | r1 = var_ch;
0x0001ec5e ldr r5, [sp] | r5 = *(sp);
0x0001ec60 str r2, [sp, 0x40] | var_40h = r2;
0x0001ec62 and.w sl, sl, r1 | sl &= r1;
0x0001ec66 ldr r1, [sp, 0x10] | r1 = var_10h;
0x0001ec68 add.w r8, r7, r5 | r8 = r7 + r5;
0x0001ec6c ldr r5, [sp, 0x28] | r5 = var_28h;
0x0001ec6e eor.w sl, sl, r0 | sl ^= r0;
0x0001ec72 add r8, r1 | r8 += r1;
0x0001ec74 ldr r1, [sp, 4] | r1 = var_4h;
0x0001ec76 add r8, sb | r8 += sb;
0x0001ec78 eors r7, r1 | r7 ^= r1;
0x0001ec7a ldr r1, [sp, 0xc] | r1 = var_ch;
0x0001ec7c eors r7, r2 | r7 ^= r2;
0x0001ec7e ldr r2, [sp] | r2 = *(sp);
0x0001ec80 eors r7, r5 | r7 ^= r5;
0x0001ec82 ldr r5, [sp, 8] | r5 = var_8h;
0x0001ec84 ror.w r7, r7, 0x1f | r7 = rotate_right32 (r7, 31);
0x0001ec88 add.w r8, r8, r1, ror 27 | r8 += (r1 >>> 27);
0x0001ec8c ror.w r1, r1, 2 | r1 = rotate_right32 (r1, 2);
0x0001ec90 str r7, [sp, 0xc] | var_ch = r7;
0x0001ec92 adds r7, r6, r2 | r7 = r6 + r2;
0x0001ec94 eor.w r6, r6, lr | r6 ^= lr;
0x0001ec98 add.w r7, r7, r5, ror 2 | r7 += (r5 >>> 2);
0x0001ec9c ldr r5, [sp, 0x18] | r5 = var_18h;
0x0001ec9e add r7, sl | r7 += sl;
0x0001eca0 eors r6, r5 | r6 ^= r5;
0x0001eca2 ldr r5, [sp, 0x2c] | r5 = var_2ch;
0x0001eca4 add.w r7, r7, r8, ror 27 | r7 += (r8 >>> 27);
0x0001eca8 eors r6, r5 | r6 ^= r5;
0x0001ecaa mov r5, r2 | r5 = r2;
0x0001ecac ldr r2, [sp, 4] | r2 = var_4h;
0x0001ecae ror.w r6, r6, 0x1f | r6 = rotate_right32 (r6, 31);
0x0001ecb2 str r6, [sp, 0x3c] | var_3ch = r6;
0x0001ecb4 eor.w r6, r1, r4, ror 2 | r6 = r1 ^ (r4 >>> 2);
0x0001ecb6 lsls r4, r6, 0x1a | r4 = r6 << 0x1a;
0x0001ecb8 add r5, r2 | r5 += r2;
0x0001ecba add r5, r0 | r5 += r0;
0x0001ecbc ldr r0, [sp, 0x1c] | r0 = var_1ch;
0x0001ecbe eor.w r2, r2, ip | r2 ^= ip;
0x0001ecc2 and.w r6, r6, r8 | r6 &= r8;
0x0001ecc6 eor.w r6, r6, r4, ror 2 | r6 ^= (r4 >>> 2);
0x0001ecca eors r2, r0 | r2 ^= r0;
0x0001eccc ldr r0, [sp, 0x30] | r0 = var_30h;
0x0001ecce add r5, r6 | r5 += r6;
0x0001ecd0 eor.w r6, r1, r8, ror 2 | r6 = r1 ^ (r8 >>> 2);
0x0001ecd4 add.w r5, r5, r7, ror 27 | r5 += (r7 >>> 27);
0x0001ecd8 eors r2, r0 | r2 ^= r0;
0x0001ecda ror.w r0, r7, 2 | r0 = rotate_right32 (r7, 2);
0x0001ecdc lsls r7, r6, 2 | r7 = r6 << 2;
0x0001ecde ror.w r2, r2, 0x1f | r2 = rotate_right32 (r2, 31);
0x0001ece2 ands r6, r7 | r6 &= r7;
0x0001ece4 eors r6, r1 | r6 ^= r1;
0x0001ece6 eor.w r7, r0, r8, ror 2 | r7 = r0 ^ (r8 >>> 2);
0x0001ecea str r2, [sp, 0x10] | var_10h = r2;
0x0001ecec ldr r2, [sp] | r2 = *(sp);
0x0001ecee ands r7, r5 | r7 &= r5;
0x0001ecf0 eor.w r7, r7, r8, ror 2 | r7 ^= (r8 >>> 2);
0x0001ecf4 add r2, lr | r2 += lr;
0x0001ecf6 eor.w lr, lr, r3 | lr ^= r3;
0x0001ecfa add.w r2, r2, r4, ror 2 | r2 += (r4 >>> 2);
0x0001ecfe ldr r4, [sp, 0x20] | r4 = var_20h;
0x0001ed00 add r2, r6 | r2 += r6;
0x0001ed02 eor.w r6, r0, r5, ror 2 | r6 = r0 ^ (r5 >>> 2);
0x0001ed06 eor.w lr, lr, r4 | lr ^= r4;
0x0001ed0a ldr r4, [sp, 0xc] | r4 = var_ch;
0x0001ed0c add.w r2, r2, r5, ror 27 | r2 += (r5 >>> 27);
0x0001ed0e str r5, [r6, 0x2c] | *((r6 + 0x2c)) = r5;
0x0001ed10 eor.w lr, lr, r4 | lr ^= r4;
0x0001ed14 ldr r4, [sp] | r4 = *(sp);
0x0001ed16 ands r6, r2 | r6 &= r2;
0x0001ed18 ror.w lr, lr, 0x1f | lr = rotate_right32 (lr, 31);
0x0001ed1c eors r6, r0 | r6 ^= r0;
0x0001ed1e add r4, ip | r4 += ip;
0x0001ed20 str.w lr, [sp, 0x14] | __asm ("str.w lr, [var_14h]");
0x0001ed24 add r4, r1 | r4 += r1;
0x0001ed26 mov r1, r3 | r1 = r3;
0x0001ed28 ldr r3, [sp] | r3 = *(sp);
0x0001ed2a add r4, r7 | r4 += r7;
0x0001ed2c ldr r7, [sp, 0x24] | r7 = var_24h;
0x0001ed2e add.w lr, r4, r2, ror 27 | lr = r4 + (r2 >>> 27);
0x0001ed32 ror.w r2, r2, 2 | r2 = rotate_right32 (r2, 2);
0x0001ed36 add r3, r1 | r3 += r1;
0x0001ed38 add.w r3, r3, r8, ror 2 | r3 += (r8 >>> 2);
0x0001ed3a lsls r0, r7, 0xe | r0 = r7 << 0xe;
0x0001ed3c eor.w r1, r1, fp | r1 ^= fp;
0x0001ed40 add r3, r6 | r3 += r6;
0x0001ed42 ldr r6, [sp, 0x50] | r6 = var_50h;
0x0001ed44 add.w r3, r3, lr, ror 27 | r3 += (lr >>> 27);
0x0001ed48 eor.w ip, ip, r6 |
0x0001ed4c eor.w ip, ip, r7 |
0x0001ed50 ldr r7, [sp, 0x3c] | r7 = var_3ch;
0x0001ed52 eor.w ip, ip, r7 |
0x0001ed56 ldr r7, [sp, 0x28] | r7 = var_28h;
0x0001ed58 ror.w ip, ip, 0x1f | ip = rotate_right32 (ip, 31);
0x0001ed5a ldrb r4, [r7, 0x13] | r4 = *((r7 + 0x13));
0x0001ed5c eors r1, r7 | r1 ^= r7;
0x0001ed5e ldr r7, [sp, 0x10] | r7 = var_10h;
0x0001ed60 eors r1, r7 | r1 ^= r7;
0x0001ed62 eor.w r7, r2, r5, ror 2 | r7 = r2 ^ (r5 >>> 2);
0x0001ed64 lsls r5, r6, 0x1e | r5 = r6 << 0x1e;
0x0001ed66 ror.w sl, r1, 0x1f | sl = rotate_right32 (r1, 31);
0x0001ed6a movw r1, 0xeba1 |
0x0001ed6e movt r1, 0x6ed9 | r1 = 0x6ed9eba1;
0x0001ed72 mov r4, r1 | r4 = r1;
0x0001ed74 mov r1, r6 | r1 = r6;
0x0001ed76 add r6, r4 | r6 += r4;
0x0001ed78 eor.w r7, r7, lr | r7 ^= lr;
0x0001ed7c add r6, r0 | r6 += r0;
0x0001ed7e ldr r0, [sp, 0x40] | r0 = var_40h;
0x0001ed80 add r6, r7 | r6 += r7;
0x0001ed82 ldr r7, [sp, 0x2c] | r7 = var_2ch;
0x0001ed84 add.w r6, r6, r3, ror 27 | r6 += (r3 >>> 27);
0x0001ed88 eors r0, r1 | r0 ^= r1;
0x0001ed8a ldr r1, [sp, 0x14] | r1 = var_14h;
0x0001ed8c eors r0, r7 | r0 ^= r7;
0x0001ed8e eor.w r7, r2, lr, ror 2 | r7 = r2 ^ (lr >>> 2);
0x0001ed92 eors r0, r1 | r0 ^= r1;
0x0001ed94 eors r7, r3 | r7 ^= r3;
0x0001ed96 ror.w r8, r0, 0x1f | r8 = rotate_right32 (r0, 31);
0x0001ed9a ror.w r0, r3, 2 | r0 = rotate_right32 (r3, 2);
0x0001ed9c lsls r3, r6, 2 | r3 = r6 << 2;
0x0001ed9e add.w r3, fp, r4 | r3 = fp + r4;
0x0001eda2 add.w r3, r3, r5, ror 2 | r3 += (r5 >>> 2);
0x0001eda6 ldr r5, [sp, 0x18] | r5 = var_18h;
0x0001eda8 ldr r1, [sp, 0x30] | r1 = var_30h;
0x0001edaa add r3, r7 | r3 += r7;
0x0001edac eor.w r7, r0, lr, ror 2 | r7 = r0 ^ (lr >>> 2);
0x0001edae lsls r6, r7, 0x1e | r6 = r7 << 0x1e;
0x0001edb0 eor.w fp, fp, r5 |
0x0001edb4 add.w r3, r3, r6, ror 27 | r3 += (r6 >>> 27);
0x0001edb8 eor.w fp, fp, r1 |
0x0001edbc ldr r1, [sp, 0x40] | r1 = var_40h;
0x0001edbe eors r7, r6 | r7 ^= r6;
0x0001edc0 str r4, [sp] | *(sp) = r4;
0x0001edc2 eor.w fp, fp, ip |
0x0001edc6 mov r5, r1 | r5 = r1;
0x0001edc8 ror.w sb, fp, 0x1f | sb = rotate_right32 (fp, 31);
0x0001edcc add r5, r4 | r5 += r4;
0x0001edce add r5, r2 | r5 += r2;
0x0001edd0 mov r2, r1 | r2 = r1;
0x0001edd2 ldr r1, [sp, 0x1c] | r1 = var_1ch;
0x0001edd4 add r5, r7 | r5 += r7;
0x0001edd6 ldr r7, [sp, 0xc] | r7 = var_ch;
0x0001edd8 add.w r5, r5, r3, ror 27 | r5 += (r3 >>> 27);
0x0001eddc eors r2, r1 | r2 ^= r1;
0x0001edde ldr r1, [sp, 0x18] | r1 = var_18h;
0x0001ede0 eors r2, r7 | r2 ^= r7;
0x0001ede2 eor.w r2, r2, sl | r2 ^= sl;
0x0001ede6 ror.w r2, r2, 0x1f | r2 = rotate_right32 (r2, 31);
0x0001edea mov r7, r1 | r7 = r1;
0x0001edec add r7, r4 | r7 += r4;
0x0001edee ldr r4, [sp, 0x20] | r4 = var_20h;
0x0001edf0 str r2, [sp, 0x40] | var_40h = r2;
0x0001edf2 eor.w r2, r0, r6, ror 2 | r2 = r0 ^ (r6 >>> 2);
0x0001edf6 add.w r7, r7, lr, ror 2 | r7 += (lr >>> 2);
0x0001edfa eors r2, r3 | r2 ^= r3;
0x0001edfc ror.w r3, r3, 2 | r3 = rotate_right32 (r3, 2);
0x0001ee00 add r7, r2 | r7 += r2;
0x0001ee02 mov r2, r1 | r2 = r1;
0x0001ee04 ldr r1, [sp, 0x1c] | r1 = var_1ch;
0x0001ee06 eors r2, r4 | r2 ^= r4;
0x0001ee08 ldr r4, [sp, 0x3c] | r4 = var_3ch;
0x0001ee0a eor.w lr, r3, r6, ror 2 | lr = r3 ^ (r6 >>> 2);
0x0001ee0e add.w r7, r7, r5, ror 27 | r7 += (r5 >>> 27);
0x0001ee12 eors r2, r4 | r2 ^= r4;
0x0001ee14 ldr r4, [sp] | r4 = *(sp);
0x0001ee16 eor.w r2, r2, r8 | r2 ^= r8;
0x0001ee1a eor.w lr, lr, r5 | lr ^= r5;
0x0001ee1e ror.w r2, r2, 0x1f | r2 = rotate_right32 (r2, 31);
0x0001ee22 adds r4, r1, r4 | r4 = r1 + r4;
0x0001ee24 add r4, r0 | r4 += r0;
0x0001ee26 str r2, [sp, 4] | var_4h = r2;
0x0001ee28 add r4, lr | r4 += lr;
0x0001ee2a ldr r0, [sp, 0x24] | r0 = var_24h;
0x0001ee2c add.w r2, r4, r7, ror 27 | r2 = r4 + (r7 >>> 27);
0x0001ee30 ldr r4, [sp] | r4 = *(sp);
0x0001ee32 ror.w lr, r7, 2 | lr = rotate_right32 (r7, 2);
0x0001ee36 str r2, [sp, 8] | var_8h = r2;
0x0001ee38 eors r0, r1 | r0 ^= r1;
0x0001ee3a ldr r2, [sp, 0x10] | r2 = var_10h;
0x0001ee3c ldr r1, [sp, 0x20] | r1 = var_20h;
0x0001ee3e eors r0, r2 | r0 ^= r2;
0x0001ee40 ldr r2, [sp, 8] | r2 = var_8h;
0x0001ee42 eor.w r0, r0, sb | r0 ^= sb;
0x0001ee46 ror.w fp, r0, 0x1f | fp = rotate_right32 (r0, 31);
0x0001ee4a eor.w r0, r3, r5, ror 2 | r0 = r3 ^ (r5 >>> 2);
0x0001ee4e eors r7, r0 | r7 ^= r0;
0x0001ee50 mov r0, r1 | r0 = r1;
0x0001ee52 add r0, r4 | r0 += r4;
0x0001ee54 add.w r0, r0, r6, ror 2 | r0 += (r6 >>> 2);
0x0001ee58 mov r6, r1 | r6 = r1;
0x0001ee5a ldr r1, [sp, 0x28] | r1 = var_28h;
0x0001ee5c add r0, r7 | r0 += r7;
0x0001ee5e eor.w r7, lr, r5, ror 2 | r7 = lr ^ (r5 >>> 2);
0x0001ee62 add.w r0, r0, r2, ror 27 | r0 += (r2 >>> 27);
0x0001ee66 ldr r2, [sp, 0x14] | r2 = var_14h;
0x0001ee68 eors r6, r1 | r6 ^= r1;
0x0001ee6a eors r6, r2 | r6 ^= r2;
0x0001ee6c ldr r2, [sp, 0x40] | r2 = var_40h;
0x0001ee6e eors r6, r2 | r6 ^= r2;
0x0001ee70 ldr r2, [sp, 8] | r2 = var_8h;
0x0001ee72 ror.w r6, r6, 0x1f | r6 = rotate_right32 (r6, 31);
0x0001ee76 eors r7, r2 | r7 ^= r2;
0x0001ee78 ldr r2, [sp, 0x24] | r2 = var_24h;
0x0001ee7a str r6, [sp, 0x18] | var_18h = r6;
0x0001ee7c mov r6, r2 | r6 = r2;
0x0001ee7e add r6, r4 | r6 += r4;
0x0001ee80 add r6, r3 | r6 += r3;
0x0001ee82 mov r3, r2 | r3 = r2;
0x0001ee84 ldr r2, [sp, 0x2c] | r2 = var_2ch;
0x0001ee86 add r6, r7 | r6 += r7;
0x0001ee88 ldr r7, [sp, 4] | r7 = var_4h;
0x0001ee8a add.w r6, r6, r0, ror 27 | r6 += (r0 >>> 27);
0x0001ee8e eors r3, r2 | r3 ^= r2;
0x0001ee90 eor.w r3, r3, ip | r3 ^= ip;
0x0001ee94 eors r3, r7 | r3 ^= r7;
0x0001ee96 ror.w r3, r3, 0x1f | r3 = rotate_right32 (r3, 31);
0x0001ee9a str r3, [sp, 0x1c] | var_1ch = r3;
0x0001ee9c ldr r3, [sp, 8] | r3 = var_8h;
0x0001ee9e eor.w r7, lr, r3, ror 2 | r7 = lr ^ (r3 >>> 2);
0x0001eea2 adds r3, r1, r4 | r3 = r1 + r4;
0x0001eea4 add.w r3, r3, r5, ror 2 | r3 += (r5 >>> 2);
0x0001eea8 mov r5, r1 | r5 = r1;
0x0001eeaa ldr r1, [sp, 0x30] | r1 = var_30h;
0x0001eeac eors r7, r0 | r7 ^= r0;
0x0001eeae ror.w r0, r0, 2 | r0 = rotate_right32 (r0, 2);
0x0001eeb2 add r3, r7 | r3 += r7;
0x0001eeb4 add.w r3, r3, r6, ror 27 | r3 += (r6 >>> 27);
0x0001eeb8 eors r5, r1 | r5 ^= r1;
0x0001eeba eor.w r5, r5, sl | r5 ^= sl;
0x0001eebe eor.w r5, r5, fp | r5 ^= fp;
0x0001eec2 ror.w r5, r5, 0x1f | r5 = rotate_right32 (r5, 31);
0x0001eec6 str r5, [sp, 0x20] | var_20h = r5;
0x0001eec8 ldr r5, [sp, 8] | r5 = var_8h;
0x0001eeca eor.w r7, r0, r5, ror 2 | r7 = r0 ^ (r5 >>> 2);
0x0001eece mov r5, r2 | r5 = r2;
0x0001eed0 add r5, r4 | r5 += r4;
0x0001eed2 eors r7, r6 | r7 ^= r6;
0x0001eed4 add r5, lr | r5 += lr;
0x0001eed6 add r5, r7 | r5 += r7;
0x0001eed8 mov r7, r2 | r7 = r2;
0x0001eeda ldr r2, [sp, 0xc] | r2 = var_ch;
0x0001eedc eor.w lr, r0, r6, ror 2 | lr = r0 ^ (r6 >>> 2);
0x0001eee0 add.w r5, r5, r3, ror 27 | r5 += (r3 >>> 27);
0x0001eee2 str r3, [r6, 0x5c] | *((r6 + 0x5c)) = r3;
0x0001eee4 eor.w lr, lr, r3 | lr ^= r3;
0x0001eee8 eors r7, r2 | r7 ^= r2;
0x0001eeea ldr r2, [sp, 0x18] | r2 = var_18h;
0x0001eeec eor.w r7, r7, r8 | r7 ^= r8;
0x0001eef0 eors r7, r2 | r7 ^= r2;
0x0001eef2 ldr r2, [sp, 8] | r2 = var_8h;
0x0001eef4 ror.w r7, r7, 0x1f | r7 = rotate_right32 (r7, 31);
0x0001eef8 str r7, [sp, 0x24] | var_24h = r7;
0x0001eefa ror.w r7, r3, 2 | r7 = rotate_right32 (r3, 2);
0x0001eefe adds r3, r1, r4 | r3 = r1 + r4;
0x0001ef00 add.w r3, r3, r2, ror 2 | r3 += (r2 >>> 2);
0x0001ef04 ldr r2, [sp, 0x3c] | r2 = var_3ch;
0x0001ef06 add r3, lr | r3 += lr;
0x0001ef08 eor.w lr, r7, r6, ror 2 | lr = r7 ^ (r6 >>> 2);
0x0001ef0c eor.w r4, r1, r2 | r4 = r1 ^ r2;
0x0001ef10 ldr r1, [sp, 0x1c] | r1 = var_1ch;
0x0001ef12 eor.w r4, r4, sb | r4 ^= sb;
0x0001ef16 eor.w lr, lr, r5 | lr ^= r5;
0x0001ef1a add.w r3, r3, r5, ror 27 | r3 += (r5 >>> 27);
0x0001ef1e eors r4, r1 | r4 ^= r1;
0x0001ef20 ldr r1, [sp, 0xc] | r1 = var_ch;
0x0001ef22 ror.w r4, r4, 0x1f | r4 = rotate_right32 (r4, 31);
0x0001ef26 str r4, [sp, 8] | var_8h = r4;
0x0001ef28 ldr r4, [sp] | r4 = *(sp);
0x0001ef2a adds r4, r1, r4 | r4 = r1 + r4;
0x0001ef2c add r4, r0 | r4 += r0;
0x0001ef2e ldr r0, [sp, 0x10] | r0 = var_10h;
0x0001ef30 add r4, lr | r4 += lr;
0x0001ef32 eor.w lr, r7, r5, ror 2 | lr = r7 ^ (r5 >>> 2);
0x0001ef36 add.w r4, r4, r3, ror 27 | r4 += (r3 >>> 27);
0x0001ef3a eors r0, r1 | r0 ^= r1;
0x0001ef3c ldr r1, [sp, 0x40] | r1 = var_40h;
0x0001ef3e eor.w lr, lr, r3 | lr ^= r3;
0x0001ef42 ror.w r3, r3, 2 | r3 = rotate_right32 (r3, 2);
0x0001ef46 eors r0, r1 | r0 ^= r1;
0x0001ef48 ldr r1, [sp, 0x20] | r1 = var_20h;
0x0001ef4a eors r0, r1 | r0 ^= r1;
0x0001ef4c ldr r1, [sp] | r1 = *(sp);
0x0001ef4e ror.w r0, r0, 0x1f | r0 = rotate_right32 (r0, 31);
0x0001ef52 str r0, [sp, 0xc] | var_ch = r0;
0x0001ef54 adds r0, r2, r1 | r0 = r2 + r1;
0x0001ef56 add.w r0, r0, r6, ror 2 | r0 += (r6 >>> 2);
0x0001ef5a ldr r6, [sp, 0x14] | r6 = var_14h;
0x0001ef5c ldr r1, [sp, 0x10] | r1 = var_10h;
0x0001ef5e add r0, lr | r0 += lr;
0x0001ef60 eor.w lr, r3, r5, ror 2 | lr = r3 ^ (r5 >>> 2);
0x0001ef64 eors r6, r2 | r6 ^= r2;
0x0001ef66 ldr r2, [sp, 4] | r2 = var_4h;
0x0001ef68 eor.w lr, lr, r4 | lr ^= r4;
0x0001ef6c add.w r0, r0, r4, ror 27 | r0 += (r4 >>> 27);
0x0001ef70 eors r6, r2 | r6 ^= r2;
0x0001ef72 ldr r2, [sp, 0x24] | r2 = var_24h;
0x0001ef74 eors r6, r2 | r6 ^= r2;
0x0001ef76 ldr r2, [sp] | r2 = *(sp);
0x0001ef78 ror.w r6, r6, 0x1f | r6 = rotate_right32 (r6, 31);
0x0001ef7c str r6, [sp, 0x28] | var_28h = r6;
0x0001ef7e adds r6, r1, r2 | r6 = r1 + r2;
0x0001ef80 ldr r2, [sp, 8] | r2 = var_8h;
0x0001ef82 add r6, r7 | r6 += r7;
0x0001ef84 eor.w r7, r1, ip | r7 = r1 ^ ip;
0x0001ef88 ldr r1, [sp, 0x14] | r1 = var_14h;
0x0001ef8a eor.w r7, r7, fp | r7 ^= fp;
0x0001ef8e add r6, lr | r6 += lr;
0x0001ef90 eors r7, r2 | r7 ^= r2;
0x0001ef92 ldr r2, [sp] | r2 = *(sp);
0x0001ef94 eor.w lr, r3, r4, ror 2 | lr = r3 ^ (r4 >>> 2);
0x0001ef98 ror.w r7, r7, 0x1f | r7 = rotate_right32 (r7, 31);
0x0001ef9a strb r7, [r6, 0x1f] | *((r6 + 0x1f)) = r7;
0x0001ef9c add.w r6, r6, r0, ror 27 | r6 += (r0 >>> 27);
0x0001efa0 eor.w lr, lr, r0 | lr ^= r0;
0x0001efa4 str r7, [sp, 0x10] | var_10h = r7;
0x0001efa6 ror.w r7, r0, 2 | r7 = rotate_right32 (r0, 2);
0x0001efaa adds r0, r1, r2 | r0 = r1 + r2;
0x0001efac ldr r2, [sp, 0x18] | r2 = var_18h;
0x0001efae add.w r0, r0, r5, ror 2 | r0 += (r5 >>> 2);
0x0001efb2 eor.w r5, r1, sl | r5 = r1 ^ sl;
0x0001efb6 ldr r1, [sp, 0xc] | r1 = var_ch;
0x0001efb8 add r0, lr | r0 += lr;
0x0001efba eor.w lr, r7, r4, ror 2 | lr = r7 ^ (r4 >>> 2);
0x0001efbe eors r5, r2 | r5 ^= r2;
0x0001efc0 ldr r2, [sp] | r2 = *(sp);
0x0001efc2 eors r5, r1 | r5 ^= r1;
0x0001efc4 ldr r1, [sp, 0x1c] | r1 = var_1ch;
0x0001efc6 ror.w r5, r5, 0x1f | r5 = rotate_right32 (r5, 31);
0x0001efca eor.w lr, lr, r6 | lr ^= r6;
0x0001efce add.w r0, r0, r6, ror 27 | r0 += (r6 >>> 27);
0x0001efd2 str r5, [sp, 0x14] | var_14h = r5;
0x0001efd4 add.w r5, ip, r2 | r5 = ip + r2;
0x0001efd8 add r5, r3 | r5 += r3;
0x0001efda ldr r3, [sp, 0x28] | r3 = var_28h;
0x0001efdc eor.w ip, ip, r8 |
0x0001efe0 add r5, lr | r5 += lr;
0x0001efe2 eor.w ip, ip, r1 |
0x0001efe6 add.w r5, r5, r0, ror 27 | r5 += (r0 >>> 27);
0x0001efea eor.w ip, ip, r3 |
0x0001efee ldr r1, [sp, 0x40] | r1 = var_40h;
0x0001eff0 add.w r3, sl, r2 | r3 = sl + r2;
0x0001eff4 eor.w sl, sl, sb | sl ^= sb;
0x0001eff8 add.w r3, r3, r4, ror 2 | r3 += (r4 >>> 2);
0x0001effc ldr r4, [sp, 0x20] | r4 = var_20h;
0x0001effe ror.w lr, ip, 0x1f | lr = rotate_right32 (ip, 31);
0x0001f000 ldrb r4, [r7, 0x1b] | r4 = *((r7 + 0x1b));
0x0001f002 eor.w ip, r7, r6, ror 2 |
0x0001f006 eor.w sl, sl, r4 | sl ^= r4;
0x0001f00a ldr r4, [sp, 0x10] | r4 = var_10h;
0x0001f00c eor.w ip, ip, r0 |
0x0001f010 ror.w r0, r0, 2 | r0 = rotate_right32 (r0, 2);
0x0001f014 add r3, ip | r3 += ip;
0x0001f016 eor.w sl, sl, r4 | sl ^= r4;
0x0001f01a add.w r4, r8, r2 | r4 = r8 + r2;
0x0001f01e ldr r2, [sp, 0x24] | r2 = var_24h;
0x0001f020 eor.w ip, r0, r6, ror 2 |
0x0001f024 eor.w r8, r8, r1 | r8 ^= r1;
0x0001f028 add.w r3, r3, r5, ror 27 | r3 += (r5 >>> 27);
0x0001f02c eor.w ip, ip, r5 |
0x0001f030 ror.w sl, sl, 0x1f | sl = rotate_right32 (sl, 31);
0x0001f034 add r4, r7 | r4 += r7;
0x0001f036 ldr r7, [sp, 0x14] | r7 = var_14h;
0x0001f038 eor.w r8, r8, r2 | r8 ^= r2;
0x0001f03c ldr r2, [sp] | r2 = *(sp);
0x0001f03e add r4, ip | r4 += ip;
0x0001f040 eor.w ip, r0, r5, ror 2 |
0x0001f042 lsrs r5, r6, 0x12 | r5 = r6 >> 0x12;
0x0001f044 add.w r4, r4, r3, ror 27 | r4 += (r3 >>> 27);
0x0001f048 eor.w r8, r8, r7 | r8 ^= r7;
0x0001f04c eor.w ip, ip, r3 |
0x0001f050 ror.w r7, r3, 2 | r7 = rotate_right32 (r3, 2);
0x0001f054 add.w r3, sb, r2 | r3 = sb + r2;
0x0001f058 ror.w r8, r8, 0x1f | r8 = rotate_right32 (r8, 31);
0x0001f05c add.w r3, r3, r6, ror 2 | r3 += (r6 >>> 2);
0x0001f060 ldr r6, [sp, 4] | r6 = var_4h;
0x0001f062 mov r2, r1 | r2 = r1;
0x0001f064 add r3, ip | r3 += ip;
0x0001f066 eor.w ip, r7, r5, ror 2 |
0x0001f068 lsrs r5, r6, 0x12 | r5 = r6 >> 0x12;
0x0001f06a eor.w sb, sb, r6 | sb ^= r6;
0x0001f06e ldr r6, [sp, 8] | r6 = var_8h;
0x0001f070 add.w r3, r3, r4, ror 27 | r3 += (r4 >>> 27);
0x0001f074 eor.w ip, ip, r4 |
0x0001f078 eor.w sb, sb, r6 | sb ^= r6;
0x0001f07c ldr r6, [sp] | r6 = *(sp);
0x0001f07e eor.w sb, sb, lr | sb ^= lr;
0x0001f082 ror.w sb, sb, 0x1f | sb = rotate_right32 (sb, 31);
0x0001f084 ldrb r1, [r7, 7] | r1 = *((r7 + 7));
0x0001f086 adds r6, r1, r6 | r6 = r1 + r6;
0x0001f088 add r6, r0 | r6 += r0;
0x0001f08a ldrd r1, r0, [sp] | __asm ("ldrd r1, r0, [sp]");
0x0001f08e add r6, ip | r6 += ip;
0x0001f090 add.w r6, r6, r3, ror 27 | r6 += (r3 >>> 27);
0x0001f092 str r3, [r6, 0x6c] | *((r6 + 0x6c)) = r3;
0x0001f094 add r1, r0 | r1 += r0;
0x0001f096 add.w r1, r1, r5, ror 2 | r1 += (r5 >>> 2);
0x0001f09a eor.w r0, r2, fp | r0 = r2 ^ fp;
0x0001f09e ldr r5, [sp, 0x18] | r5 = var_18h;
0x0001f0a0 ldr r2, [sp, 4] | r2 = var_4h;
0x0001f0a2 eors r2, r5 | r2 ^= r5;
0x0001f0a4 ldr r5, [sp, 0xc] | r5 = var_ch;
0x0001f0a6 eors r0, r5 | r0 ^= r5;
0x0001f0a8 ldr r5, [sp, 0x28] | r5 = var_28h;
0x0001f0aa eor.w r0, r0, sl | r0 ^= sl;
0x0001f0ae ror.w r0, r0, 0x1f | r0 = rotate_right32 (r0, 31);
0x0001f0b2 eors r2, r5 | r2 ^= r5;
0x0001f0b4 eor.w r2, r2, r8 | r2 ^= r8;
0x0001f0b8 str r0, [sp, 0x3c] | var_3ch = r0;
0x0001f0ba ror.w r0, r2, 0x1f | r0 = rotate_right32 (r2, 31);
0x0001f0be str r0, [sp, 0x2c] | var_2ch = r0;
0x0001f0c0 eor.w r0, r7, r4, ror 2 | r0 = r7 ^ (r4 >>> 2);
0x0001f0c4 eors r0, r3 | r0 ^= r3;
0x0001f0c6 add r0, r1 | r0 += r1;
0x0001f0c8 orr.w r1, r6, r3, ror 2 | r1 = r6 | (r3 >>> 2);
0x0001f0cc add.w r2, r0, r6, ror 27 | r2 = r0 + (r6 >>> 27);
0x0001f0d0 and.w r1, r1, r4, ror 2 | r1 &= (r4 >>> 2);
0x0001f0d4 str r2, [sp, 4] | var_4h = r2;
0x0001f0d6 movw r2, 0xbcdc |
0x0001f0d8 cmn r4, r3 |
0x0001f0da ldr r0, [sp, 4] | r0 = var_4h;
0x0001f0dc movt r2, 0x8f1b | r2 = 0x8f1bbcdc;
0x0001f0e0 add.w r5, fp, r2 | r5 = fp + r2;
0x0001f0e4 add r5, r7 | r5 += r7;
0x0001f0e6 ldr r7, [sp, 0x1c] | r7 = var_1ch;
0x0001f0e8 orr.w ip, r0, r6, ror 2 |
0x0001f0ec mov r0, r2 | r0 = r2;
0x0001f0ee ldr r2, [sp, 4] | r2 = var_4h;
0x0001f0f0 eor.w r7, fp, r7 | r7 = fp ^ r7;
0x0001f0f2 lsls r7, r0, 0x1c | r7 = r0 << 0x1c;
0x0001f0f4 and.w ip, ip, r3, ror 2 |
0x0001f0f8 add.w r5, r5, r2, ror 27 | r5 += (r2 >>> 27);
0x0001f0fc ldr r2, [sp, 0x10] | r2 = var_10h;
0x0001f0fe eors r7, r2 | r7 ^= r2;
0x0001f100 ldr r2, [sp, 4] | r2 = var_4h;
0x0001f102 eor.w r7, r7, sb | r7 ^= sb;
0x0001f106 ror.w r7, r7, 0x1f | r7 = rotate_right32 (r7, 31);
0x0001f108 strb r7, [r6, 0x1f] | *((r6 + 0x1f)) = r7;
0x0001f10a str r7, [sp, 0x30] | var_30h = r7;
0x0001f10c and.w r7, r6, r3, ror 2 | r7 = r6 & (r3 >>> 2);
0x0001f110 orrs r1, r7 | r1 |= r7;
0x0001f112 and.w r7, r2, r6, ror 2 | r7 = r2 & (r6 >>> 2);
0x0001f116 ldr r2, [sp, 0x18] | r2 = var_18h;
0x0001f118 add r1, r5 | r1 += r5;
0x0001f11a orr.w r7, ip, r7 | r7 = ip | r7;
0x0001f11e mov r5, r2 | r5 = r2;
0x0001f120 add r5, r0 | r5 += r0;
0x0001f122 add.w r5, r5, r4, ror 2 | r5 += (r4 >>> 2);
0x0001f126 mov r4, r2 | r4 = r2;
0x0001f128 ldr r2, [sp, 4] | r2 = var_4h;
0x0001f12a add r5, r7 | r5 += r7;
0x0001f12c ldr r7, [sp, 0x20] | r7 = var_20h;
0x0001f12e add.w r5, r5, r1, ror 27 | r5 += (r1 >>> 27);
0x0001f132 eors r4, r7 | r4 ^= r7;
0x0001f134 ldr r7, [sp, 0x14] | r7 = var_14h;
0x0001f136 orr.w ip, r5, r1, ror 2 |
0x0001f13a eors r4, r7 | r4 ^= r7;
0x0001f13c ldr r7, [sp, 0x3c] | r7 = var_3ch;
0x0001f13e and.w ip, ip, r2, ror 2 |
0x0001f142 eors r4, r7 | r4 ^= r7;
0x0001f144 ror.w r4, r4, 0x1f | r4 = rotate_right32 (r4, 31);
0x0001f148 str r4, [sp, 0x40] | var_40h = r4;
0x0001f14a orr.w r4, r1, r2, ror 2 | r4 = r1 | (r2 >>> 2);
0x0001f14e ldr r2, [sp, 0x1c] | r2 = var_1ch;
0x0001f150 and.w r4, r4, r6, ror 2 | r4 &= (r6 >>> 2);
0x0001f154 mov r7, r2 | r7 = r2;
0x0001f156 add r7, r0 | r7 += r0;
0x0001f158 add.w r7, r7, r3, ror 2 | r7 += (r3 >>> 2);
0x0001f15c mov r3, r2 | r3 = r2;
0x0001f15e ldr r2, [sp, 0x24] | r2 = var_24h;
0x0001f160 add.w r7, r7, r5, ror 27 | r7 += (r5 >>> 27);
0x0001f164 eors r3, r2 | r3 ^= r2;
0x0001f166 ldr r2, [sp, 0x2c] | r2 = var_2ch;
0x0001f168 eor.w r3, r3, lr | r3 ^= lr;
0x0001f16c eors r3, r2 | r3 ^= r2;
0x0001f16e ror.w r3, r3, 0x1f | r3 = rotate_right32 (r3, 31);
0x0001f172 str r3, [sp, 0x18] | var_18h = r3;
0x0001f174 ldr r3, [sp, 4] | r3 = var_4h;
0x0001f176 ldr r2, [sp, 0x20] | r2 = var_20h;
0x0001f178 str r0, [sp] | *(sp) = r0;
0x0001f17a and.w r3, r1, r3, ror 2 | r3 = r1 & (r3 >>> 2);
0x0001f17c lsls r3, r6, 0xe | r3 = r6 << 0xe;
0x0001f17e orrs r4, r3 | r4 |= r3;
0x0001f180 mov r3, r2 | r3 = r2;
0x0001f182 add r4, r7 | r4 += r7;
0x0001f184 add r3, r0 | r3 += r0;
0x0001f186 and.w r7, r5, r1, ror 2 | r7 = r5 & (r1 >>> 2);
0x0001f18a add.w r6, r3, r6, ror 2 | r6 = r3 + (r6 >>> 2);
0x0001f18e ldr r3, [sp, 0x30] | r3 = var_30h;
0x0001f190 orr.w r7, ip, r7 | r7 = ip | r7;
0x0001f194 add r6, r7 | r6 += r7;
0x0001f196 mov r7, r2 | r7 = r2;
0x0001f198 ldr r2, [sp, 8] | r2 = var_8h;
0x0001f19a add.w r6, r6, r4, ror 27 | r6 += (r4 >>> 27);
0x0001f19e orr.w ip, r6, r4, ror 2 |
0x0001f1a2 eors r7, r2 | r7 ^= r2;
0x0001f1a4 ldr r2, [sp, 0x24] | r2 = var_24h;
0x0001f1a6 eor.w r7, r7, sl | r7 ^= sl;
0x0001f1aa and.w ip, ip, r5, ror 2 |
0x0001f1ac lsrs r5, r6, 0x12 | r5 = r6 >> 0x12;
0x0001f1ae eors r7, r3 | r7 ^= r3;
0x0001f1b0 orr.w r3, r4, r5, ror 2 | r3 = r4 | (r5 >>> 2);
0x0001f1b4 ror.w fp, r7, 0x1f | fp = rotate_right32 (r7, 31);
0x0001f1b8 adds r7, r2, r0 | r7 = r2 + r0;
0x0001f1ba ldr r0, [sp, 4] | r0 = var_4h;
0x0001f1bc and.w r3, r3, r1, ror 2 | r3 &= (r1 >>> 2);
0x0001f1c0 add.w r7, r7, r0, ror 2 | r7 += (r0 >>> 2);
0x0001f1c4 mov r0, r2 | r0 = r2;
0x0001f1c6 ldr r2, [sp, 0xc] | r2 = var_ch;
0x0001f1c8 add.w r7, r7, r6, ror 27 | r7 += (r6 >>> 27);
0x0001f1cc eors r0, r2 | r0 ^= r2;
0x0001f1ce ldr r2, [sp, 0x40] | r2 = var_40h;
0x0001f1d0 eor.w r0, r0, r8 | r0 ^= r8;
0x0001f1d4 eors r0, r2 | r0 ^= r2;
0x0001f1d6 ldr r2, [sp, 8] | r2 = var_8h;
0x0001f1d8 ror.w r0, r0, 0x1f | r0 = rotate_right32 (r0, 31);
0x0001f1dc str r0, [sp, 4] | var_4h = r0;
0x0001f1de and.w r0, r4, r5, ror 2 | r0 = r4 & (r5 >>> 2);
0x0001f1e2 orrs r3, r0 | r3 |= r0;
0x0001f1e4 and.w r0, r6, r4, ror 2 | r0 = r6 & (r4 >>> 2);
0x0001f1e8 add r3, r7 | r3 += r7;
0x0001f1ea ldr r7, [sp] | r7 = *(sp);
0x0001f1ec orr.w r0, ip, r0 | r0 = ip | r0;
0x0001f1f0 add.w ip, r2, r7 |
0x0001f1f4 add.w ip, ip, r1, ror 2 |
0x0001f1f8 ldr r1, [sp, 0x28] | r1 = var_28h;
0x0001f1fa add ip, r0 |
0x0001f1fc ldr r0, [sp, 0x18] | r0 = var_18h;
0x0001f1fe eors r1, r2 | r1 ^= r2;
0x0001f200 ldr r2, [sp, 0xc] | r2 = var_ch;
0x0001f202 eor.w r1, r1, sb | r1 ^= sb;
0x0001f206 add.w ip, ip, r3, ror 27 |
0x0001f20a eors r1, r0 | r1 ^= r0;
0x0001f20c ldr r0, [sp] | r0 = *(sp);
0x0001f20e ror.w r1, r1, 0x1f | r1 = rotate_right32 (r1, 31);
0x0001f212 orr.w r7, ip, r3, ror 2 | r7 = ip | (r3 >>> 2);
0x0001f216 adds r0, r2, r0 | r0 = r2 + r0;
0x0001f218 str r1, [sp, 8] | var_8h = r1;
0x0001f21a add.w r0, r0, r5, ror 2 | r0 += (r5 >>> 2);
0x0001f21e ldr r5, [sp, 0x10] | r5 = var_10h;
0x0001f220 orr.w r1, r3, r6, ror 2 | r1 = r3 | (r6 >>> 2);
0x0001f224 and.w r7, r7, r6, ror 2 | r7 &= (r6 >>> 2);
0x0001f228 add.w r0, r0, ip, ror 27 | r0 += (ip >>> 27);
0x0001f22c eors r5, r2 | r5 ^= r2;
0x0001f22e ldr r2, [sp, 0x3c] | r2 = var_3ch;
0x0001f230 and.w r1, r1, r4, ror 2 | r1 &= (r4 >>> 2);
0x0001f234 eors r5, r2 | r5 ^= r2;
0x0001f236 ldr r2, [sp, 0x28] | r2 = var_28h;
0x0001f238 eor.w r5, r5, fp | r5 ^= fp;
0x0001f23c ror.w r5, r5, 0x1f | r5 = rotate_right32 (r5, 31);
0x0001f240 str r5, [sp, 0xc] | var_ch = r5;
0x0001f242 and.w r5, r3, r6, ror 2 | r5 = r3 & (r6 >>> 2);
0x0001f246 orrs r1, r5 | r1 |= r5;
0x0001f248 and.w r5, ip, r3, ror 2 | r5 = ip & (r3 >>> 2);
0x0001f24c add r1, r0 | r1 += r0;
0x0001f24e ldr r0, [sp] | r0 = *(sp);
0x0001f250 orrs r5, r7 | r5 |= r7;
0x0001f252 adds r0, r2, r0 | r0 = r2 + r0;
0x0001f254 add.w r0, r0, r4, ror 2 | r0 += (r4 >>> 2);
0x0001f258 ldr r4, [sp, 0x14] | r4 = var_14h;
0x0001f25a add r0, r5 | r0 += r5;
0x0001f25c ldr r5, [sp, 0x2c] | r5 = var_2ch;
0x0001f25e eors r4, r2 | r4 ^= r2;
0x0001f260 ldr r2, [sp, 0x10] | r2 = var_10h;
0x0001f262 add.w r0, r0, r1, ror 27 | r0 += (r1 >>> 27);
0x0001f266 eors r4, r5 | r4 ^= r5;
0x0001f268 ldr r5, [sp, 4] | r5 = var_4h;
0x0001f26a orr.w r7, r0, r1, ror 2 | r7 = r0 | (r1 >>> 2);
0x0001f26e eors r4, r5 | r4 ^= r5;
0x0001f270 orr.w r5, r1, ip, ror 2 | r5 = r1 | (ip >>> 2);
0x0001f274 ror.w r4, r4, 0x1f | r4 = rotate_right32 (r4, 31);
0x0001f278 and.w r7, r7, ip, ror 2 | r7 &= (ip >>> 2);
0x0001f27c and.w r5, r5, r3, ror 2 | r5 &= (r3 >>> 2);
0x0001f280 str r4, [sp, 0x1c] | var_1ch = r4;
0x0001f282 ldr r4, [sp] | r4 = *(sp);
0x0001f284 adds r4, r2, r4 | r4 = r2 + r4;
0x0001f286 add.w r4, r4, r6, ror 2 | r4 += (r6 >>> 2);
0x0001f28a eor.w r6, r2, lr | r6 = r2 ^ lr;
0x0001f28e ldr r2, [sp, 0x30] | r2 = var_30h;
0x0001f290 add.w r4, r4, r0, ror 27 | r4 += (r0 >>> 27);
0x0001f294 eors r6, r2 | r6 ^= r2;
0x0001f296 ldr r2, [sp, 8] | r2 = var_8h;
0x0001f298 eors r6, r2 | r6 ^= r2;
0x0001f29a ldr r2, [sp] | r2 = *(sp);
0x0001f29c ror.w r6, r6, 0x1f | r6 = rotate_right32 (r6, 31);
0x0001f2a0 str r6, [sp, 0x10] | var_10h = r6;
0x0001f2a2 and.w r6, r1, ip, ror 2 | r6 = r1 & (ip >>> 2);
0x0001f2a6 orrs r5, r6 | r5 |= r6;
0x0001f2a8 ldr r6, [sp, 0x14] | r6 = var_14h;
0x0001f2aa add r5, r4 | r5 += r4;
0x0001f2ac and.w r4, r0, r1, ror 2 | r4 = r0 & (r1 >>> 2);
0x0001f2b0 orrs r4, r7 | r4 |= r7;
0x0001f2b2 adds r7, r6, r2 | r7 = r6 + r2;
0x0001f2b4 add.w r7, r7, r3, ror 2 | r7 += (r3 >>> 2);
0x0001f2b8 eor.w r3, r6, sl | r3 = r6 ^ sl;
0x0001f2bc add r7, r4 | r7 += r4;
0x0001f2be ldr r4, [sp, 0x40] | r4 = var_40h;
0x0001f2c0 ldr r6, [sp, 0xc] | r6 = var_ch;
0x0001f2c2 add.w r7, r7, r5, ror 27 | r7 += (r5 >>> 27);
0x0001f2c6 eors r3, r4 | r3 ^= r4;
0x0001f2c8 eors r3, r6 | r3 ^= r6;
0x0001f2ca add.w r6, lr, r2 | r6 = lr + r2;
0x0001f2ce ldr r2, [sp, 0x18] | r2 = var_18h;
0x0001f2d0 eor.w lr, lr, r8 | lr ^= r8;
0x0001f2d4 ror.w r4, r3, 0x1f | r4 = rotate_right32 (r3, 31);
0x0001f2d8 add.w r6, r6, ip, ror 2 | r6 += (ip >>> 2);
0x0001f2dc orr.w r3, r7, r5, ror 2 | r3 = r7 | (r5 >>> 2);
0x0001f2e0 eor.w lr, lr, r2 | lr ^= r2;
0x0001f2e4 ldr r2, [sp, 0x1c] | r2 = var_1ch;
0x0001f2e6 str r4, [sp, 0x14] | var_14h = r4;
0x0001f2e8 orr.w r4, r5, r0, ror 2 | r4 = r5 | (r0 >>> 2);
0x0001f2ec add.w r6, r6, r7, ror 27 | r6 += (r7 >>> 27);
0x0001f2f0 and.w r3, r3, r0, ror 2 | r3 &= (r0 >>> 2);
0x0001f2f4 and.w r4, r4, r1, ror 2 | r4 &= (r1 >>> 2);
0x0001f2f8 eor.w lr, lr, r2 | lr ^= r2;
0x0001f2fc ldr r2, [sp] | r2 = *(sp);
0x0001f2fe ror.w ip, lr, 0x1f | ip = rotate_right32 (lr, 31);
0x0001f302 str.w ip, [sp, 0x20] | __asm ("str.w ip, [var_20h]");
0x0001f306 and.w ip, r5, r0, ror 2 |
0x0001f30a add.w lr, r8, r2 | lr = r8 + r2;
0x0001f30e orr.w r4, r4, ip | r4 |= ip;
0x0001f312 add.w lr, lr, r0, ror 2 | lr += (r0 >>> 2);
0x0001f316 add r4, r6 | r4 += r6;
0x0001f318 and.w r6, r7, r5, ror 2 | r6 = r7 & (r5 >>> 2);
0x0001f31c orrs r3, r6 | r3 |= r6;
0x0001f31e add.w r6, sl, r2 | r6 = sl + r2;
0x0001f322 add.w r6, r6, r1, ror 2 | r6 += (r1 >>> 2);
0x0001f326 ldr r1, [sp, 0x10] | r1 = var_10h;
0x0001f328 eor.w sl, sl, sb | sl ^= sb;
0x0001f32c ldr r2, [sp, 0x3c] | r2 = var_3ch;
0x0001f32e eor.w sl, sl, fp | sl ^= fp;
0x0001f332 add r6, r3 | r6 += r3;
0x0001f334 eor.w r1, sl, r1 | r1 = sl ^ r1;
0x0001f338 orr.w r3, r4, r7, ror 2 | r3 = r4 | (r7 >>> 2);
0x0001f33c ror.w r1, r1, 0x1f | r1 = rotate_right32 (r1, 31);
0x0001f340 eor.w r0, r8, r2 | r0 = r8 ^ r2;
0x0001f344 and.w r3, r3, r5, ror 2 | r3 &= (r5 >>> 2);
0x0001f348 and.w r8, r4, r7, ror 2 | r8 = r4 & (r7 >>> 2);
0x0001f34c str r1, [sp, 0x24] | var_24h = r1;
0x0001f34e add.w r6, r6, r4, ror 27 | r6 += (r4 >>> 27);
0x0001f352 ldr r1, [sp, 4] | r1 = var_4h;
0x0001f354 orr.w r3, r3, r8 | r3 |= r8;
0x0001f358 orr.w ip, r6, r4, ror 2 |
0x0001f35c add.w lr, lr, r6, ror 27 | lr += (r6 >>> 27);
0x0001f360 eors r0, r1 | r0 ^= r1;
0x0001f362 ldr r1, [sp, 0x14] | r1 = var_14h;
0x0001f364 add r3, lr | r3 += lr;
0x0001f366 and.w ip, ip, r7, ror 2 |
0x0001f36a and.w lr, r6, r4, ror 2 | lr = r6 & (r4 >>> 2);
0x0001f36e eors r0, r1 | r0 ^= r1;
0x0001f370 ldr r1, [sp] | r1 = *(sp);
0x0001f372 orr.w ip, ip, lr |
0x0001f376 ror.w r0, r0, 0x1f | r0 = rotate_right32 (r0, 31);
0x0001f37a add.w r8, sb, r1 | r8 = sb + r1;
0x0001f37e ldr r1, [sp, 8] | r1 = var_8h;
0x0001f380 add.w r8, r8, r5, ror 2 | r8 += (r5 >>> 2);
0x0001f384 ldr r5, [sp, 0x2c] | r5 = var_2ch;
0x0001f386 add r8, ip | r8 += ip;
0x0001f388 eor.w r5, sb, r5 | r5 = sb ^ r5;
0x0001f38c add.w r8, r8, r3, ror 27 | r8 += (r3 >>> 27);
0x0001f390 eors r5, r1 | r5 ^= r1;
0x0001f392 ldr r1, [sp, 0x20] | r1 = var_20h;
0x0001f394 orr.w ip, r8, r3, ror 2 |
0x0001f398 eors r5, r1 | r5 ^= r1;
0x0001f39a ldr r1, [sp] | r1 = *(sp);
0x0001f39c ror.w r5, r5, 0x1f | r5 = rotate_right32 (r5, 31);
0x0001f3a0 and.w ip, ip, r6, ror 2 |
0x0001f3a4 add.w lr, r2, r1 | lr = r2 + r1;
0x0001f3a8 ldr r1, [sp, 0x30] | r1 = var_30h;
0x0001f3aa add.w r7, lr, r7, ror 2 | r7 = lr + (r7 >>> 2);
0x0001f3ae str r5, [sp, 0x28] | var_28h = r5;
0x0001f3b0 orr.w r5, r3, r6, ror 2 | r5 = r3 | (r6 >>> 2);
0x0001f3b4 eor.w lr, r2, r1 | lr = r2 ^ r1;
0x0001f3b8 ldr r1, [sp, 0xc] | r1 = var_ch;
0x0001f3ba ldr r2, [sp, 0x24] | r2 = var_24h;
0x0001f3bc and.w r5, r5, r4, ror 2 | r5 &= (r4 >>> 2);
0x0001f3c0 add.w r7, r7, r8, ror 27 | r7 += (r8 >>> 27);
0x0001f3c4 eor.w lr, lr, r1 | lr ^= r1;
0x0001f3c8 ldr r1, [sp] | r1 = *(sp);
0x0001f3ca eor.w lr, lr, r2 | lr ^= r2;
0x0001f3ce ldr r2, [sp, 0x2c] | r2 = var_2ch;
0x0001f3d0 ror.w lr, lr, 0x1f | lr = rotate_right32 (lr, 31);
0x0001f3d4 str.w lr, [sp, 0x3c] | __asm ("str.w lr, [var_3ch]");
0x0001f3d8 and.w lr, r3, r6, ror 2 | lr = r3 & (r6 >>> 2);
0x0001f3dc orr.w r5, r5, lr | r5 |= lr;
0x0001f3e0 add r5, r7 | r5 += r7;
0x0001f3e2 and.w r7, r8, r3, ror 2 | r7 = r8 & (r3 >>> 2);
0x0001f3e6 and.w sb, r5, r8, ror 2 | sb = r5 & (r8 >>> 2);
0x0001f3ea orr.w r7, ip, r7 | r7 = ip | r7;
0x0001f3ee add.w ip, r2, r1 |
0x0001f3f2 ldr r1, [sp, 0x40] | r1 = var_40h;
0x0001f3f4 add.w ip, ip, r4, ror 2 |
0x0001f3f8 add ip, r7 |
0x0001f3fa ldr r7, [sp, 0x1c] | r7 = var_1ch;
0x0001f3fc eor.w r4, r2, r1 | r4 = r2 ^ r1;
0x0001f400 ldr r2, [sp, 0x30] | r2 = var_30h;
0x0001f402 add.w ip, ip, r5, ror 27 |
0x0001f406 eors r4, r7 | r4 ^= r7;
0x0001f408 orr.w r7, r5, r8, ror 2 | r7 = r5 | (r8 >>> 2);
0x0001f40c eors r4, r0 | r4 ^= r0;
0x0001f40e orr.w lr, ip, r5, ror 2 | lr = ip | (r5 >>> 2);
0x0001f412 ror.w r4, r4, 0x1f | r4 = rotate_right32 (r4, 31);
0x0001f416 and.w r7, r7, r3, ror 2 | r7 &= (r3 >>> 2);
0x0001f41a and.w lr, lr, r8, ror 2 | lr &= (r8 >>> 2);
0x0001f41e str r4, [sp, 0x2c] | var_2ch = r4;
0x0001f420 orr.w r7, r7, sb | r7 |= sb;
0x0001f424 ldr r4, [sp] | r4 = *(sp);
0x0001f426 eor.w sb, r1, fp | sb = r1 ^ fp;
0x0001f42a adds r4, r2, r4 | r4 = r2 + r4;
0x0001f42c add.w r4, r4, r6, ror 2 | r4 += (r6 >>> 2);
0x0001f430 ldr r6, [sp, 0x18] | r6 = var_18h;
0x0001f432 add.w r4, r4, ip, ror 27 | r4 += (ip >>> 27);
0x0001f436 eors r6, r2 | r6 ^= r2;
0x0001f438 ldr r2, [sp, 0x10] | r2 = var_10h;
0x0001f43a add r7, r4 | r7 += r4;
0x0001f43c and.w r4, ip, r5, ror 2 | r4 = ip & (r5 >>> 2);
0x0001f440 eors r6, r2 | r6 ^= r2;
0x0001f442 ldr r2, [sp, 0x28] | r2 = var_28h;
0x0001f444 orr.w lr, lr, r4 | lr |= r4;
0x0001f448 eors r6, r2 | r6 ^= r2;
0x0001f44a ldr r2, [sp] | r2 = *(sp);
0x0001f44c ror.w r6, r6, 0x1f | r6 = rotate_right32 (r6, 31);
0x0001f450 adds r4, r1, r2 | r4 = r1 + r2;
0x0001f452 ldr r1, [sp, 0x18] | r1 = var_18h;
0x0001f454 add.w r4, r4, r3, ror 2 | r4 += (r3 >>> 2);
0x0001f458 ldr r3, [sp, 0x14] | r3 = var_14h;
0x0001f45a add r4, lr | r4 += lr;
0x0001f45c orr.w lr, r7, ip, ror 2 | lr = r7 | (ip >>> 2);
0x0001f460 eor.w sb, sb, r3 | sb ^= r3;
0x0001f464 ldr r3, [sp, 0x3c] | r3 = var_3ch;
0x0001f466 and.w lr, lr, r5, ror 2 | lr &= (r5 >>> 2);
0x0001f46a add.w r4, r4, r7, ror 27 | r4 += (r7 >>> 27);
0x0001f46e eor.w sb, sb, r3 | sb ^= r3;
0x0001f472 adds r3, r1, r2 | r3 = r1 + r2;
0x0001f474 add r2, fp | r2 += fp;
0x0001f476 add.w r3, r3, r8, ror 2 | r3 += (r8 >>> 2);
0x0001f47a add.w r2, r2, r5, ror 2 | r2 += (r5 >>> 2);
0x0001f47e ldr r5, [sp, 4] | r5 = var_4h;
0x0001f480 orr.w sl, r4, r7, ror 2 | sl = r4 | (r7 >>> 2);
0x0001f484 add.w r3, r3, r4, ror 27 | r3 += (r4 >>> 27);
0x0001f488 ror.w sb, sb, 0x1f | sb = rotate_right32 (sb, 31);
0x0001f48c eors r5, r1 | r5 ^= r1;
0x0001f48e ldr r1, [sp, 0x20] | r1 = var_20h;
0x0001f490 and.w sl, sl, ip, ror 2 | sl &= (ip >>> 2);
0x0001f494 eors r5, r1 | r5 ^= r1;
0x0001f496 ldr r1, [sp, 8] | r1 = var_8h;
0x0001f498 eor.w r8, fp, r1 | r8 = fp ^ r1;
0x0001f49c and.w fp, r7, ip, ror 2 |
0x0001f4a0 ldr r1, [sp, 0x2c] | r1 = var_2ch;
0x0001f4a2 orr.w lr, lr, fp | lr |= fp;
0x0001f4a6 add lr, r3 | lr += r3;
0x0001f4a8 and.w r3, r4, r7, ror 2 | r3 = r4 & (r7 >>> 2);
0x0001f4ac eors r5, r1 | r5 ^= r1;
0x0001f4ae ldr r1, [sp, 0x24] | r1 = var_24h;
0x0001f4b0 orr.w sl, sl, r3 | sl |= r3;
0x0001f4b4 ldr r3, [sp, 0x20] | r3 = var_20h;
0x0001f4b6 add sl, r2 | sl += r2;
0x0001f4b8 movw r2, 0xc1d6 |
0x0001f4bc movt r2, 0xca62 | r2 = 0xca62c1d6;
0x0001f4c0 eor.w r8, r8, r1 | r8 ^= r1;
0x0001f4c4 add r1, r2 | r1 += r2;
0x0001f4c6 add.w fp, r3, r2 |
0x0001f4ca str r1, [sp, 0x18] | var_18h = r1;
0x0001f4cc adds r3, r6, r2 | r3 = r6 + r2;
0x0001f4ce ldr r1, [sp, 4] | r1 = var_4h;
0x0001f4d0 eor.w r8, r8, r6 | r8 ^= r6;
0x0001f4d4 ldr r6, [sp, 0x44] | r6 = var_44h;
0x0001f4d6 ror.w r4, r4, 2 | r4 = rotate_right32 (r4, 2);
0x0001f4da str r3, [sp, 0x24] | var_24h = r3;
0x0001f4dc ror.w r5, r5, 0x1f | r5 = rotate_right32 (r5, 31);
0x0001f4e0 mov r3, r1 | r3 = r1;
0x0001f4e2 add.w sl, sl, lr, ror 27 | sl += (lr >>> 27);
0x0001f4e6 add r6, r2 | r6 += r2;
0x0001f4e8 ror.w r8, r8, 0x1f | r8 = rotate_right32 (r8, 31);
0x0001f4ec add r3, r2 | r3 += r2;
0x0001f4ee str r6, [sp, 0x40] | var_40h = r6;
0x0001f4f0 eor.w r6, r4, r7, ror 2 | r6 = r4 ^ (r7 >>> 2);
0x0001f4f4 add.w r3, r3, ip, ror 2 | r3 += (ip >>> 2);
0x0001f4f8 eor.w r6, r6, lr | r6 ^= lr;
0x0001f4fc add.w ip, sb, r2 |
0x0001f500 add r3, r6 | r3 += r6;
0x0001f502 mov r6, r1 | r6 = r1;
0x0001f504 ldr r1, [sp, 0xc] | r1 = var_ch;
0x0001f506 add.w r3, r3, sl, ror 27 | r3 += (sl >>> 27);
0x0001f50a str.w ip, [sp, 0x30] | __asm ("str.w ip, [var_30h]");
0x0001f50e ror.w ip, sl, 2 | ip = rotate_right32 (sl, 2);
0x0001f512 eors r6, r1 | r6 ^= r1;
0x0001f514 ldr r1, [sp, 8] | r1 = var_8h;
0x0001f516 eors r6, r0 | r6 ^= r0;
0x0001f518 add r0, r2 | r0 += r2;
0x0001f51a eor.w r6, r6, sb | r6 ^= sb;
0x0001f51e str r0, [sp, 0x20] | var_20h = r0;
0x0001f520 mov r0, r1 | r0 = r1;
0x0001f522 ror.w r6, r6, 0x1f | r6 = rotate_right32 (r6, 31);
0x0001f526 add r0, r2 | r0 += r2;
0x0001f528 eor.w sb, r4, lr, ror 2 | sb = r4 ^ (lr >>> 2);
0x0001f52c add.w r0, r0, r7, ror 2 | r0 += (r7 >>> 2);
0x0001f530 mov r7, r1 | r7 = r1;
0x0001f532 ldr r1, [sp, 0x1c] | r1 = var_1ch;
0x0001f534 eor.w sb, sb, sl | sb ^= sl;
0x0001f538 str r6, [sp] | *(sp) = r6;
0x0001f53a add r0, sb | r0 += sb;
0x0001f53c ldr r6, [sp, 0x28] | r6 = var_28h;
0x0001f53e add.w r0, r0, r3, ror 27 | r0 += (r3 >>> 27);
0x0001f542 eors r7, r1 | r7 ^= r1;
0x0001f544 ldr r1, [sp, 0xc] | r1 = var_ch;
0x0001f546 eors r7, r6 | r7 ^= r6;
0x0001f548 add.w sb, r6, r2 | sb = r6 + r2;
0x0001f54c eors r7, r5 | r7 ^= r5;
0x0001f54e add r5, r2 | r5 += r2;
0x0001f550 str r5, [sp, 8] | var_8h = r5;
0x0001f552 mov r5, r1 | r5 = r1;
0x0001f554 add r5, r2 | r5 += r2;
0x0001f556 add.w sl, r2, r7, ror 31 | sl = r2 + (r7 >>> 31);
0x0001f55a add r4, r5 | r4 += r5;
0x0001f55c eor.w r7, ip, lr, ror 2 | r7 = ip ^ (lr >>> 2);
0x0001f560 mov r5, r1 | r5 = r1;
0x0001f562 ldr r1, [sp, 0x10] | r1 = var_10h;
0x0001f564 ldr r6, [sp, 0x3c] | r6 = var_3ch;
0x0001f566 eors r7, r3 | r7 ^= r3;
0x0001f568 add r4, r7 | r4 += r7;
0x0001f56a str.w sl, [sp, 0x28] | __asm ("str.w sl, [var_28h]");
0x0001f56e eor.w r7, r5, r1 | r7 = r5 ^ r1;
0x0001f572 adds r5, r1, r2 | r5 = r1 + r2;
0x0001f574 eors r7, r6 | r7 ^= r6;
0x0001f576 add r5, ip | r5 += ip;
0x0001f578 eor.w r7, r7, r8 | r7 ^= r8;
0x0001f57c str r5, [sp, 4] | var_4h = r5;
0x0001f57e add.w r5, r2, r7, ror 31 | r5 = r2 + (r7 >>> 31);
0x0001f582 add.w sl, r6, r2 | sl = r6 + r2;
0x0001f586 eor.w ip, ip, r3, ror 2 |
0x0001f58a ldr r6, [sp, 0x14] | r6 = var_14h;
0x0001f58c str r5, [sp, 0xc] | var_ch = r5;
0x0001f58e add.w r4, r4, r0, ror 27 | r4 += (r0 >>> 27);
0x0001f592 ldr r5, [sp, 0x1c] | r5 = var_1ch;
0x0001f594 eor.w ip, ip, r0 |
0x0001f598 ror.w r0, r0, 2 | r0 = rotate_right32 (r0, 2);
0x0001f59c ldr r1, [sp, 0x18] | r1 = var_18h;
0x0001f59e add r8, r2 | r8 += r2;
0x0001f5a0 adds r7, r5, r2 | r7 = r5 + r2;
0x0001f5a2 add fp, r0 |
0x0001f5a4 add.w r7, r7, lr, ror 2 | r7 += (lr >>> 2);
0x0001f5a8 add.w lr, r6, r2 | lr = r6 + r2;
0x0001f5ac add.w lr, lr, r3, ror 2 | lr += (r3 >>> 2);
0x0001f5b0 eor.w r3, r0, r3, ror 2 | r3 = r0 ^ (r3 >>> 2);
0x0001f5b4 eor.w r0, r0, r4, ror 2 | r0 ^= (r4 >>> 2);
0x0001f5b8 add.w r1, r1, r4, ror 2 | r1 += (r4 >>> 2);
0x0001f5bc add r7, ip | r7 += ip;
0x0001f5be eor.w ip, r5, r6 |
0x0001f5c2 ldr r6, [sp, 0x2c] | r6 = var_2ch;
0x0001f5c4 add.w r7, r7, r4, ror 27 | r7 += (r4 >>> 27);
0x0001f5c8 ldr r5, [sp, 4] | r5 = var_4h;
0x0001f5ca eors r3, r4 | r3 ^= r4;
0x0001f5cc eors r0, r7 | r0 ^= r7;
0x0001f5ce eor.w ip, ip, r6 |
0x0001f5d2 add r0, lr | r0 += lr;
0x0001f5d4 add r3, r5 | r3 += r5;
0x0001f5d6 adds r5, r6, r2 | r5 = r6 + r2;
0x0001f5d8 add.w r3, r3, r7, ror 27 | r3 += (r7 >>> 27);
0x0001f5dc ror.w r7, r7, 2 | r7 = rotate_right32 (r7, 2);
0x0001f5e0 ldr r6, [sp, 0x20] | r6 = var_20h;
0x0001f5e2 eor.w r4, r7, r4, ror 2 | r4 = r7 ^ (r4 >>> 2);
0x0001f5e6 add.w r0, r0, r3, ror 27 | r0 += (r3 >>> 27);
0x0001f5ea add.w sb, sb, r3, ror 2 | sb += (r3 >>> 2);
0x0001f5ee add.w lr, r6, r7 | lr = r6 + r7;
0x0001f5f2 eor.w r7, r7, r3, ror 2 | r7 ^= (r3 >>> 2);
0x0001f5f6 eors r4, r3 | r4 ^= r3;
0x0001f5f8 ldr r6, [sp] | r6 = *(sp);
0x0001f5fa add r4, fp | r4 += fp;
0x0001f5fc eors r7, r0 | r7 ^= r0;
0x0001f5fe add.w r4, r4, r0, ror 27 | r4 += (r0 >>> 27);
0x0001f602 ror.w r0, r0, 2 | r0 = rotate_right32 (r0, 2);
0x0001f606 eor.w r3, r0, r3, ror 2 | r3 = r0 ^ (r3 >>> 2);
0x0001f60a add r2, r6 | r2 += r6;
0x0001f60c eor.w ip, ip, r6 |
0x0001f610 ldr r6, [sp, 0x40] | r6 = var_40h;
0x0001f612 add r7, r1 | r7 += r1;
0x0001f614 add sl, r0 | sl += r0;
0x0001f616 add.w r7, r7, r4, ror 27 | r7 += (r4 >>> 27);
0x0001f61a eor.w r0, r0, r4, ror 2 | r0 ^= (r4 >>> 2);
0x0001f61e add.w r5, r5, r4, ror 2 | r5 += (r4 >>> 2);
0x0001f622 ldr r1, [sp, 0x30] | r1 = var_30h;
0x0001f624 eors r3, r4 | r3 ^= r4;
0x0001f626 add.w ip, r6, ip, ror 31 |
0x0001f62a add r3, lr | r3 += lr;
0x0001f62c ldr r6, [sp, 0x24] | r6 = var_24h;
0x0001f62e add.w r3, r3, r7, ror 27 | r3 += (r7 >>> 27);
0x0001f632 eors r0, r7 | r0 ^= r7;
0x0001f634 ror.w r7, r7, 2 | r7 = rotate_right32 (r7, 2);
0x0001f638 add r0, sb | r0 += sb;
0x0001f63a add.w r0, r0, r3, ror 27 | r0 += (r3 >>> 27);
0x0001f63e add.w sb, r1, r3, ror 2 | sb = r1 + (r3 >>> 2);
0x0001f642 eor.w r4, r7, r4, ror 2 | r4 = r7 ^ (r4 >>> 2);
0x0001f646 ldr r1, [sp, 8] | r1 = var_8h;
0x0001f648 add r6, r7 | r6 += r7;
0x0001f64a eor.w r7, r7, r3, ror 2 | r7 ^= (r3 >>> 2);
0x0001f64e eors r4, r3 | r4 ^= r3;
0x0001f650 add r4, sl | r4 += sl;
0x0001f652 eors r7, r0 | r7 ^= r0;
0x0001f654 add.w r4, r4, r0, ror 27 | r4 += (r0 >>> 27);
0x0001f658 ror.w r0, r0, 2 | r0 = rotate_right32 (r0, 2);
0x0001f65c eor.w r3, r0, r3, ror 2 | r3 = r0 ^ (r3 >>> 2);
0x0001f660 add r7, r5 | r7 += r5;
0x0001f662 add.w r7, r7, r4, ror 27 | r7 += (r4 >>> 27);
0x0001f666 add.w lr, r1, r0 | lr = r1 + r0;
0x0001f66a eors r3, r4 | r3 ^= r4;
0x0001f66c eor.w r0, r0, r4, ror 2 | r0 ^= (r4 >>> 2);
0x0001f670 add r3, r6 | r3 += r6;
0x0001f672 add.w r5, r8, r4, ror 2 | r5 = r8 + (r4 >>> 2);
0x0001f676 add.w r3, r3, r7, ror 27 | r3 += (r7 >>> 27);
0x0001f67a eors r0, r7 | r0 ^= r7;
0x0001f67c ror.w r7, r7, 2 | r7 = rotate_right32 (r7, 2);
0x0001f680 add r0, sb | r0 += sb;
0x0001f682 add.w r0, r0, r3, ror 27 | r0 += (r3 >>> 27);
0x0001f686 ldr r1, [sp, 0x28] | r1 = var_28h;
0x0001f688 eor.w r4, r7, r4, ror 2 | r4 = r7 ^ (r4 >>> 2);
0x0001f68c add r2, r7 | r2 += r7;
0x0001f68e eor.w r7, r7, r3, ror 2 | r7 ^= (r3 >>> 2);
0x0001f692 ldr r6, [sp, 0xc] | r6 = var_ch;
0x0001f694 eors r4, r3 | r4 ^= r3;
0x0001f696 add r4, lr | r4 += lr;
0x0001f698 eors r7, r0 | r7 ^= r0;
0x0001f69a add.w r4, r4, r0, ror 27 | r4 += (r0 >>> 27);
0x0001f69e ror.w r0, r0, 2 | r0 = rotate_right32 (r0, 2);
0x0001f6a2 add.w r1, r1, r3, ror 2 | r1 += (r3 >>> 2);
0x0001f6a6 add r7, r5 | r7 += r5;
0x0001f6a8 eor.w r3, r0, r3, ror 2 | r3 = r0 ^ (r3 >>> 2);
0x0001f6ac add.w r7, r7, r4, ror 27 | r7 += (r4 >>> 27);
0x0001f6b0 adds r5, r6, r0 | r5 = r6 + r0;
0x0001f6b2 eor.w r0, r0, r4, ror 2 | r0 ^= (r4 >>> 2);
0x0001f6b6 eors r3, r4 | r3 ^= r4;
0x0001f6b8 add r3, r2 | r3 += r2;
0x0001f6ba add.w ip, ip, r4, ror 2 |
0x0001f6be eors r0, r7 | r0 ^= r7;
0x0001f6c0 add.w r3, r3, r7, ror 27 | r3 += (r7 >>> 27);
0x0001f6c4 add r1, r0 | r1 += r0;
0x0001f6c6 ldr r0, [sp, 0x38] | r0 = var_38h;
0x0001f6c8 add.w r1, r1, r3, ror 27 | r1 += (r3 >>> 27);
0x0001f6cc ror.w r7, r7, 2 | r7 = rotate_right32 (r7, 2);
0x0001f6d0 eor.w r4, r7, r4, ror 2 | r4 = r7 ^ (r4 >>> 2);
0x0001f6d4 add.w r2, r0, r3, ror 2 | r2 = r0 + (r3 >>> 2);
0x0001f6d8 ldr r0, [sp, 0x54] | r0 = var_54h;
0x0001f6da eors r4, r3 | r4 ^= r3;
0x0001f6dc eor.w r3, r7, r3, ror 2 | r3 = r7 ^ (r3 >>> 2);
0x0001f6e0 add r5, r4 | r5 += r4;
0x0001f6e2 str r2, [r0, 0xc] | *((r0 + 0xc)) = r2;
0x0001f6e4 add.w r5, r5, r1, ror 27 | r5 += (r1 >>> 27);
0x0001f6e8 ldr r2, [sp, 0x48] | r2 = var_48h;
0x0001f6ea eors r3, r1 | r3 ^= r1;
0x0001f6ec add ip, r3 |
0x0001f6ee add.w r2, r2, r1, ror 2 | r2 += (r1 >>> 2);
0x0001f6f2 str r2, [r0, 8] | *((r0 + 8)) = r2;
0x0001f6f4 ldr r2, [sp, 0x4c] | r2 = var_4ch;
0x0001f6f6 add r7, r2 | r7 += r2;
0x0001f6f8 ldr r2, [pc, 0x28] |
0x0001f6fa str r7, [r0, 0x10] | *((r0 + 0x10)) = r7;
0x0001f6fc ldr r7, [sp, 0x34] | r7 = var_34h;
0x0001f6fe add r2, pc | r2 = 0x3ee26;
0x0001f700 adds r3, r7, r5 | r3 = r7 + r5;
0x0001f702 add.w r5, ip, r5, ror 27 | r5 = ip + (r5 >>> 27);
0x0001f706 strd r5, r3, [r0] | __asm ("strd r5, r3, [r0]");
0x0001f70a ldr r3, [pc, 0x1c] | r3 = *(0x1f72a);
0x0001f70c ldr r3, [r2, r3] | r3 = *(0x3ee26);
0x0001f70e ldr r2, [r3] | r2 = *(0x3ee26);
0x0001f710 ldr r3, [sp, 0x9c] | r3 = var_9ch;
0x0001f712 eors r2, r3 | r2 ^= r3;
0x0001f714 mov.w r3, 0 | r3 = 0;
| if (r2 == r3) {
0x0001f718 bne 0x1f720 |
0x0001f71a add sp, 0xa4 |
0x0001f71c pop.w {r4, r5, r6, r7, r8, sb, sl, fp, pc} |
| }
0x0001f720 blx 0x9e60 | fcn_00009e60 ();
0x0001f724 movs r1, 0x56 | r1 = 0x56;
0x0001f726 movs r2, r0 | r2 = r0;
0x0001f728 lsls r4, r5, 0x1d | r4 = r5 << 0x1d;
0x0001f72a movs r0, r0 |
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/patool_extraction/rootfs.img_unblob_extracted/rootfs.img_extract/0-50593792.squashfs_v4_le_extract/usr/lib/libdbus-1.so.3.19.13 @ 0x1f82c */
| #include <stdint.h>
|
| #define SWAP32(n) ((uint32_t) (((n & 0x000000ff) << 24) | \
| ((n & 0x0000ff00) << 8) | \
| ((n & 0x00ff0000) >> 8) | \
| ((n & 0xff000000) >> 24)))
|
; (fcn) fcn.0001f82c () | void fcn_0001f82c (int16_t arg1, int16_t arg2) {
| int16_t var_10h;
| int16_t var_20h;
| int16_t var_6ch;
| int16_t var_0h;
| int32_t var_0h_2;
| int16_t var_14h;
| r0 = arg1;
| r1 = arg2;
0x0001f82c blmi 0xe72114 | __asm ("blmi aav.0x00022020");
0x0001f830 push {r4, r5, r6, r7, lr} |
0x0001f832 sub sp, 0x1c |
0x0001f834 add r2, pc | r2 += pc;
0x0001f836 add.w r7, r0, 0x1c | r7 = r0 + 0x1c;
0x0001f83a mov r5, r0 | r5 = r0;
0x0001f83c mov r6, r1 | r6 = r1;
0x0001f83e ldr r3, [r2, r3] | r3 = *((r2 + r3));
0x0001f840 movs r2, 0x80 | r2 = 0x80;
0x0001f842 mov r4, r5 | r4 = r5;
0x0001f844 ldr r3, [r3] | r3 = *(r3);
0x0001f846 str r3, [sp, 0x14] | var_14h = r3;
0x0001f848 mov.w r3, 0 | r3 = 0;
0x0001f84c ldr r3, [r0, 0x14] | r3 = *((r0 + 0x14));
0x0001f84e ubfx r3, r3, 3, 6 | r3 = (r3 >> 3) & ((1 << 6) - 1);
0x0001f852 strb r2, [r7, r3] | *((r7 + r3)) = r2;
0x0001f854 rsb.w r2, r3, 0x3f | r2 = 0x3f - r3;
0x0001f858 cmp r2, 7 |
0x0001f85a add.w r0, r7, r3 | r0 = r7 + r3;
0x0001f85e add.w r0, r0, 1 | r0++;
| if (r2 > 7) {
0x0001f862 bgt 0x1f900 | goto label_1;
| }
0x0001f864 movs r1, 0 | r1 = 0;
0x0001f866 blx 0xa748 | fcn_0000a748 ();
0x0001f86a add.w r1, r5, 0x5c | r1 = r5 + 0x5c;
0x0001f86e mov r3, r7 | r3 = r7;
| do {
0x0001f870 ldr r2, [r3] | r2 = *(r3);
0x0001f872 rev r2, r2 | r2 = SWAP32 (r2);
0x0001f874 str r2, [r3], 4 | *(r3) = r2;
| r3 += 4;
0x0001f878 cmp r3, r1 |
0x0001f87a bne 0x1f870 |
| } while (r3 != r1);
0x0001f87c mov r1, r7 | r1 = r7;
0x0001f87e mov r0, r5 | r0 = r5;
0x0001f880 bl 0x1e908 | fcn_0001e908 (r0, r1);
0x0001f884 movs r2, 0x38 | r2 = 0x38;
0x0001f886 movs r1, 0 | r1 = 0;
0x0001f888 mov r0, r7 | r0 = r7;
0x0001f88a blx 0xa748 | fcn_0000a748 ();
| label_0:
0x0001f88e ldr r3, [r5, 0x18] | r3 = *((r5 + 0x18));
0x0001f890 add.w r1, r5, 0x54 | r1 = r5 + 0x54;
0x0001f894 str r3, [r5, 0x54] | *((r5 + 0x54)) = r3;
0x0001f896 ldr r3, [r5, 0x14] | r3 = *((r5 + 0x14));
0x0001f898 str r3, [r5, 0x58] | *((r5 + 0x58)) = r3;
0x0001f89a mov r3, r7 | r3 = r7;
| do {
0x0001f89c ldr r2, [r3] | r2 = *(r3);
0x0001f89e rev r2, r2 | r2 = SWAP32 (r2);
0x0001f8a0 str r2, [r3], 4 | *(r3) = r2;
| r3 += 4;
0x0001f8a4 cmp r1, r3 |
0x0001f8a6 bne 0x1f89c |
| } while (r1 != r3);
0x0001f8a8 mov r1, r7 | r1 = r7;
0x0001f8aa mov r0, r5 | r0 = r5;
0x0001f8ac bl 0x1e908 | fcn_0001e908 (r0, r1);
0x0001f8b0 add.w r2, r5, 0x14 | r2 = r5 + 0x14;
| do {
0x0001f8b4 ldr r3, [r4] | r3 = *(r4);
0x0001f8b6 rev r3, r3 | r3 = SWAP32 (r3);
0x0001f8b8 str r3, [r4], 4 | *(r4) = r3;
| r4 += 4;
0x0001f8bc cmp r2, r4 |
0x0001f8be bne 0x1f8b4 |
| } while (r2 != r4);
0x0001f8c0 ldr r0, [r5] | r0 = *(r5);
0x0001f8c2 mov r4, sp | r4 = sp;
0x0001f8c4 ldr r1, [r5, 4] | r1 = *((r5 + 4));
0x0001f8c6 ldr r2, [r5, 8] | r2 = *((r5 + 8));
0x0001f8c8 ldr r3, [r5, 0xc] | r3 = *((r5 + 0xc));
0x0001f8ca stm r4!, {r0, r1, r2, r3} | *(r4!) = r0;
| *((r4! + 4)) = r1;
| *((r4! + 8)) = r2;
| *((r4! + 12)) = r3;
0x0001f8cc movs r2, 0x14 | r2 = 0x14;
0x0001f8ce ldr r0, [r5, 0x10] | r0 = *((r5 + 0x10));
0x0001f8d0 mov r1, sp | r1 = sp;
0x0001f8d2 str r0, [r4] | *(r4) = r0;
0x0001f8d4 mov r0, r6 | r0 = r6;
0x0001f8d6 blx 0xa290 | r0 = fcn_0000a290 ();
| if (r0 != 0) {
0x0001f8da cbz r0, 0x1f8e8 |
0x0001f8dc movs r2, 0x5c | r2 = 0x5c;
0x0001f8de movs r1, 0 | r1 = 0;
0x0001f8e0 mov r0, r5 | r0 = r5;
0x0001f8e2 blx 0xa748 | fcn_0000a748 ();
0x0001f8e6 movs r0, 1 | r0 = 1;
| }
0x0001f8e8 ldr r2, [pc, 0x2c] |
0x0001f8ea ldr r3, [pc, 0x28] | r3 = *(0x1f916);
0x0001f8ec add r2, pc | r2 = 0x3f208;
0x0001f8ee ldr r3, [r2, r3] | r3 = *(0x3f208);
0x0001f8f0 ldr r2, [r3] | r2 = *(0x3f208);
0x0001f8f2 ldr r3, [sp, 0x14] | r3 = var_14h;
0x0001f8f4 eors r2, r3 | r2 ^= r3;
0x0001f8f6 mov.w r3, 0 | r3 = 0;
| if (r2 == r3) {
0x0001f8fa bne 0x1f90c |
0x0001f8fc add sp, 0x1c |
0x0001f8fe pop {r4, r5, r6, r7, pc} |
| label_1:
0x0001f900 rsb.w r2, r3, 0x37 | r2 = 0x37 - r3;
0x0001f904 movs r1, 0 | r1 = 0;
0x0001f906 blx 0xa748 | fcn_0000a748 ();
0x0001f90a b 0x1f88e | goto label_0;
| }
0x0001f90c blx 0x9e60 | fcn_00009e60 ();
0x0001f910 movs r0, 0x20 | r0 = 0x20;
0x0001f912 movs r2, r0 | r2 = r0;
0x0001f914 lsls r4, r5, 0x1d | r4 = r5 << 0x1d;
0x0001f916 movs r0, r0 |
0x0001f918 subs r0, r5, 5 | r0 = r5 - 5;
0x0001f91a movs r2, r0 | r2 = r0;
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/patool_extraction/rootfs.img_unblob_extracted/rootfs.img_extract/0-50593792.squashfs_v4_le_extract/usr/lib/libdbus-1.so.3.19.13 @ 0x232b0 */
| #include <stdint.h>
|
; (fcn) fcn.000232b0 () | void fcn_000232b0 (int16_t arg1, int16_t arg2, int16_t arg3, int16_t arg4) {
| int16_t var_0h;
| int16_t var_4h;
| int16_t var_ch;
| int16_t var_10h;
| int16_t var_14h;
| int32_t var_14h_2;
| int16_t var_1ch;
| int16_t var_20h;
| char * path;
| int16_t var_28h;
| int16_t var_34h;
| int16_t var_38h;
| int16_t var_44h;
| r0 = arg1;
| r1 = arg2;
| r2 = arg3;
| r3 = arg4;
0x000232b0 svcmi 0xf0e92d | __asm ("svcmi 0xf0e92d");
0x000232b4 sub sp, 0x4c |
0x000232b6 str r2, [sp, 0xc] | var_ch = r2;
0x000232b8 mov r4, r3 | r4 = r3;
0x000232ba add.w r8, sp, 0x24 | r8 += path;
0x000232be movs r6, 0 | r6 = 0;
0x000232c0 ldr r2, [pc, 0x184] |
0x000232c2 mov r5, r0 | r5 = r0;
0x000232c4 ldr r3, [pc, 0x184] | r3 = *(0x2344c);
0x000232c6 mov r0, r8 | r0 = r8;
0x000232c8 ldr.w sl, [pc, 0x184] |
0x000232cc mov r7, r1 | r7 = r1;
0x000232ce add r2, pc | r2 = 0x4671a;
0x000232d0 add.w sb, sp, 0x14 | sb += var_14h;
0x000232d4 ldr r3, [r2, r3] |
0x000232d6 movs r2, 1 | r2 = 1;
0x000232d8 add sl, pc | sl = 0x4672c;
0x000232da ldr r3, [r3] | r3 = *(0x4671a);
0x000232dc str r3, [sp, 0x44] | var_44h = r3;
0x000232de mov.w r3, 0 | r3 = 0;
0x000232e2 str r6, [sp, 0x1c] | var_1ch = r6;
0x000232e4 strd r6, r6, [sp, 0x14] | __asm ("strd r6, r6, [var_14h]");
0x000232e8 str r6, [sp, 0x20] | var_20h = r6;
0x000232ea strb.w r2, [sp, 0x1c] | var_1ch = r2;
0x000232ee blx 0xafb8 | r0 = fcn_0000afb8 ();
0x000232f2 cmp r0, 0 |
| if (r0 == 0) {
0x000232f4 beq 0x233ce | goto label_5;
| }
0x000232f6 add.w fp, sp, 0x34 |
0x000232fa mov r0, fp | r0 = fp;
0x000232fc blx 0xafb8 | r0 = fcn_0000afb8 ();
0x00023300 cmp r0, 0 |
| if (r0 == 0) {
0x00023302 beq 0x23384 | goto label_6;
| }
0x00023304 mov r2, sb | r2 = sb;
0x00023306 mov r1, r5 | r1 = r5;
0x00023308 mov r0, r8 | r0 = r8;
0x0002330a blx 0xacd8 | r0 = chmod (r0, r1);
| if (r0 != 0) {
0x0002330e cbz r0, 0x23350 |
0x00023310 mov r0, r8 | r0 = r8;
0x00023312 blx 0xa6cc | fcn_0000a6cc ();
0x00023316 ldr r2, [sp, 0x28] | r2 = var_28h;
0x00023318 cmp r2, 0x20 |
| if (r2 != 0x20) {
0x0002331a bne 0x233e2 | goto label_7;
| }
0x0002331c mov r1, r6 | r1 = r6;
0x0002331e mov r3, fp | r3 = fp;
0x00023320 add r2, sp, 0x10 | r2 += var_10h;
0x00023322 mov r0, r8 | r0 = r8;
0x00023324 str r6, [sp] | *(sp) = r6;
0x00023326 blx 0xa570 | r0 = fcn_0000a570 ();
0x0002332a cmp r0, 0 |
| if (r0 == 0) {
0x0002332c beq 0x2341e | goto label_8;
| }
0x0002332e ldr r3, [sp, 0x10] | r3 = var_10h;
0x00023330 cmp r3, 0 |
| if (r3 == 0) {
0x00023332 beq 0x23432 | goto label_9;
| }
0x00023334 ldr r2, [sp, 0x38] | r2 = var_38h;
0x00023336 cmp r2, 0x10 |
| if (r2 == 0x10) {
0x00023338 beq 0x23406 | goto label_10;
| }
0x0002333a str r2, [sp] | *(sp) = r2;
0x0002333c movs r3, 0x10 | r3 = 0x10;
0x0002333e ldr r2, [pc, 0x114] |
0x00023340 mov r0, sb | r0 = sb;
0x00023342 ldr r1, [pc, 0x114] |
0x00023344 str r3, [sp, 4] | var_4h = r3;
0x00023346 add r2, pc | r2 = 0x467a0;
0x00023348 ldr r3, [r5] | r3 = *(r5);
0x0002334a add r1, pc | r1 = 0x467a8;
0x0002334c blx 0xa60c | mkdir ();
| }
| label_4:
0x00023350 mov r0, r8 | r0 = r8;
0x00023352 blx 0xa834 | fcn_0000a834 ();
0x00023356 mov r0, fp | r0 = fp;
0x00023358 blx 0xa834 | fcn_0000a834 ();
| label_3:
0x0002335c ldr r3, [sp, 0xc] | r3 = var_ch;
| if (r3 != 0) {
0x0002335e cbnz r3, 0x233a2 | goto label_11;
| }
| do {
| label_0:
0x00023360 mov r0, sb | r0 = sb;
0x00023362 mov r1, r4 | r1 = r4;
0x00023364 blx 0x9c3c | fcn_00009c3c ();
0x00023368 movs r0, 0 | r0 = 0;
| label_1:
0x0002336a ldr r2, [pc, 0xf0] |
0x0002336c ldr r3, [pc, 0xdc] | r3 = *(0x2344c);
0x0002336e add r2, pc | r2 = 0x467d0;
0x00023370 ldr r3, [r2, r3] | r3 = *(0x467d0);
0x00023372 ldr r2, [r3] | r2 = *(0x467d0);
0x00023374 ldr r3, [sp, 0x44] | r3 = var_44h;
0x00023376 eors r2, r3 | r2 ^= r3;
0x00023378 mov.w r3, 0 | r3 = 0;
| if (r2 != r3) {
0x0002337c bne 0x23444 | goto label_12;
| }
0x0002337e add sp, 0x4c |
0x00023380 pop.w {r4, r5, r6, r7, r8, sb, sl, fp, pc} |
| label_6:
0x00023384 mov r0, r8 | r0 = r8;
0x00023386 blx 0xa834 | fcn_0000a834 ();
0x0002338a ldr r3, [pc, 0xd4] | r3 = *(0x23462);
0x0002338c mov r0, sb | r0 = sb;
0x0002338e ldr r1, [pc, 0xd4] |
0x00023390 ldr.w r3, [sl, r3] | r3 = *((sl + r3));
0x00023394 add r1, pc | r1 = 0x467fe;
0x00023396 ldr r2, [r3] | r2 = *(0x23462);
0x00023398 blx 0xa0b0 | fcn_0000a0b0 ();
| label_2:
0x0002339c ldr r3, [sp, 0xc] | r3 = var_ch;
0x0002339e cmp r3, 0 |
0x000233a0 beq 0x23360 |
| } while (r3 == 0);
| label_11:
0x000233a2 ldr r1, [pc, 0xc4] |
0x000233a4 mov r0, sb | r0 = sb;
0x000233a6 add r1, pc | r1 = 0x46814;
0x000233a8 blx 0xa044 | r0 = fcn_0000a044 ();
0x000233ac cmp r0, 0 |
| if (r0 != 0) {
0x000233ae bne 0x23360 | goto label_0;
| }
0x000233b0 mov r0, sb | r0 = sb;
0x000233b2 blx 0xa2f0 | fcn_0000a2f0 ();
0x000233b6 mov r1, r4 | r1 = r4;
0x000233b8 mov r0, r7 | r0 = r7;
0x000233ba blx 0xaa98 | r0 = fcn_0000aa98 ();
0x000233be cmp r0, 0 |
| if (r0 == 0) {
0x000233c0 beq 0x2336a | goto label_1;
| }
0x000233c2 mov r2, r4 | r2 = r4;
0x000233c4 mov r1, r7 | r1 = r7;
0x000233c6 mov r0, r5 | r0 = r5;
0x000233c8 bl 0x231dc | fcn_000231dc (r0, r1, r2);
0x000233cc b 0x2336a | goto label_1;
| label_5:
0x000233ce ldr r3, [pc, 0x90] | r3 = *(0x23462);
0x000233d0 mov r0, sb | r0 = sb;
0x000233d2 ldr r1, [pc, 0x98] |
0x000233d4 ldr.w r3, [sl, r3] | r3 = *((sl + r3));
0x000233d8 add r1, pc | r1 = 0x4684a;
0x000233da ldr r2, [r3] | r2 = *(0x23462);
0x000233dc blx 0xa0b0 | fcn_0000a0b0 ();
0x000233e0 b 0x2339c | goto label_2;
| label_7:
0x000233e2 str r2, [sp, 4] | var_4h = r2;
0x000233e4 movs r3, 0x20 | r3 = 0x20;
0x000233e6 ldr r2, [pc, 0x88] |
0x000233e8 mov r0, sb | r0 = sb;
0x000233ea ldr r1, [pc, 0x88] |
0x000233ec str r3, [sp] | *(sp) = r3;
0x000233ee add r2, pc | r2 = 0x46864;
0x000233f0 ldr r3, [r5] | r3 = *(r5);
0x000233f2 add r1, pc | r1 = 0x4686c;
0x000233f4 blx 0xa60c | mkdir ();
0x000233f8 mov r0, r8 | r0 = r8;
0x000233fa blx 0xa834 | fcn_0000a834 ();
0x000233fe mov r0, fp | r0 = fp;
0x00023400 blx 0xa834 | fcn_0000a834 ();
0x00023404 b 0x2335c | goto label_3;
| label_10:
0x00023406 mov r1, r7 | r1 = r7;
0x00023408 mov r0, fp | r0 = fp;
0x0002340a bl 0x249f0 | fcn_000249f0 (r0, r1);
0x0002340e mov r0, fp | r0 = fp;
0x00023410 blx 0xa834 | fcn_0000a834 ();
0x00023414 mov r0, r8 | r0 = r8;
0x00023416 blx 0xa834 | fcn_0000a834 ();
0x0002341a movs r0, 1 | r0 = 1;
0x0002341c b 0x2336a | goto label_1;
| label_8:
0x0002341e ldr r3, [pc, 0x40] | r3 = *(0x23462);
0x00023420 mov r0, sb | r0 = sb;
0x00023422 ldr r1, [pc, 0x54] |
0x00023424 ldr.w r3, [sl, r3] | r3 = *((sl + r3));
0x00023428 add r1, pc | r1 = 0x468a6;
0x0002342a ldr r2, [r3] | r2 = *(0x23462);
0x0002342c blx 0xa0b0 | fcn_0000a0b0 ();
0x00023430 b 0x23350 | goto label_4;
| label_9:
0x00023432 ldr r2, [pc, 0x48] |
0x00023434 mov r0, sb | r0 = sb;
0x00023436 ldr r1, [pc, 0x48] |
0x00023438 ldr r3, [r5] | r3 = *(r5);
0x0002343a add r2, pc | r2 = 0x468bc;
0x0002343c add r1, pc | r1 = 0x468c2;
0x0002343e blx 0xa60c | mkdir ();
0x00023442 b 0x23350 | goto label_4;
| label_12:
0x00023444 blx 0x9e60 | fcn_00009e60 ();
0x00023448 b 0x22f58 | return void (*0x22f58)() ();
| }
; assembly | /* r2dec pseudo code output */
| /* /logs/firmware/patool_extraction/rootfs.img_unblob_extracted/rootfs.img_extract/0-50593792.squashfs_v4_le_extract/usr/lib/libdbus-1.so.3.19.13 @ 0x285fc */
| #include <stdint.h>
|
; (fcn) fcn.000285fc () | void fcn_000285fc (int16_t arg_38h, int16_t arg_2b8h, int16_t arg2, int16_t arg3) {
| int16_t var_0h;
| int16_t var_4h_2;
| int16_t var_14h_2;
| int16_t var_16h;
| int16_t var_17h;
| int16_t var_18h_2;
| int16_t var_1ch_2;
| int16_t var_94h;
| int16_t var_c4h;
| r1 = arg2;
| r2 = arg3;
0x000285fc push.w {r4, r5, r6, r7, r8, lr} |
0x00028600 mov r7, r1 | r7 = r1;
0x00028602 ldr r4, [pc, 0x140] |
0x00028604 sub sp, 0xc8 |
0x00028606 mov r5, r2 | r5 = r2;
0x00028608 movs r3, 0x80 | r3 = 0x80;
0x0002860a ldr r1, [pc, 0x13c] | r1 = *(0x2874a);
0x0002860c mov r2, sp | r2 = sp;
0x0002860e add r4, pc | r4 = 0x50d58;
0x00028610 ldr r1, [r4, r1] |
0x00028612 ldr r1, [r1] | r1 = *(0x50d58);
0x00028614 str r1, [sp, 0xc4] | var_c4h = r1;
0x00028616 mov.w r1, 0 | r1 = 0;
0x0002861a add r1, sp, 0x14 | r1 += var_14h_2;
0x0002861c str r3, [sp] | *(sp) = r3;
0x0002861e blx 0xab70 | r0 = getaddrinfo ();
| if (r0 != 0) {
0x00028622 cbnz r0, 0x2867e | goto label_0;
| }
0x00028624 ldrh.w r6, [sp, 0x14] | r6 = var_14h_2;
0x00028628 cmp r6, 2 |
| if (r6 == 2) {
0x0002862a beq 0x286ec | goto label_4;
| }
0x0002862c cmp r6, 0xa |
| if (r6 != 0xa) {
0x0002862e beq 0x2864c |
0x00028630 cmp r6, 1 |
| if (r6 == 1) {
0x00028632 beq 0x286bc | goto label_5;
| }
0x00028634 mov r4, r0 | r4 = r0;
0x00028636 movs r0, 0x16 | r0 = 0x16;
0x00028638 blx 0x9d14 | fcn_00009d14 ();
0x0002863c ldr r2, [pc, 0x10c] |
0x0002863e mov r1, r0 | r1 = r0;
0x00028640 mov r0, r5 | r0 = r5;
0x00028642 add r2, pc | r2 = 0x50d92;
0x00028644 blx 0xa60c | mkdir ();
0x00028648 mov r0, r4 | r0 = r4;
0x0002864a b 0x286a2 | goto label_1;
| }
0x0002864c add r4, sp, 0x94 | r4 += var_94h;
0x0002864e add.w r8, sp, 4 | r8 += var_4h_2;
0x00028652 mov r1, r4 | r1 = r4;
0x00028654 mov r0, r8 | r0 = r8;
0x00028656 blx 0xa9a8 | fcn_0000a9a8 ();
0x0002865a mov r2, r4 | r2 = r4;
0x0002865c mov r0, r6 | r0 = r6;
0x0002865e movs r3, 0x2e | r3 = 0x2e;
0x00028660 add r1, sp, 0x1c | r1 += var_1ch_2;
0x00028662 blx 0xaca8 | r0 = fcn_0000aca8 ();
| if (r0 == 0) {
0x00028666 cbz r0, 0x2867e | goto label_0;
| }
0x00028668 ldrh.w r2, [sp, 0x16] | r2 = var_16h;
0x0002866c mov r0, r7 | r0 = r7;
0x0002866e ldr r1, [pc, 0xe0] |
0x00028670 rev16 r2, r2 | __asm ("rev16 r2, r2");
0x00028672 uxth r2, r2 | r2 = (int16_t) r2;
0x00028674 add r1, pc | r1 = 0x50dca;
0x00028676 blx 0xa19c | r0 = fcn_0000a19c ();
0x0002867a cmp r0, 0 |
| if (r0 != 0) {
0x0002867c bne 0x28732 | goto label_6;
| }
| do {
| label_0:
0x0002867e blx 0xa698 | r0 = fcn_0000a698 ();
0x00028682 mov r4, r0 | r4 = r0;
0x00028684 ldr r0, [r0] | r0 = *(r0);
0x00028686 blx 0x9d14 | r0 = fcn_00009d14 ();
0x0002868a mov r6, r0 | r6 = r0;
0x0002868c ldr r0, [r4] | r0 = *(r4);
0x0002868e blx 0xa4c0 | fcn_0000a4c0 ();
0x00028692 ldr r2, [pc, 0xc0] |
0x00028694 mov r3, r0 | r3 = r0;
0x00028696 mov r1, r6 | r1 = r6;
0x00028698 mov r0, r5 | r0 = r5;
0x0002869a add r2, pc | r2 = 0x50df4;
0x0002869c blx 0xa60c | mkdir ();
0x000286a0 movs r0, 0 | r0 = 0;
| label_1:
0x000286a2 ldr r2, [pc, 0xb4] |
0x000286a4 ldr r3, [pc, 0xa0] | r3 = *(0x28748);
0x000286a6 add r2, pc | r2 = 0x50e04;
0x000286a8 ldr r3, [r2, r3] | r3 = *(0x50e04);
0x000286aa ldr r2, [r3] | r2 = *(0x50e04);
0x000286ac ldr r3, [sp, 0xc4] | r3 = var_c4h;
0x000286ae eors r2, r3 | r2 ^= r3;
0x000286b0 mov.w r3, 0 | r3 = 0;
| if (r2 != r3) {
0x000286b4 bne 0x28740 | goto label_7;
| }
0x000286b6 add sp, 0xc8 |
0x000286b8 pop.w {r4, r5, r6, r7, r8, pc} |
| label_5:
0x000286bc ldrb.w r3, [sp, 0x16] | r3 = var_16h;
0x000286c0 add r4, sp, 4 | r4 += var_4h_2;
| if (r3 != 0) {
0x000286c2 cbnz r3, 0x28718 | goto label_8;
| }
0x000286c4 add.w r1, sp, 0x17 | r1 += var_17h;
0x000286c8 mov r0, r4 | r0 = r4;
0x000286ca blx 0xa9a8 | fcn_0000a9a8 ();
0x000286ce ldr r1, [pc, 0x8c] |
0x000286d0 mov r0, r7 | r0 = r7;
0x000286d2 add r1, pc | r1 = 0x50e34;
0x000286d4 blx 0xae48 | r0 = fcn_0000ae48 ();
0x000286d8 cmp r0, 0 |
0x000286da beq 0x2867e |
| } while (r0 == 0);
| label_3:
0x000286dc mov r1, r4 | r1 = r4;
0x000286de mov r0, r7 | r0 = r7;
0x000286e0 bl 0xb280 | r0 = fcn_0000b280 (r0, r1);
0x000286e4 cmp r0, 0 |
| if (r0 == 0) {
0x000286e6 beq 0x2867e | goto label_0;
| }
| label_2:
0x000286e8 movs r0, 1 | r0 = 1;
0x000286ea b 0x286a2 | goto label_1;
| label_4:
0x000286ec add r4, sp, 0x94 | r4 += var_94h;
0x000286ee movs r3, 0x2e | r3 = 0x2e;
0x000286f0 mov r0, r6 | r0 = r6;
0x000286f2 mov r2, r4 | r2 = r4;
0x000286f4 add r1, sp, 0x18 | r1 += var_18h_2;
0x000286f6 blx 0xaca8 | r0 = fcn_0000aca8 ();
0x000286fa cmp r0, 0 |
| if (r0 == 0) {
0x000286fc beq 0x2867e | goto label_0;
| }
0x000286fe ldrh.w r3, [sp, 0x16] | r3 = var_16h;
0x00028702 mov r2, r4 | r2 = r4;
0x00028704 ldr r1, [pc, 0x58] |
0x00028706 mov r0, r7 | r0 = r7;
0x00028708 rev16 r3, r3 | __asm ("rev16 r3, r3");
0x0002870a uxth r3, r3 | r3 = (int16_t) r3;
0x0002870c add r1, pc | r1 = 0x50e70;
0x0002870e blx 0xa19c | r0 = fcn_0000a19c ();
0x00028712 cmp r0, 0 |
| if (r0 == 0) {
0x00028714 beq 0x2867e | goto label_0;
| }
0x00028716 b 0x286e8 | goto label_2;
| label_8:
0x00028718 add.w r1, sp, 0x16 | r1 += var_16h;
0x0002871c mov r0, r4 | r0 = r4;
0x0002871e blx 0xa9a8 | fcn_0000a9a8 ();
0x00028722 ldr r1, [pc, 0x40] |
0x00028724 mov r0, r7 | r0 = r7;
0x00028726 add r1, pc | r1 = 0x50e90;
0x00028728 blx 0xae48 | r0 = fcn_0000ae48 ();
0x0002872c cmp r0, 0 |
| if (r0 == 0) {
0x0002872e beq 0x2867e | goto label_0;
| }
0x00028730 b 0x286dc | goto label_3;
| label_6:
0x00028732 mov r1, r8 | r1 = r8;
0x00028734 mov r0, r7 | r0 = r7;
0x00028736 bl 0xb280 | r0 = fcn_0000b280 (r0, r1);
0x0002873a cmp r0, 0 |
| if (r0 == 0) {
0x0002873c beq 0x2867e | goto label_0;
| }
0x0002873e b 0x286e8 | goto label_2;
| label_7:
0x00028740 blx 0x9e60 | fcn_00009e60 ();
0x00028744 str r2, [sp, 0x118] | *(arg_38h) = r2;
0x00028746 movs r1, r0 | r1 = r0;
0x00028748 lsls r4, r5, 0x1d | r4 = r5 << 0x1d;
0x0002874a movs r0, r0 |
0x0002874c ldrb r2, [r6, 0x10] | r2 = *((r6 + 0x10));
0x0002874e movs r0, r0 |
0x00028750 ldrb r0, [r4, 0xf] | r0 = *((r4 + 0xf));
0x00028752 movs r0, r0 |
0x00028754 strb r6, [r0, 0x14] | *((r0 + 0x14)) = r6;
0x00028756 movs r0, r0 |
0x00028758 str r1, [sp, 0x2b8] | *(arg_2b8h) = r1;
0x0002875a movs r1, r0 | r1 = r0;
0x0002875c str r6, [r1, 0x50] | *((r1 + 0x50)) = r6;
0x0002875e movs r0, r0 |
0x00028760 ldrb r0, [r5, 0xc] | r0 = *((r5 + 0xc));
0x00028762 movs r0, r0 |
0x00028764 str r2, [r1, 0x4c] | *((r1 + 0x4c)) = r2;
0x00028766 movs r0, r0 |
| }
[*] Function mmap used 1 times libdbus-1.so.3.19.13
