/dts-v1/;
// magic: 0xd00dfeed
// totalsize: 0xf0a9 (61609)
// off_dt_struct: 0x38
// off_dt_strings: 0xe120
// off_mem_rsvmap: 0x28
// version: 17
// last_comp_version: 16
// boot_cpuid_phys: 0x0
// size_dt_strings: 0xf89
// size_dt_struct: 0xe0e8
/ {
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
compatible = "fsl,imx6sx";
model = "Axis A1610";
chosen {
bootargs = "init=/linuxrc console=ttymxc0,115200n8 quiet ";
stdout-path = "/aips1/uart@0x02020000";
};
aliases {
can0 = "/soc/bus&commat00000/can&commat90000";
can1 = "/soc/bus&commat00000/can&commat94000";
ethernet0 = "/soc/bus&commat00000/ethernet&commat88000";
ethernet1 = "/soc/bus&commat00000/ethernet&commatb4000";
gpio0 = "/soc/bus&commat00000/gpio&commat9c000";
gpio1 = "/soc/bus&commat00000/gpio&commata0000";
gpio2 = "/soc/bus&commat00000/gpio&commata4000";
gpio3 = "/soc/bus&commat00000/gpio&commata8000";
gpio4 = "/soc/bus&commat00000/gpio&commatac000";
gpio5 = "/soc/bus&commat00000/gpio&commatb0000";
gpio6 = "/soc/bus&commat00000/gpio&commatb4000";
i2c0 = "/soc/bus&commat00000/i2c&commata0000";
i2c1 = "/soc/bus&commat00000/i2c&commata4000";
i2c2 = "/soc/bus&commat00000/i2c&commata8000";
i2c3 = "/soc/bus&commat00000/i2c&commatf8000";
mmc0 = "/soc/bus&commat00000/mmc&commat9c000";
mmc1 = "/soc/bus&commat00000/mmc&commat94000";
mmc2 = "/soc/bus&commat00000/mmc&commat98000";
mmc3 = "/soc/bus&commat00000/mmc&commat9c000";
serial0 = "/soc/bus&commat00000/spba-bus&commat00000/serial&commat20000";
serial1 = "/soc/bus&commat00000/serial&commate8000";
serial2 = "/soc/bus&commat00000/serial&commatec000";
serial3 = "/soc/bus&commat00000/serial&commatf0000";
serial4 = "/soc/bus&commat00000/serial&commatf4000";
serial5 = "/soc/bus&commat00000/serial&commata0000";
spi0 = "/soc/bus&commat00000/spba-bus&commat00000/spi&commat08000";
spi1 = "/soc/bus&commat00000/spba-bus&commat00000/spi&commat0c000";
spi2 = "/soc/bus&commat00000/spba-bus&commat00000/spi&commat10000";
spi3 = "/soc/bus&commat00000/spba-bus&commat00000/spi&commat14000";
spi4 = "/soc/bus&commat00000/spi&commat8c000";
usbphy0 = "/soc/bus&commat00000/usbphy&commatc9000";
usbphy1 = "/soc/bus&commat00000/usbphy&commatca000";
};
cpus {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0x00000000>;
next-level-cache = <0x00000001>;
operating-points = <0x000f32a0 0x001312d0 0x000c15c0 0x0011edd8 0x00060ae0 0x00106738 0x00030570 0x000ee098>;
fsl,soc-operating-points = <0x000f32a0 0x0011edd8 0x000c15c0 0x0011edd8 0x00060ae0 0x0011edd8 0x00030570 0x0011edd8>;
clock-latency = <0x0000ee6c>;
#cooling-cells = <0x00000002>;
clocks = <0x00000002 0x00000081 0x00000002 0x00000014 0x00000002 0x00000023 0x00000002 0x00000024 0x00000002 0x00000004 0x00000002 0x000000fa 0x00000002 0x00000101 0x00000002 0x000000f3>;
clock-names = "arm", "pll2_pfd2_396m", "step", "pll1_sw", "pll1_sys", "pll1", "pll1_bypass", "pll1_bypass_src";
arm-supply = <0x00000003>;
soc-supply = <0x00000004>;
nvmem-cells = <0x00000005>;
nvmem-cell-names = "speed_grade";
phandle = <0x00000037>;
};
};
reserved-memory {
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x14000000>;
linux,cma-default;
};
crashmarker&commat9000 {
reg = <0x00909000 0x00001000>;
};
ramoops&commatff8000 {
compatible = "ramoops";
reg = <0x83ff8000 0x00008000>;
console-size = <0x00004000>;
record-size = <0x00004000>;
ecc-size = <0x00000010>;
no-dump-oops;
};
};
clock-ckil {
compatible = "fixed-clock";
#clock-cells = <0x00000000>;
clock-frequency = <0x00008000>;
clock-output-names = "ckil";
phandle = <0x00000011>;
};
clock-osc {
compatible = "fixed-clock";
#clock-cells = <0x00000000>;
clock-frequency = <0x016e3600>;
clock-output-names = "osc";
phandle = <0x00000012>;
};
clock-ipp-di0 {
compatible = "fixed-clock";
#clock-cells = <0x00000000>;
clock-frequency = <0x00000000>;
clock-output-names = "ipp_di0";
phandle = <0x00000013>;
};
clock-ipp-di1 {
compatible = "fixed-clock";
#clock-cells = <0x00000000>;
clock-frequency = <0x00000000>;
clock-output-names = "ipp_di1";
phandle = <0x00000014>;
};
clock-anaclk1 {
compatible = "fixed-clock";
#clock-cells = <0x00000000>;
clock-frequency = <0x00000000>;
clock-output-names = "anaclk1";
phandle = <0x00000015>;
};
clock-anaclk2 {
compatible = "fixed-clock";
#clock-cells = <0x00000000>;
clock-frequency = <0x00000000>;
clock-output-names = "anaclk2";
phandle = <0x00000016>;
};
mqs {
compatible = "fsl,imx6sx-mqs";
gpr = <0x00000006>;
status = "disabled";
phandle = <0x00000038>;
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <0x00000007>;
interrupts = <0x00000000 0x0000005e 0x00000004>;
};
usbphynop1 {
compatible = "usb-nop-xceiv";
#phy-cells = <0x00000000>;
clocks = <0x00000002 0x0000000b>;
clock-names = "usbphy_clk";
phandle = <0x00000022>;
};
soc {
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
compatible = "simple-bus";
interrupt-parent = <0x00000007>;
ranges;
busfreq&commatc80f0 {
compatible = "fsl,imx_busfreq";
clocks = <0x00000002 0x00000005 0x00000002 0x00000014 0x00000002 0x0000001a 0x00000002 0x00000081 0x00000002 0x00000006 0x00000002 0x0000007c 0x00000002 0x00000026 0x00000002 0x00000050 0x00000002 0x00000028 0x00000002 0x00000003 0x00000002 0x00000004 0x00000002 0x0000007d 0x00000002 0x0000007f 0x00000002 0x000000e2 0x00000002 0x00000024 0x00000002 0x00000027 0x00000002 0x00000029 0x00000002 0x00000051 0x00000002 0x00000023 0x00000002 0x00000080 0x00000002 0x000000ab>;
clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph", "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", "pll1_sys", "periph2", "ahb", "ocram", "pll1_sw", "periph2_pre", "periph2_clk2_sel", "periph2_clk2", "step", "mmdc", "m4";
fsl,max_ddr_freq = <0x17d78400>;
reg = <0x020c80f0 0x00000100>;
phandle = <0x00000039>;
};
sram@8f8000 {
compatible = "fsl,lpm-sram";
reg = <0x008f8000 0x00004000>;
clocks = <0x00000002 0x0000009d>;
phandle = <0x0000000a>;
};
sram&commat0000 {
compatible = "fsl,ddr-lpm-sram";
reg = <0x00900000 0x00001000>;
clocks = <0x00000002 0x0000007e>;
phandle = <0x00000008>;
};
sram&commat1000 {
compatible = "mmio-sram";
reg = <0x00901000 0x0001e000>;
clocks = <0x00000002 0x0000007e>;
phandle = <0x00000009>;
};
sram-mf&commat0000 {
compatible = "fsl,mega-fast-sram";
reg = <0x00900000 0x00020000>;
clocks = <0x00000002 0x0000007e>;
phandle = <0x0000003a>;
};
sram-optee@8f8000 {
compatible = "fsl,optee-lpm-sram";
reg = <0x008f8000 0x00004000>;
overw_reg = <0x00000008 0x00904000 0x00001000 0x00000009 0x00905000 0x0001b000 0x0000000a 0x00900000 0x00004000>;
overw_clock = <0x0000000a 0x00000002 0x0000007e>;
phandle = <0x0000003b>;
};
interrupt-controller@a01000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <0x00000003>;
#address-cells = <0x00000001>;
interrupt-controller;
reg = <0x00a01000 0x00001000 0x00a00100 0x00000100>;
interrupt-parent = <0x0000000b>;
phandle = <0x0000000b>;
};
cache-controller@a02000 {
compatible = "arm,pl310-cache";
reg = <0x00a02000 0x00001000>;
interrupts = <0x00000000 0x0000005c 0x00000004>;
cache-unified;
cache-level = <0x00000002>;
arm,tag-latency = <0x00000004 0x00000002 0x00000003>;
arm,data-latency = <0x00000004 0x00000002 0x00000003>;
phandle = <0x00000001>;
};
dma-apbh&commat04000 {
compatible = "fsl,imx6sx-dma-apbh", "fsl,imx28-dma-apbh";
reg = <0x01804000 0x00002000>;
interrupts = <0x00000000 0x0000000d 0x00000004 0x00000000 0x0000000d 0x00000004 0x00000000 0x0000000d 0x00000004 0x00000000 0x0000000d 0x00000004>;
interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
#dma-cells = <0x00000001>;
dma-channels = <0x00000004>;
clocks = <0x00000002 0x00000084>;
phandle = <0x0000000c>;
};
caam-sm&commat0000 {
compatible = "fsl,imx6q-caam-sm";
reg = <0x00100000 0x00008000>;
phandle = <0x0000003c>;
};
nand-controller&commat06000 {
compatible = "fsl,imx6sx-gpmi-nand";
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
reg = <0x01806000 0x00002000 0x01808000 0x00004000>;
reg-names = "gpmi-nand", "bch";
interrupts = <0x00000000 0x0000000f 0x00000004>;
interrupt-names = "bch";
clocks = <0x00000002 0x000000c0 0x00000002 0x000000c1 0x00000002 0x000000bf 0x00000002 0x000000be 0x00000002 0x000000b8>;
clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch";
dmas = <0x0000000c 0x00000000>;
dma-names = "rx-tx";
status = "okay";
nand-on-flash-bbt;
fsl,legacy-bch-geometry;
pinctrl-names = "default";
pinctrl-0 = <0x0000000d>;
gpmi,io-clock-rate = <0x03ef1480>;
gpmi,data_setup_ns = <0x0000000c>;
gpmi,data_hold_ns = <0x00000005>;
gpmi,address_setup_ns = <0x0000000c>;
gpmi,REA_ns = <0x00000014>;
gpmi,RLOH_ns = <0x00000005>;
gpmi,RHOH_ns = <0x00000019>;
gpmi,calc-edo-from-dt-params;
phandle = <0x0000003d>;
main@0 {
label = "main";
reg = <0x00000000 0x40000000>;
};
boot@0 {
label = "boot";
reg = <0x00000000 0x00400000>;
};
firmware&commat0000 {
label = "firmware";
reg = <0x00400000 0x3c900000>;
};
personality@3cd00000 {
label = "personality";
reg = <0x3cd00000 0x03000000>;
};
oops@3fd00000 {
label = "oops";
reg = <0x3fd00000 0x00300000>;
};
data&commat000000 {
label = "data";
reg = <0x40000000 0x40000000>;
};
};
bus&commat00000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
reg = <0x02000000 0x00100000>;
ranges;
phandle = <0x0000003e>;
spba-bus&commat00000 {
compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
reg = <0x02000000 0x00040000>;
ranges;
spdif&commat04000 {
compatible = "fsl,imx6sx-spdif", "fsl,imx35-spdif";
reg = <0x02004000 0x00004000>;
interrupts = <0x00000000 0x00000034 0x00000004>;
dmas = <0x0000000e 0x0000000e 0x00000012 0x00000000 0x0000000e 0x0000000f 0x00000012 0x00000000>;
dma-names = "rx", "tx";
clocks = <0x00000002 0x00000108 0x00000002 0x00000003 0x00000002 0x000000c5 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x00000052 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x000000c4>;
clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3", "rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba";
status = "disabled";
phandle = <0x0000003f>;
};
spi&commat08000 {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi";
reg = <0x02008000 0x00004000>;
interrupts = <0x00000000 0x0000001f 0x00000004>;
clocks = <0x00000002 0x00000091 0x00000002 0x00000091>;
clock-names = "ipg", "per";
dmas = <0x0000000e 0x00000003 0x00000007 0x00000001 0x0000000e 0x00000004 0x00000007 0x00000002>;
dma-names = "rx", "tx";
status = "disabled";
phandle = <0x00000040>;
};
spi&commat0c000 {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi";
reg = <0x0200c000 0x00004000>;
interrupts = <0x00000000 0x00000020 0x00000004>;
clocks = <0x00000002 0x00000092 0x00000002 0x00000092>;
clock-names = "ipg", "per";
dmas = <0x0000000e 0x00000005 0x00000007 0x00000001 0x0000000e 0x00000006 0x00000007 0x00000002>;
dma-names = "rx", "tx";
status = "disabled";
phandle = <0x00000041>;
};
spi&commat10000 {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi";
reg = <0x02010000 0x00004000>;
interrupts = <0x00000000 0x00000021 0x00000004>;
clocks = <0x00000002 0x00000093 0x00000002 0x00000093>;
clock-names = "ipg", "per";
dmas = <0x0000000e 0x00000007 0x00000007 0x00000001 0x0000000e 0x00000008 0x00000007 0x00000002>;
dma-names = "rx", "tx";
status = "disabled";
phandle = <0x00000042>;
};
spi&commat14000 {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi";
reg = <0x02014000 0x00004000>;
interrupts = <0x00000000 0x00000022 0x00000004>;
clocks = <0x00000002 0x00000094 0x00000002 0x00000094>;
clock-names = "ipg", "per";
dmas = <0x0000000e 0x00000009 0x00000007 0x00000001 0x0000000e 0x0000000a 0x00000007 0x00000002>;
dma-names = "rx", "tx";
status = "disabled";
phandle = <0x00000043>;
};
serial&commat20000 {
compatible = "fsl,imx6sx-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02020000 0x00004000>;
interrupts = <0x00000000 0x0000001a 0x00000004>;
clocks = <0x00000002 0x000000cc 0x00000002 0x000000cd>;
clock-names = "ipg", "per";
dmas = <0x0000000e 0x00000019 0x00000004 0x00000000 0x0000000e 0x0000001a 0x00000004 0x00000000>;
dma-names = "rx", "tx";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x0000000f>;
phandle = <0x00000044>;
};
esai&commat24000 {
compatible = "fsl,imx6sx-esai", "fsl,imx35-esai";
reg = <0x02024000 0x00004000>;
interrupts = <0x00000000 0x00000033 0x00000004>;
clocks = <0x00000002 0x000000ef 0x00000002 0x000000f0 0x00000002 0x00000098 0x00000002 0x000000ef 0x00000002 0x000000c4>;
clock-names = "core", "mem", "extal", "fsys", "spba";
dmas = <0x0000000e 0x00000017 0x00000015 0x00000000 0x0000000e 0x00000018 0x00000015 0x00000000>;
dma-names = "rx", "tx";
status = "disabled";
fsl,esai-synchronous;
fsl,fifo-depth = <0x00000080>;
phandle = <0x00000045>;
};
ssi&commat28000 {
#sound-dai-cells = <0x00000000>;
compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi";
reg = <0x02028000 0x00004000>;
interrupts = <0x00000000 0x0000002e 0x00000004>;
clocks = <0x00000002 0x000000c6 0x00000002 0x000000c9>;
clock-names = "ipg", "baud";
dmas = <0x0000000e 0x00000025 0x0000001a 0x00000000 0x0000000e 0x00000026 0x0000001a 0x00000000>;
dma-names = "rx", "tx";
fsl,fifo-depth = <0x0000000f>;
status = "okay";
phandle = <0x00000046>;
};
ssi&commat2c000 {
#sound-dai-cells = <0x00000000>;
compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi";
reg = <0x0202c000 0x00004000>;
interrupts = <0x00000000 0x0000002f 0x00000004>;
clocks = <0x00000002 0x000000c7 0x00000002 0x000000ca>;
clock-names = "ipg", "baud";
dmas = <0x0000000e 0x00000029 0x0000001a 0x00000000 0x0000000e 0x0000002a 0x0000001a 0x00000000>;
dma-names = "rx", "tx";
fsl,fifo-depth = <0x0000000f>;
status = "disabled";
phandle = <0x00000047>;
};
ssi&commat30000 {
#sound-dai-cells = <0x00000000>;
compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi";
reg = <0x02030000 0x00004000>;
interrupts = <0x00000000 0x00000030 0x00000004>;
clocks = <0x00000002 0x000000c8 0x00000002 0x000000cb>;
clock-names = "ipg", "baud";
dmas = <0x0000000e 0x0000002d 0x0000001a 0x00000000 0x0000000e 0x0000002e 0x0000001a 0x00000000>;
dma-names = "rx", "tx";
fsl,fifo-depth = <0x0000000f>;
status = "disabled";
phandle = <0x00000048>;
};
asrc&commat34000 {
compatible = "fsl,imx6sx-asrc", "fsl,imx53-asrc";
reg = <0x02034000 0x00004000>;
interrupts = <0x00000000 0x00000032 0x00000004>;
clocks = <0x00000002 0x000000eb 0x00000002 0x000000ec 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x000000c5 0x00000002 0x00000000 0x00000002 0x00000000 0x00000002 0x000000c4>;
clock-names = "mem", "ipg", "asrck_0", "asrck_1", "asrck_2", "asrck_3", "asrck_4", "asrck_5", "asrck_6", "asrck_7", "asrck_8", "asrck_9", "asrck_a", "asrck_b", "asrck_c", "asrck_d", "asrck_e", "asrck_f", "spba";
dmas = <0x0000000e 0x00000011 0x00000017 0x00000001 0x0000000e 0x00000012 0x00000017 0x00000001 0x0000000e 0x00000013 0x00000017 0x00000001 0x0000000e 0x00000014 0x00000017 0x00000001 0x0000000e 0x00000015 0x00000017 0x00000001 0x0000000e 0x00000016 0x00000017 0x00000001>;
dma-names = "rxa", "rxb", "rxc", "txa", "txb", "txc";
fsl,asrc-rate = <0x0000bb80>;
fsl,asrc-width = <0x00000010>;
status = "disabled";
phandle = <0x00000049>;
};
};
pwm&commat80000 {
compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
reg = <0x02080000 0x00004000>;
interrupts = <0x00000000 0x00000053 0x00000004>;
clocks = <0x00000002 0x000000ba 0x00000002 0x000000ba>;
clock-names = "ipg", "per";
#pwm-cells = <0x00000002>;
phandle = <0x0000004a>;
};
pwm&commat84000 {
compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
reg = <0x02084000 0x00004000>;
interrupts = <0x00000000 0x00000054 0x00000004>;
clocks = <0x00000002 0x000000bb 0x00000002 0x000000bb>;
clock-names = "ipg", "per";
#pwm-cells = <0x00000002>;
phandle = <0x0000004b>;
};
pwm&commat88000 {
compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
reg = <0x02088000 0x00004000>;
interrupts = <0x00000000 0x00000055 0x00000004>;
clocks = <0x00000002 0x000000bc 0x00000002 0x000000bc>;
clock-names = "ipg", "per";
#pwm-cells = <0x00000002>;
phandle = <0x0000004c>;
};
pwm&commat8c000 {
compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
reg = <0x0208c000 0x00004000>;
interrupts = <0x00000000 0x00000056 0x00000004>;
clocks = <0x00000002 0x000000bd 0x00000002 0x000000bd>;
clock-names = "ipg", "per";
#pwm-cells = <0x00000002>;
phandle = <0x0000004d>;
};
can&commat90000 {
compatible = "fsl,imx6sx-flexcan", "fsl,imx6q-flexcan";
reg = <0x02090000 0x00004000>;
interrupts = <0x00000000 0x0000006e 0x00000004>;
clocks = <0x00000002 0x00000089 0x00000002 0x0000008a>;
clock-names = "ipg", "per";
fsl,stop-mode = <0x00000006 0x00000010 0x00000001 0x00000010 0x00000011>;
status = "disabled";
phandle = <0x0000004e>;
};
can&commat94000 {
compatible = "fsl,imx6sx-flexcan", "fsl,imx6q-flexcan";
reg = <0x02094000 0x00004000>;
interrupts = <0x00000000 0x0000006f 0x00000004>;
clocks = <0x00000002 0x0000008b 0x00000002 0x0000008c>;
clock-names = "ipg", "per";
fsl,stop-mode = <0x00000006 0x00000010 0x00000002 0x00000010 0x00000012>;
status = "disabled";
phandle = <0x0000004f>;
};
timer&commat98000 {
compatible = "fsl,imx6sx-gpt", "fsl,imx6dl-gpt";
reg = <0x02098000 0x00004000>;
interrupts = <0x00000000 0x00000037 0x00000004>;
clocks = <0x00000002 0x0000009a 0x00000002 0x000000e3>;
clock-names = "ipg", "per";
phandle = <0x00000050>;
};
gpio&commat9c000 {
compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
reg = <0x0209c000 0x00004000>;
interrupts = <0x00000000 0x00000042 0x00000004 0x00000000 0x00000043 0x00000004>;
gpio-controller;
#gpio-cells = <0x00000002>;
interrupt-controller;
#interrupt-cells = <0x00000002>;
#address-cells = <0x00000000>;
gpio-ranges = <0x00000010 0x00000000 0x00000005 0x0000001a>;
phandle = <0x00000051>;
};
gpio&commata0000 {
compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
reg = <0x020a0000 0x00004000>;
interrupts = <0x00000000 0x00000044 0x00000004 0x00000000 0x00000045 0x00000004>;
gpio-controller;
#gpio-cells = <0x00000002>;
interrupt-controller;
#interrupt-cells = <0x00000002>;
#address-cells = <0x00000000>;
gpio-ranges = <0x00000010 0x00000000 0x0000001f 0x00000014>;
phandle = <0x00000036>;
};
gpio&commata4000 {
compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
reg = <0x020a4000 0x00004000>;
interrupts = <0x00000000 0x00000046 0x00000004 0x00000000 0x00000047 0x00000004>;
gpio-controller;
#gpio-cells = <0x00000002>;
interrupt-controller;
#interrupt-cells = <0x00000002>;
#address-cells = <0x00000000>;
gpio-ranges = <0x00000010 0x00000000 0x00000033 0x0000001d>;
phandle = <0x00000052>;
};
gpio&commata8000 {
compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
reg = <0x020a8000 0x00004000>;
interrupts = <0x00000000 0x00000048 0x00000004 0x00000000 0x00000049 0x00000004>;
gpio-controller;
#gpio-cells = <0x00000002>;
interrupt-controller;
#interrupt-cells = <0x00000002>;
#address-cells = <0x00000000>;
gpio-ranges = <0x00000010 0x00000000 0x00000050 0x00000020>;
phandle = <0x00000053>;
};
gpio&commatac000 {
compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
reg = <0x020ac000 0x00004000>;
interrupts = <0x00000000 0x0000004a 0x00000004 0x00000000 0x0000004b 0x00000004>;
gpio-controller;
#gpio-cells = <0x00000002>;
interrupt-controller;
#interrupt-cells = <0x00000002>;
#address-cells = <0x00000000>;
gpio-ranges = <0x00000010 0x00000000 0x00000070 0x00000018>;
phandle = <0x0000002b>;
};
gpio&commatb0000 {
compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
reg = <0x020b0000 0x00004000>;
interrupts = <0x00000000 0x0000004c 0x00000004 0x00000000 0x0000004d 0x00000004>;
gpio-controller;
#gpio-cells = <0x00000002>;
interrupt-controller;
#interrupt-cells = <0x00000002>;
#address-cells = <0x00000000>;
gpio-ranges = <0x00000010 0x00000000 0x00000088 0x0000000c 0x00000010 0x0000000c 0x0000009e 0x0000000b>;
phandle = <0x00000028>;
};
gpio&commatb4000 {
compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
reg = <0x020b4000 0x00004000>;
interrupts = <0x00000000 0x0000004e 0x00000004 0x00000000 0x0000004f 0x00000004>;
gpio-controller;
#gpio-cells = <0x00000002>;
interrupt-controller;
#interrupt-cells = <0x00000002>;
#address-cells = <0x00000000>;
gpio-ranges = <0x00000010 0x00000000 0x00000094 0x0000000a 0x00000010 0x0000000a 0x000000a9 0x00000002>;
phandle = <0x00000035>;
};
keypad&commatb8000 {
compatible = "fsl,imx6sx-kpp", "fsl,imx21-kpp";
reg = <0x020b8000 0x00004000>;
interrupts = <0x00000000 0x00000052 0x00000004>;
clocks = <0x00000002 0x00000052>;
status = "disabled";
phandle = <0x00000054>;
};
watchdog&commatbc000 {
compatible = "fsl,imx6sx-wdt", "fsl,imx21-wdt";
reg = <0x020bc000 0x00004000>;
interrupts = <0x00000000 0x00000050 0x00000004>;
clocks = <0x00000002 0x00000052>;
phandle = <0x00000055>;
};
watchdog&commatc0000 {
compatible = "fsl,imx6sx-wdt", "fsl,imx21-wdt";
reg = <0x020c0000 0x00004000>;
interrupts = <0x00000000 0x00000051 0x00000004>;
clocks = <0x00000002 0x00000052>;
status = "disabled";
phandle = <0x00000056>;
};
clock-controller&commatc4000 {
compatible = "fsl,imx6sx-ccm";
reg = <0x020c4000 0x00004000>;
interrupts = <0x00000000 0x00000057 0x00000004 0x00000000 0x00000058 0x00000004>;
#clock-cells = <0x00000001>;
clocks = <0x00000011 0x00000012 0x00000013 0x00000014 0x00000015 0x00000016>;
clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "anaclk1", "anaclk2";
phandle = <0x00000002>;
};
anatop&commatc8000 {
compatible = "fsl,imx6sx-anatop", "fsl,imx6q-anatop", "syscon", "simple-mfd";
reg = <0x020c8000 0x00001000>;
interrupts = <0x00000000 0x00000031 0x00000004 0x00000000 0x00000036 0x00000004 0x00000000 0x0000007f 0x00000004>;
phandle = <0x00000017>;
regulator-1p1 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd1p1";
regulator-min-microvolt = <0x000f4240>;
regulator-max-microvolt = <0x00124f80>;
regulator-always-on;
anatop-reg-offset = <0x00000110>;
anatop-vol-bit-shift = <0x00000008>;
anatop-vol-bit-width = <0x00000005>;
anatop-min-bit-val = <0x00000004>;
anatop-min-voltage = <0x000c3500>;
anatop-max-voltage = <0x0014fb18>;
anatop-enable-bit = <0x00000000>;
phandle = <0x00000057>;
};
regulator-3p0 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd3p0";
regulator-min-microvolt = <0x002ab980>;
regulator-max-microvolt = <0x0030d400>;
regulator-always-on;
anatop-reg-offset = <0x00000120>;
anatop-vol-bit-shift = <0x00000008>;
anatop-vol-bit-width = <0x00000005>;
anatop-min-bit-val = <0x00000000>;
anatop-min-voltage = <0x00280de8>;
anatop-max-voltage = <0x0033e140>;
anatop-enable-bit = <0x00000000>;
phandle = <0x0000001a>;
};
regulator-2p5 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd2p5";
regulator-min-microvolt = <0x00225510>;
regulator-max-microvolt = <0x0029f630>;
regulator-always-on;
anatop-reg-offset = <0x00000130>;
anatop-vol-bit-shift = <0x00000008>;
anatop-vol-bit-width = <0x00000005>;
anatop-min-bit-val = <0x00000000>;
anatop-min-voltage = <0x00200b20>;
anatop-max-voltage = <0x002bde78>;
anatop-enable-bit = <0x00000000>;
phandle = <0x00000058>;
};
regulator-vddcore {
compatible = "fsl,anatop-regulator";
regulator-name = "vddarm";
regulator-min-microvolt = <0x000b1008>;
regulator-max-microvolt = <0x00162010>;
regulator-always-on;
anatop-reg-offset = <0x00000140>;
anatop-vol-bit-shift = <0x00000000>;
anatop-vol-bit-width = <0x00000005>;
anatop-delay-reg-offset = <0x00000170>;
anatop-delay-bit-shift = <0x00000018>;
anatop-delay-bit-width = <0x00000002>;
anatop-min-bit-val = <0x00000001>;
anatop-min-voltage = <0x000b1008>;
anatop-max-voltage = <0x00162010>;
phandle = <0x00000003>;
};
regulator-vddpcie {
compatible = "fsl,anatop-regulator";
regulator-name = "vddpcie";
regulator-min-microvolt = <0x000b1008>;
regulator-max-microvolt = <0x00162010>;
anatop-reg-offset = <0x00000140>;
anatop-vol-bit-shift = <0x00000009>;
anatop-vol-bit-width = <0x00000005>;
anatop-delay-reg-offset = <0x00000170>;
anatop-delay-bit-shift = <0x0000001a>;
anatop-delay-bit-width = <0x00000002>;
anatop-min-bit-val = <0x00000001>;
anatop-min-voltage = <0x000b1008>;
anatop-max-voltage = <0x00162010>;
phandle = <0x0000001c>;
};
regulator-vddsoc {
compatible = "fsl,anatop-regulator";
regulator-name = "vddsoc";
regulator-min-microvolt = <0x000b1008>;
regulator-max-microvolt = <0x00162010>;
regulator-always-on;
anatop-reg-offset = <0x00000140>;
anatop-vol-bit-shift = <0x00000012>;
anatop-vol-bit-width = <0x00000005>;
anatop-delay-reg-offset = <0x00000170>;
anatop-delay-bit-shift = <0x0000001c>;
anatop-delay-bit-width = <0x00000002>;
anatop-min-bit-val = <0x00000001>;
anatop-min-voltage = <0x000b1008>;
anatop-max-voltage = <0x00162010>;
phandle = <0x00000004>;
};
tempmon {
compatible = "fsl,imx6sx-tempmon", "fsl,imx6q-tempmon";
interrupt-parent = <0x00000007>;
interrupts = <0x00000000 0x00000031 0x00000004>;
fsl,tempmon = <0x00000017>;
nvmem-cells = <0x00000018 0x00000019>;
nvmem-cell-names = "calib", "temp_grade";
clocks = <0x00000002 0x00000006>;
phandle = <0x00000059>;
};
};
usbphy&commatc9000 {
compatible = "fsl,imx6sx-usbphy", "fsl,imx23-usbphy";
reg = <0x020c9000 0x00001000>;
interrupts = <0x00000000 0x0000002c 0x00000004>;
clocks = <0x00000002 0x0000000b>;
phy-3p0-supply = <0x0000001a>;
fsl,anatop = <0x00000017>;
phandle = <0x0000001e>;
};
usbphy&commatca000 {
compatible = "fsl,imx6sx-usbphy", "fsl,imx23-usbphy";
reg = <0x020ca000 0x00001000>;
interrupts = <0x00000000 0x0000002d 0x00000004>;
clocks = <0x00000002 0x0000000c>;
phy-3p0-supply = <0x0000001a>;
fsl,anatop = <0x00000017>;
phandle = <0x00000021>;
};
caam_secvio&commatb0400 {
compatible = "fsl,imx6q-caam-secvio";
interrupts = <0x00000000 0x00000014 0x00000004>;
jtag-tamper = "disabled";
watchdog-tamper = "enabled";
internal-boot-tamper = "enabled";
external-pin-tamper = "disabled";
reg = <0x021b0400 0x00000004>;
secvio_src = <0x8000001d>;
phandle = <0x0000005a>;
};
caam-snvs&commatcc000 {
compatible = "fsl,imx6q-caam-snvs";
reg = <0x020cc000 0x00004000>;
phandle = <0x0000005b>;
};
snvs&commatcc000 {
compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
reg = <0x020cc000 0x00004000>;
phandle = <0x0000001b>;
snvs-rtc-lp {
compatible = "fsl,sec-v4.0-mon-rtc-lp";
regmap = <0x0000001b>;
offset = <0x00000034>;
interrupts = <0x00000000 0x00000013 0x00000004 0x00000000 0x00000014 0x00000004>;
phandle = <0x0000005c>;
};
snvs-poweroff {
compatible = "syscon-poweroff";
regmap = <0x0000001b>;
offset = <0x00000038>;
value = <0x00000061>;
mask = <0x00000061>;
status = "disabled";
phandle = <0x0000005d>;
};
snvs-powerkey {
compatible = "fsl,sec-v4.0-pwrkey";
regmap = <0x0000001b>;
interrupts = <0x00000000 0x00000004 0x00000004>;
linux,keycode = <0x00000074>;
wakeup-source;
status = "disabled";
phandle = <0x0000005e>;
};
};
epit&commatd0000 {
reg = <0x020d0000 0x00004000>;
interrupts = <0x00000000 0x00000038 0x00000004>;
phandle = <0x0000005f>;
};
epit&commatd4000 {
reg = <0x020d4000 0x00004000>;
interrupts = <0x00000000 0x00000039 0x00000004>;
phandle = <0x00000060>;
};
reset-controller&commatd8000 {
compatible = "fsl,imx6sx-src", "fsl,imx51-src";
reg = <0x020d8000 0x00004000>;
interrupts = <0x00000000 0x0000005b 0x00000004 0x00000000 0x00000060 0x00000004>;
#reset-cells = <0x00000001>;
phandle = <0x00000061>;
};
gpc&commatdc000 {
compatible = "fsl,imx6sx-gpc", "fsl,imx6q-gpc";
reg = <0x020dc000 0x00004000>;
interrupt-controller;
#interrupt-cells = <0x00000003>;
#address-cells = <0x00000000>;
interrupts = <0x00000000 0x00000059 0x00000004>;
interrupt-parent = <0x0000000b>;
fsl,mf-mix-wakeup-irq = <0x07c00000 0x00003d00 0x00000000 0x00400240>;
clocks = <0x00000002 0x00000052>;
clock-names = "ipg";
pcie-phy-supply = <0x0000001c>;
fsl,cpu_pupscr_sw2iso = <0x0000000f>;
fsl,cpu_pupscr_sw = <0x0000000f>;
fsl,cpu_pdnscr_iso2sw = <0x00000001>;
fsl,cpu_pdnscr_iso = <0x00000001>;
fsl,wdog-reset = <0x00000001>;
phandle = <0x00000007>;
pgc {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
power-domain@0 {
reg = <0x00000000>;
#power-domain-cells = <0x00000000>;
power-supply = <0x00000004>;
};
power-domain@2 {
reg = <0x00000002>;
#power-domain-cells = <0x00000000>;
clocks = <0x00000002 0x000000aa 0x00000002 0x000000ad 0x00000002 0x000000af 0x00000002 0x000000a9 0x00000002 0x000000ae 0x00000002 0x0000009f 0x00000002 0x000000d7>;
phandle = <0x00000031>;
};
power-domain@3 {
reg = <0x00000003>;
#power-domain-cells = <0x00000000>;
power-supply = <0x0000001c>;
phandle = <0x00000032>;
};
};
};
pinctrl&commate0000 {
compatible = "fsl,imx6sx-iomuxc";
reg = <0x020e0000 0x00004000>;
pinctrl-names = "default";
pinctrl-0 = <0x0000001d>;
phandle = <0x00000010>;
enet1 {
enet1-mii-grp {
fsl,pins = <0x00000088 0x000003d0 0x00000764 0x00000000 0x00000001 0x0000b0e9 0x00000084 0x000003cc 0x00000000 0x00000000 0x00000000 0x0000b0e9 0x000001d0 0x00000518 0x00000000 0x00000000 0x00000000 0x000030c1 0x000001c0 0x00000508 0x00000000 0x00000000 0x00000000 0x000030c1 0x000001c4 0x0000050c 0x00000000 0x00000000 0x00000000 0x000030c1 0x000001c8 0x00000510 0x00000000 0x00000000 0x00000000 0x000030c1 0x000001cc 0x00000514 0x00000000 0x00000000 0x00000000 0x000030c1 0x000001d4 0x0000051c 0x00000000 0x00000001 0x00000000 0x000030c1 0x000001e8 0x00000530 0x00000000 0x00000000 0x00000000 0x0000b0e9 0x000001d8 0x00000520 0x00000000 0x00000000 0x00000000 0x0000b0e9 0x000001dc 0x00000524 0x00000000 0x00000000 0x00000000 0x0000b0e9 0x000001e0 0x00000528 0x00000000 0x00000000 0x00000000 0x0000b0e9 0x000001e4 0x0000052c 0x00000000 0x00000000 0x00000000 0x0000b0e9 0x000001ec 0x00000534 0x00000000 0x00000001 0x00000000 0x0000b0e9 0x0000007c 0x000003c4 0x00000000 0x00000000 0x00000000 0x0000b0e9 0x00000080 0x000003c8 0x00000000 0x00000000 0x00000000 0x0000b0e9 0x00000090 0x000003d8 0x00000000 0x00000000 0x00000000 0x0000b0e9 0x0000008c 0x000003d4 0x00000768 0x00000000 0x00000000 0x0000b0e9>;
phandle = <0x00000023>;
};
enet1-rgmii-grp {
fsl,pins = <0x00000088 0x000003d0 0x00000764 0x00000000 0x00000001 0x0001b0b0 0x00000084 0x000003cc 0x00000000 0x00000000 0x00000000 0x0001b0b0 0x000001d8 0x00000520 0x00000000 0x00000000 0x00000000 0x0000b0e9 0x000001dc 0x00000524 0x00000000 0x00000000 0x00000000 0x0000b0e9 0x000001e0 0x00000528 0x00000000 0x00000000 0x00000000 0x0000b0e9 0x000001e4 0x0000052c 0x00000000 0x00000000 0x00000000 0x0000b0e9 0x000001ec 0x00000534 0x00000000 0x00000000 0x00000000 0x0000b0e9 0x000001e8 0x00000530 0x00000000 0x00000000 0x00000000 0x0000b0e9 0x000001c0 0x00000508 0x00000000 0x00000000 0x00000000 0x000030c1 0x000001c4 0x0000050c 0x00000000 0x00000000 0x00000000 0x000030c1 0x000001d0 0x00000518 0x00000000 0x00000000 0x00000000 0x000030c1 0x000001c8 0x00000510 0x00000000 0x00000000 0x00000000 0x000030c1 0x000001cc 0x00000514 0x00000000 0x00000000 0x00000000 0x000030c1 0x000001d4 0x0000051c 0x00000768 0x00000000 0x00000001 0x000030c1 0x00000080 0x000003c8 0x00000000 0x00000005 0x00000000 0x0000b0b0 0x0000008c 0x000003d4 0x00000000 0x00000005 0x00000000 0x0000b0b0 0x00000090 0x000003d8 0x00000000 0x00000005 0x00000000 0x0000b0b0>;
phandle = <0x00000062>;
};
};
gpmi-nand {
gpmi-nand-1 {
fsl,pins = <0x0000014c 0x00000494 0x00000000 0x00000000 0x00000000 0x0000b0b1 0x00000140 0x00000488 0x00000000 0x00000000 0x00000000 0x0000b0b1 0x0000017c 0x000004c4 0x00000000 0x00000000 0x00000000 0x0000b0b1 0x00000174 0x000004bc 0x00000000 0x00000000 0x00000000 0x0000b000 0x00000144 0x0000048c 0x00000000 0x00000000 0x00000000 0x0000b0b1 0x00000148 0x00000490 0x00000000 0x00000000 0x00000000 0x0000b0b1 0x00000170 0x000004b8 0x00000000 0x00000000 0x00000000 0x0000b0b1 0x00000178 0x000004c0 0x00000000 0x00000000 0x00000000 0x0000b0b1 0x00000150 0x00000498 0x00000000 0x00000000 0x00000000 0x0000b0b1 0x00000154 0x0000049c 0x00000000 0x00000000 0x00000000 0x0000b0b1 0x00000158 0x000004a0 0x00000000 0x00000000 0x00000000 0x0000b0b1 0x0000015c 0x000004a4 0x00000000 0x00000000 0x00000000 0x0000b0b1 0x00000160 0x000004a8 0x00000000 0x00000000 0x00000000 0x0000b0b1 0x00000164 0x000004ac 0x00000000 0x00000000 0x00000000 0x0000b0b1 0x00000168 0x000004b0 0x00000000 0x00000000 0x00000000 0x0000b0b1 0x0000016c 0x000004b4 0x00000000 0x00000000 0x00000000 0x0000b0b1>;
phandle = <0x0000000d>;
};
};
i2c1 {
i2c1grp {
fsl,pins = <0x00000018 0x00000360 0x000007ac 0x00000000 0x00000001 0x4001b8b1 0x00000014 0x0000035c 0x000007a8 0x00000000 0x00000001 0x4001b8b1>;
phandle = <0x00000029>;
};
};
i2c2 {
i2c2grp {
fsl,pins = <0x00000020 0x00000368 0x000007b4 0x00000000 0x00000001 0x4001b8b1 0x0000001c 0x00000364 0x000007b0 0x00000000 0x00000001 0x4001b8b1>;
phandle = <0x0000002a>;
};
};
i2c3 {
i2c3grp {
fsl,pins = <0x000000c8 0x00000410 0x000007bc 0x00000002 0x00000002 0x4001b8b1 0x000000b4 0x000003fc 0x000007b8 0x00000002 0x00000002 0x4001b8b1>;
phandle = <0x00000063>;
};
};
i2c4 {
i2c4grp {
fsl,pins = <0x0000025c 0x000005a4 0x000007c4 0x00000001 0x00000000 0x4001b8b1 0x00000258 0x000005a0 0x000007c0 0x00000001 0x00000000 0x4001b8b1>;
phandle = <0x00000030>;
};
};
ecspi4 {
ecspi4 {
fsl,pins = <0x00000248 0x00000590 0x0000074c 0x00000003 0x00000001 0x000070f1 0x00000238 0x00000580 0x00000740 0x00000003 0x00000001 0x000070f1 0x0000023c 0x00000584 0x00000748 0x00000003 0x00000001 0x000070f1 0x0000024c 0x00000594 0x00000744 0x00000003 0x00000001 0x000070f1>;
phandle = <0x00000064>;
};
};
sound {
soundgrp {
fsl,pins = <0x00000040 0x00000388 0x00000000 0x00000003 0x00000000 0x000000b0>;
phandle = <0x00000065>;
};
};
esai {
esaigrp {
fsl,pins = <0x00000188 0x000004d0 0x0000078c 0x00000003 0x00000002 0x0001b030 0x0000018c 0x000004d4 0x00000790 0x00000003 0x00000002 0x00011088 0x000001a8 0x000004f0 0x000007a4 0x00000003 0x00000002 0x00011088 0x000001ac 0x000004f4 0x0000077c 0x00000003 0x00000002 0x0001b030>;
phandle = <0x00000066>;
};
};
spdif {
spdifgrp {
fsl,pins = <0x00000044 0x0000038c 0x00000000 0x00000001 0x00000000 0x0001b0b0 0x00000294 0x000005dc 0x00000824 0x00000006 0x00000000 0x0001b0b0 0x00000014 0x0000035c 0x00000000 0x00000002 0x00000000 0x0001b0b0 0x00000018 0x00000360 0x00000000 0x00000002 0x00000000 0x0001b0b0 0x0000003c 0x00000384 0x00000828 0x00000001 0x00000000 0x0001b0b0>;
phandle = <0x00000067>;
};
};
uart1 {
uart1grp {
fsl,pins = <0x00000094 0x000003dc 0x00000830 0x00000003 0x00000002 0x0001b0b1 0x00000098 0x000003e0 0x00000000 0x00000003 0x00000000 0x0001b0b1 0x0000009c 0x000003e4 0x0000082c 0x00000003 0x00000002 0x0001b0b1 0x000000a0 0x000003e8 0x00000000 0x00000003 0x00000000 0x0001b0b1>;
phandle = <0x0000000f>;
};
};
uart2 {
uart2grp {
fsl,pins = <0x00000030 0x00000378 0x00000838 0x00000000 0x00000001 0x0001b0b1 0x0000002c 0x00000374 0x00000000 0x00000000 0x00000000 0x0001b0b1 0x00000034 0x0000037c 0x00000834 0x00000004 0x00000000 0x0001b0b1 0x00000038 0x00000380 0x00000000 0x00000004 0x00000000 0x0001b0b1>;
phandle = <0x0000002c>;
};
};
usdhc4 {
usdhc4grp {
fsl,pins = <0x0000027c 0x000005c4 0x00000000 0x00000000 0x00000000 0x00017059 0x00000278 0x000005c0 0x00000000 0x00000000 0x00000000 0x00010059 0x00000280 0x000005c8 0x00000000 0x00000000 0x00000000 0x00017059 0x00000284 0x000005cc 0x00000000 0x00000000 0x00000000 0x00017059 0x00000288 0x000005d0 0x00000000 0x00000000 0x00000000 0x00017059 0x0000028c 0x000005d4 0x00000000 0x00000000 0x00000000 0x00017059 0x00000298 0x000005e0 0x00000878 0x00000006 0x00000000 0x00017059 0x0000029c 0x000005e4 0x00000000 0x00000005 0x00000000 0x00017059>;
phandle = <0x00000026>;
};
};
hog {
hoggrp {
fsl,pins = <0x00000204 0x0000054c 0x00000000 0x00000005 0x00000000 0x00017000 0x0000020c 0x00000554 0x00000000 0x00000005 0x00000000 0x00000030 0x000001bc 0x00000504 0x00000000 0x00000005 0x00000000 0x00010000 0x00000214 0x0000055c 0x00000000 0x00000005 0x00000000 0x0001b000 0x0000021c 0x00000564 0x00000000 0x00000005 0x00000000 0x0001b000 0x000000a4 0x000003ec 0x00000000 0x00000005 0x00000000 0x00000030 0x000000a8 0x000003f0 0x00000000 0x00000005 0x00000000 0x00000030 0x00000264 0x000005ac 0x00000000 0x00000005 0x00000000 0x00000030 0x000000ac 0x000003f4 0x00000000 0x00000005 0x00000000 0x00010000 0x000000b0 0x000003f8 0x00000000 0x00000005 0x00000000 0x00010000>;
phandle = <0x0000001d>;
};
};
uart3 {
uart3grp {
fsl,pins = <0x00000268 0x000005b0 0x00000840 0x00000003 0x00000002 0x0001b0b1 0x0000026c 0x000005b4 0x00000000 0x00000003 0x00000000 0x0001b0b1 0x00000270 0x000005b8 0x0000083c 0x00000003 0x00000002 0x0001b0b1 0x00000274 0x000005bc 0x00000000 0x00000003 0x00000000 0x0001b0b1>;
phandle = <0x0000002e>;
};
};
uart4 {
uart4grp {
fsl,pins = <0x00000240 0x00000588 0x00000848 0x00000007 0x00000004 0x0001b0b1 0x00000244 0x0000058c 0x00000000 0x00000007 0x00000000 0x0001b0b1 0x00000260 0x000005a8 0x00000844 0x00000001 0x00000001 0x0001b0b1 0x00000250 0x00000598 0x00000000 0x00000001 0x00000000 0x0001b0b1>;
phandle = <0x0000002f>;
};
};
};
iomuxc-gpr&commate4000 {
compatible = "fsl,imx6sx-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon";
reg = <0x020e4000 0x00004000>;
phandle = <0x00000006>;
};
ldb&commate0014 {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
reg = <0x020e0014 0x00004000>;
compatible = "fsl,imx6sx-ldb", "fsl,imx53-ldb";
gpr = <0x00000006>;
status = "disabled";
clocks = <0x00000002 0x000000b0 0x00000002 0x00000049 0x00000002 0x0000004a 0x00000002 0x00000076 0x00000002 0x00000077 0x00000002 0x00000039>;
clock-names = "ldb_di0", "di0_sel", "di1_sel", "ldb_di0_div_3_5", "ldb_di0_div_7", "ldb_di0_div_sel";
phandle = <0x00000068>;
lvds-channel@0 {
reg = <0x00000000>;
status = "disabled";
};
};
sdma&commatec000 {
compatible = "fsl,imx6sx-sdma", "fsl,imx6q-sdma";
reg = <0x020ec000 0x00004000>;
interrupts = <0x00000000 0x00000002 0x00000004>;
clocks = <0x00000002 0x00000052 0x00000002 0x000000c3>;
clock-names = "ipg", "ahb";
#dma-cells = <0x00000003>;
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
iram = <0x00000009>;
phandle = <0x0000000e>;
};
};
bus&commat00000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
reg = <0x02100000 0x00100000>;
ranges;
phandle = <0x00000069>;
crypto&commat00000 {
compatible = "fsl,sec-v4.0";
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
reg = <0x02100000 0x00040000>;
ranges = <0x00000000 0x02100000 0x00040000>;
interrupt-parent = <0x0000000b>;
clocks = <0x00000002 0x00000086 0x00000002 0x00000087 0x00000002 0x00000088 0x00000002 0x000000d5>;
clock-names = "mem", "aclk", "ipg", "emi_slow";
phandle = <0x0000006a>;
ctrl@0 {
compatible = "fsl,sec-v4.0-ctrl";
reg = <0x02100000 0x00001000>;
secure-status = "okay";
status = "disabled";
phandle = <0x0000006b>;
};
jr&commat00 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x00001000 0x00001000>;
interrupts = <0x00000000 0x00000069 0x00000004>;
phandle = <0x0000006c>;
};
jr&commat00 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x00002000 0x00001000>;
interrupts = <0x00000000 0x0000006a 0x00000004>;
phandle = <0x0000006d>;
};
};
usb&commat84000 {
compatible = "fsl,imx6sx-usb", "fsl,imx27-usb";
reg = <0x02184000 0x00000200>;
interrupts = <0x00000000 0x0000002b 0x00000004>;
clocks = <0x00000002 0x000000d0>;
fsl,usbphy = <0x0000001e>;
fsl,usbmisc = <0x0000001f 0x00000000>;
fsl,anatop = <0x00000017>;
ahb-burst-config = <0x00000000>;
tx-burst-size-dword = <0x00000010>;
rx-burst-size-dword = <0x00000010>;
status = "okay";
vbus-supply = <0x00000020>;
pinctrl-names = "default";
dr_mode = "host";
phandle = <0x0000006e>;
};
usb&commat84200 {
compatible = "fsl,imx6sx-usb", "fsl,imx27-usb";
reg = <0x02184200 0x00000200>;
interrupts = <0x00000000 0x0000002a 0x00000004>;
clocks = <0x00000002 0x000000d0>;
fsl,usbphy = <0x00000021>;
fsl,usbmisc = <0x0000001f 0x00000001>;
ahb-burst-config = <0x00000000>;
tx-burst-size-dword = <0x00000010>;
rx-burst-size-dword = <0x00000010>;
status = "disabled";
phandle = <0x0000006f>;
};
usb&commat84400 {
compatible = "fsl,imx6sx-usb", "fsl,imx27-usb";
reg = <0x02184400 0x00000200>;
interrupts = <0x00000000 0x00000028 0x00000004>;
clocks = <0x00000002 0x000000d0>;
fsl,usbphy = <0x00000022>;
fsl,usbmisc = <0x0000001f 0x00000002>;
phy_type = "hsic";
fsl,anatop = <0x00000017>;
dr_mode = "host";
ahb-burst-config = <0x00000000>;
tx-burst-size-dword = <0x00000010>;
rx-burst-size-dword = <0x00000010>;
status = "disabled";
phandle = <0x00000070>;
};
usbmisc&commat84800 {
#index-cells = <0x00000001>;
compatible = "fsl,imx6sx-usbmisc", "fsl,imx6q-usbmisc";
reg = <0x02184800 0x00000200>;
clocks = <0x00000002 0x000000d0>;
phandle = <0x0000001f>;
};
ethernet&commat88000 {
compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec";
reg = <0x02188000 0x00004000>;
interrupt-names = "int0", "pps";
interrupts = <0x00000000 0x00000076 0x00000004 0x00000000 0x00000077 0x00000004>;
clocks = <0x00000002 0x000000ac 0x00000002 0x000000e1 0x00000002 0x000000e4 0x00000002 0x00000011 0x00000002 0x000000e4>;
clock-names = "ipg", "ahb", "ptp", "enet_clk_ref", "enet_out";
fsl,num-tx-queues = <0x00000003>;
fsl,num-rx-queues = <0x00000003>;
fsl,stop-mode = <0x00000006 0x00000010 0x00000003>;
fsl,wakeup_irq = <0x00000000>;
status = "okay";
local-mac-address = [00 40 8c cd 00 00];
pinctrl-names = "default";
pinctrl-0 = <0x00000023>;
phy-mode = "mii";
fsl,num_tx_queues = <0x00000003>;
fsl,num_rx_queues = <0x00000003>;
phy-supply = <0x00000024>;
phy-handle = <0x00000025>;
phandle = <0x00000071>;
mdio {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x00000001>;
phandle = <0x00000025>;
};
};
};
mlb&commat8c000 {
compatible = "fsl,imx6sx-mlb50";
reg = <0x0218c000 0x00004000>;
interrupts = <0x00000000 0x00000035 0x00000004 0x00000000 0x00000075 0x00000004 0x00000000 0x0000007e 0x00000004>;
clocks = <0x00000002 0x000000b2>;
clock-names = "mlb";
iram = <0x00000009>;
status = "disabled";
phandle = <0x00000072>;
};
mmc&commat90000 {
compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";
reg = <0x02190000 0x00004000>;
interrupts = <0x00000000 0x00000016 0x00000004>;
clocks = <0x00000002 0x000000d1 0x00000002 0x000000d1 0x00000002 0x000000d1>;
clock-names = "ipg", "ahb", "per";
bus-width = <0x00000004>;
fsl,tuning-start-tap = <0x00000014>;
fsl,tuning-step = <0x00000002>;
voltage-ranges = <0x00000ce4 0x00000ce4>;
status = "disabled";
phandle = <0x00000073>;
};
mmc&commat94000 {
compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";
reg = <0x02194000 0x00004000>;
interrupts = <0x00000000 0x00000017 0x00000004>;
clocks = <0x00000002 0x000000d2 0x00000002 0x000000d2 0x00000002 0x000000d2>;
clock-names = "ipg", "ahb", "per";
bus-width = <0x00000004>;
fsl,tuning-start-tap = <0x00000014>;
fsl,tuning-step = <0x00000002>;
voltage-ranges = <0x00000ce4 0x00000ce4>;
status = "disabled";
phandle = <0x00000074>;
};
mmc&commat98000 {
compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";
reg = <0x02198000 0x00004000>;
interrupts = <0x00000000 0x00000018 0x00000004>;
clocks = <0x00000002 0x000000d3 0x00000002 0x000000d3 0x00000002 0x000000d3>;
clock-names = "ipg", "ahb", "per";
bus-width = <0x00000004>;
fsl,tuning-start-tap = <0x00000014>;
fsl,tuning-step = <0x00000002>;
voltage-ranges = <0x00000ce4 0x00000ce4>;
status = "disabled";
phandle = <0x00000075>;
};
mmc&commat9c000 {
compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";
reg = <0x0219c000 0x00004000>;
interrupts = <0x00000000 0x00000019 0x00000004>;
clocks = <0x00000002 0x000000d4 0x00000002 0x000000d4 0x00000002 0x000000d4>;
clock-names = "ipg", "ahb", "per";
bus-width = <0x00000004>;
fsl,tuning-start-tap = <0x00000014>;
fsl,tuning-step = <0x00000002>;
voltage-ranges = <0x00000ce4 0x00000ce4>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x00000026>;
no-1-8-v;
vmmc-supply = <0x00000027>;
vqmmc-supply = <0x00000027>;
cd-gpios = <0x00000028 0x00000015 0x00000001>;
wp-gpios = <0x00000028 0x00000014 0x00000001>;
wakeup-source;
phandle = <0x00000076>;
};
i2c&commata0000 {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
reg = <0x021a0000 0x00004000>;
interrupts = <0x00000000 0x00000024 0x00000004>;
clocks = <0x00000002 0x000000a0>;
status = "okay";
clock-frequency = <0x000186a0>;
pinctrl-names = "default";
pinctrl-0 = <0x00000029>;
phandle = <0x00000077>;
rtc&commat {
compatible = "epson,rx8900";
reg = <0x00000032>;
epson,vdet-disable;
trickle-diode-disable;
status = "okay";
};
};
i2c&commata4000 {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
reg = <0x021a4000 0x00004000>;
interrupts = <0x00000000 0x00000025 0x00000004>;
clocks = <0x00000002 0x000000a1>;
status = "okay";
clock-frequency = <0x000186a0>;
pinctrl-names = "default";
pinctrl-0 = <0x0000002a>;
phandle = <0x00000078>;
accel&commat {
compatible = "axis,lis3dh";
reg = <0x00000018>;
irq = <0x0000002b 0x00000015 0x00000001>;
status = "okay";
enable_highpass_filter;
disable_high_resolution;
enable_long_duration;
};
};
i2c&commata8000 {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
reg = <0x021a8000 0x00004000>;
interrupts = <0x00000000 0x00000026 0x00000004>;
clocks = <0x00000002 0x000000a2>;
status = "disabled";
phandle = <0x00000079>;
};
memory-controller&commatb0000 {
compatible = "fsl,imx6sx-mmdc", "fsl,imx6q-mmdc";
reg = <0x021b0000 0x00004000>;
clocks = <0x00000002 0x000000b4>;
};
ethernet&commatb4000 {
compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec";
reg = <0x021b4000 0x00004000>;
interrupt-names = "int0", "pps";
interrupts = <0x00000000 0x00000066 0x00000004 0x00000000 0x00000067 0x00000004>;
clocks = <0x00000002 0x000000ac 0x00000002 0x000000e1 0x00000002 0x000000e4 0x00000002 0x000000e7 0x00000002 0x000000e4>;
clock-names = "ipg", "ahb", "ptp", "enet_clk_ref", "enet_out";
fsl,stop-mode = <0x00000006 0x00000010 0x00000004>;
fsl,num-tx-queues = <0x00000003>;
fsl,num-rx-queues = <0x00000003>;
stop-mode = <0x00000006 0x00000010 0x00000004>;
fsl,wakeup_irq = <0x00000000>;
status = "disabled";
local-mac-address = [00 40 8c cd 00 00];
phandle = <0x0000007a>;
};
weim&commatb8000 {
#address-cells = <0x00000002>;
#size-cells = <0x00000001>;
compatible = "fsl,imx6sx-weim", "fsl,imx6q-weim";
reg = <0x021b8000 0x00004000>;
interrupts = <0x00000000 0x0000000e 0x00000004>;
clocks = <0x00000002 0x000000d5>;
fsl,weim-cs-gpr = <0x00000006>;
status = "disabled";
phandle = <0x0000007b>;
};
efuse&commatbc000 {
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
compatible = "fsl,imx6sx-ocotp", "syscon";
reg = <0x021bc000 0x00004000>;
clocks = <0x00000002 0x000000a3>;
read-only;
phandle = <0x0000007c>;
speed-grade&commat {
reg = <0x00000010 0x00000004>;
phandle = <0x00000005>;
};
calib&commat {
reg = <0x00000038 0x00000004>;
phandle = <0x00000018>;
};
temp-grade&commat {
reg = <0x00000020 0x00000004>;
phandle = <0x00000019>;
};
};
romcp&commatac000 {
compatible = "fsl,imx6sx-romcp", "syscon";
reg = <0x021ac000 0x00004000>;
};
sai&commatd4000 {
compatible = "fsl,imx6sx-sai";
reg = <0x021d4000 0x00004000>;
interrupts = <0x00000000 0x00000061 0x00000004>;
clocks = <0x00000002 0x000000ed 0x00000002 0x000000ce 0x00000002 0x00000000 0x00000002 0x00000000>;
clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
dma-names = "rx", "tx";
dmas = <0x0000000e 0x0000001f 0x00000018 0x00000000 0x0000000e 0x00000020 0x00000018 0x00000000>;
status = "disabled";
phandle = <0x0000007d>;
};
audmux&commatd8000 {
compatible = "fsl,imx6sx-audmux", "fsl,imx31-audmux";
reg = <0x021d8000 0x00004000>;
status = "disabled";
phandle = <0x0000007e>;
};
sai&commatdc000 {
compatible = "fsl,imx6sx-sai";
reg = <0x021dc000 0x00004000>;
interrupts = <0x00000000 0x00000062 0x00000004>;
clocks = <0x00000002 0x000000ee 0x00000002 0x000000cf 0x00000002 0x00000000 0x00000002 0x00000000>;
clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
dma-names = "rx", "tx";
dmas = <0x0000000e 0x00000021 0x00000018 0x00000000 0x0000000e 0x00000022 0x00000018 0x00000000>;
status = "disabled";
phandle = <0x0000007f>;
};
spi&commate0000 {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
compatible = "fsl,imx6sx-qspi";
reg = <0x021e0000 0x00004000 0x60000000 0x10000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
interrupts = <0x00000000 0x0000006b 0x00000004>;
clocks = <0x00000002 0x000000b1 0x00000002 0x000000b1>;
clock-names = "qspi_en", "qspi";
status = "disabled";
phandle = <0x00000080>;
};
spi&commate4000 {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
compatible = "fsl,imx6sx-qspi";
reg = <0x021e4000 0x00004000 0x70000000 0x10000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
interrupts = <0x00000000 0x0000006d 0x00000004>;
clocks = <0x00000002 0x000000b7 0x00000002 0x000000b7>;
clock-names = "qspi_en", "qspi";
status = "disabled";
phandle = <0x00000081>;
};
qspi-m4&commate4000 {
compatible = "fsl,imx6sx-qspi-m4-restore";
reg = <0x021e4000 0x00004000>;
status = "disabled";
phandle = <0x00000082>;
};
serial&commate8000 {
compatible = "fsl,imx6sx-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021e8000 0x00004000>;
interrupts = <0x00000000 0x0000001b 0x00000004>;
clocks = <0x00000002 0x000000cc 0x00000002 0x000000cd>;
clock-names = "ipg", "per";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x0000002c>;
phandle = <0x00000083>;
fcd16999 {
compatible = "axis,fcd16999";
interrupt-controller;
#interrupt-cells = <0x00000001>;
#address-cells = <0x00000000>;
fcd16999-gpio {
compatible = "axis,fcd16999-gpio";
gpio-controller;
#gpio-cells = <0x00000002>;
ngpio = <0x00000073>;
interrupts = <0x00000000>;
gpio-line-names = "SUP_ADC_AUX_IO_1", "SUP_ADC_AUX_IO_2", "SUP_ADC_AUX_IO_3", "SUP_ADC_AUX_IO_4", "SUP_ADC_DOOR1_IO_1", "SUP_ADC_DOOR1_IO_2", "SUP_ADC_DOOR2_IO_1", "SUP_ADC_DOOR2_IO_2", "PU_READER_1_IO_1", "CPU_RXD", "CPU_TXD", "CPU_RTS", "CPU_CTS", "SWDIO", "SWDCLK", "PU_READER_1_IO_2", "SUP_ADC_FIRE_IO_1", "SUP_ADC_FIRE_IO_2", "PD_READER_1_IO_1", "DC_AVAILABLE", "PD_READER_1_IO_2", "I2C1_SCL", "I2C1_SDA", "PU_FIRE_IO_1", "PD_FIRE_IO_1", "PU_FIRE_IO_2", "PD_FIRE_IO_2", "SPI2_SS", "SPI2_SCK", "SPI2_MISO", "SPI2_MOSI", "SUP_ADC_READER_1_IO_1", "SUP_ADC_READER_1_IO_2", "SUP_ADC_READER_2_IO_1", "SUP_ADC_READER_2_IO_2", "CURR_MON_DC", "BAT_V_LEVEL", "WIEGAND1_D0", "WIEGAND1_D1", "WIEGAND2_D0", "WIEGAND2_D1", "C10", "C11", "PU_READER_2_IO_1", "PU_READER_2_IO_2", "PD_READER_2_IO_1", "PD_READER_2_IO_2", "POE_AVAIL", "D2", "USB1_PWREN", "D4", "D5", "D6", "POE_AF", "RS485_1_WIEGAND_ON", "RS485_2_WIEGAND_ON", "RS485_2_PUPD", "RS485_2_TERM", "RS485_2_CTRL1", "RS485_2_CTRL2", "EN_POE", "CURR_MON_BATT", "SUP_DIGIN_AUX_IO_1", "SUP_DIGIN_AUX_IO_2", "SUP_DIGIN_AUX_IO_3", "SUP_DIGIN_AUX_IO_4", "SUP_DIGIN_DOOR1_IO_1", "SUP_DIGIN_DOOR1_IO_2", "SUP_DIGIN_DOOR2_IO_1", "SUP_DIGIN_DOOR2_IO_2", "SUP_DIGIN_FIRE_IO_1", "SUP_DIGIN_FIRE_IO_2", "SUP_DIGIN_READER1_IO_1", "SUP_DIGIN_READER1_IO_2", "SUP_DIGIN_READER2_IO_1", "SUP_DIGIN_READER2_IO_2", "TAMPERING", "GPIO_EXPANDER_01_INT", "CRS_SYNC", "RS485_1_PUPD", "RS485_1_TERM", "RS485_1_CTRL1", "RS485_1_CTRL2", "FAULT_LOCK", "FAULT_READ", "FAULT_DC", "FAULT_BATT", "EN_12V_LOCK", "EN_READER", "EN_24V", "BATT_PGOOD", "RELAY_1", "RELAY_2", "READER_C2", "READER_C1", "READER_1_OUTPUT_1", "READER_1_OUTPUT_2", "READER_2_OUTPUT_1", "READER_2_OUTPUT_2", "PU_DOOR_1_IO_1", "PU_DOOR_1_IO_2", "PD_DOOR_1_IO_1", "PD_DOOR_1_IO_2", "PD_DOOR_2_IO_1", "PU_DOOR_2_IO_1", "PD_DOOR_2_IO_2", "PU_DOOR_2_IO_2", "PD_AUX_IO_1", "PU_AUX_IO_1", "PD_AUX_IO_2", "PU_AUX_IO_2", "PD_AUX_IO_3", "PU_AUX_IO_3", "PD_AUX_IO_4", "PU_AUX_IO_4";
phandle = <0x0000002d>;
mcu-pinmap {
A0 {
offset = <0x00000000>;
};
A1 {
offset = <0x00000001>;
};
A2 {
offset = <0x00000002>;
};
A3 {
offset = <0x00000003>;
};
A4 {
offset = <0x00000004>;
};
A5 {
offset = <0x00000005>;
};
A6 {
offset = <0x00000006>;
};
A7 {
offset = <0x00000007>;
};
A8 {
offset = <0x00000008>;
};
A9 {
offset = <0x00000009>;
};
A10 {
offset = <0x0000000a>;
};
A11 {
offset = <0x0000000b>;
};
A12 {
offset = <0x0000000c>;
};
A13 {
offset = <0x0000000d>;
};
A14 {
offset = <0x0000000e>;
};
A15 {
offset = <0x0000000f>;
};
B0 {
offset = <0x00000010>;
};
B1 {
offset = <0x00000011>;
};
B2 {
offset = <0x00000012>;
};
B4 {
offset = <0x00000013>;
};
B5 {
offset = <0x00000014>;
};
B6 {
offset = <0x00000015>;
};
B7 {
offset = <0x00000016>;
};
B8 {
offset = <0x00000017>;
};
B9 {
offset = <0x00000018>;
};
B10 {
offset = <0x00000019>;
};
B11 {
offset = <0x0000001a>;
};
B12 {
offset = <0x0000001b>;
};
B13 {
offset = <0x0000001c>;
};
B14 {
offset = <0x0000001d>;
};
B15 {
offset = <0x0000001e>;
};
C0 {
offset = <0x0000001f>;
};
C1 {
offset = <0x00000020>;
};
C2 {
offset = <0x00000021>;
};
C3 {
offset = <0x00000022>;
};
C4 {
offset = <0x00000023>;
};
C5 {
offset = <0x00000024>;
};
C6 {
offset = <0x00000025>;
};
C7 {
offset = <0x00000026>;
};
C8 {
offset = <0x00000027>;
};
C9 {
offset = <0x00000028>;
};
C10 {
offset = <0x00000029>;
};
C11 {
offset = <0x0000002a>;
};
C12 {
offset = <0x0000002b>;
};
C13 {
offset = <0x0000002c>;
};
C14 {
offset = <0x0000002d>;
};
C15 {
offset = <0x0000002e>;
};
D1 {
offset = <0x0000002f>;
};
D2 {
offset = <0x00000030>;
};
D3 {
offset = <0x00000031>;
};
D4 {
offset = <0x00000032>;
};
D5 {
offset = <0x00000033>;
};
D6 {
offset = <0x00000034>;
};
D7 {
offset = <0x00000035>;
};
D8 {
offset = <0x00000036>;
};
D9 {
offset = <0x00000037>;
};
D10 {
offset = <0x00000038>;
};
D11 {
offset = <0x00000039>;
};
D12 {
offset = <0x0000003a>;
};
D13 {
offset = <0x0000003b>;
};
D14 {
offset = <0x0000003c>;
};
D15 {
offset = <0x0000003d>;
};
E0 {
offset = <0x0000003e>;
};
E1 {
offset = <0x0000003f>;
};
E2 {
offset = <0x00000040>;
};
E3 {
offset = <0x00000041>;
};
E4 {
offset = <0x00000042>;
};
E5 {
offset = <0x00000043>;
};
E6 {
offset = <0x00000044>;
};
E7 {
offset = <0x00000045>;
};
E8 {
offset = <0x00000046>;
};
E9 {
offset = <0x00000047>;
};
E10 {
offset = <0x00000048>;
};
E11 {
offset = <0x00000049>;
};
E12 {
offset = <0x0000004a>;
};
E13 {
offset = <0x0000004b>;
};
E14 {
offset = <0x0000004c>;
};
E15 {
offset = <0x0000004d>;
};
F0 {
offset = <0x0000004e>;
};
F1 {
offset = <0x0000004f>;
};
F2 {
offset = <0x00000050>;
};
F3 {
offset = <0x00000051>;
};
F6 {
offset = <0x00000052>;
};
X0 {
offset = <0x00000053>;
};
X1 {
offset = <0x00000054>;
};
X2 {
offset = <0x00000055>;
};
X3 {
offset = <0x00000056>;
};
X4 {
offset = <0x00000057>;
};
X5 {
offset = <0x00000058>;
};
X6 {
offset = <0x00000059>;
};
X7 {
offset = <0x0000005a>;
};
X10 {
offset = <0x0000005b>;
};
X11 {
offset = <0x0000005c>;
};
X12 {
offset = <0x0000005d>;
};
X13 {
offset = <0x0000005e>;
};
X14 {
offset = <0x0000005f>;
};
X15 {
offset = <0x00000060>;
};
X16 {
offset = <0x00000061>;
};
X17 {
offset = <0x00000062>;
};
Y0 {
offset = <0x00000063>;
};
Y1 {
offset = <0x00000064>;
};
Y2 {
offset = <0x00000065>;
};
Y3 {
offset = <0x00000066>;
};
Y4 {
offset = <0x00000067>;
};
Y5 {
offset = <0x00000068>;
};
Y6 {
offset = <0x00000069>;
};
Y7 {
offset = <0x0000006a>;
};
Y10 {
offset = <0x0000006b>;
};
Y11 {
offset = <0x0000006c>;
};
Y12 {
offset = <0x0000006d>;
};
Y13 {
offset = <0x0000006e>;
};
Y14 {
offset = <0x0000006f>;
};
Y15 {
offset = <0x00000070>;
};
Y16 {
offset = <0x00000071>;
};
Y17 {
offset = <0x00000072>;
};
};
};
fcd16999-adc {
compatible = "axis,fcd16999-adc";
interrupts = <0x00000001>;
#io-channel-cells = <0x00000001>;
phandle = <0x00000034>;
chan_0 {
label = "SUP_ADC_AUX_IO_1";
pin = "PA0";
};
chan_1 {
label = "SUP_ADC_AUX_IO_2";
pin = "PA1";
};
chan_2 {
label = "SUP_ADC_AUX_IO_3";
pin = "PA2";
};
chan_3 {
label = "SUP_ADC_AUX_IO_4";
pin = "PA3";
};
chan_4 {
label = "SUP_ADC_DOOR1_IO_1";
pin = "PA4";
};
chan_5 {
label = "SUP_ADC_DOOR1_IO_2";
pin = "PA5";
};
chan_6 {
label = "SUP_ADC_DOOR2_IO_1";
pin = "PA6";
};
chan_7 {
label = "SUP_ADC_DOOR2_IO_2";
pin = "PA7";
};
chan_8 {
label = "SUP_ADC_FIRE_IO_1";
pin = "PB0";
};
chan_9 {
label = "SUP_ADC_FIRE_IO_2";
pin = "PB1";
};
chan_10 {
label = "SUP_ADC_READER1_IO_1";
pin = "PC0";
};
chan_11 {
label = "SUP_ADC_READER1_IO_2";
pin = "PC1";
};
chan_12 {
label = "SUP_ADC_READER2_IO_1";
pin = "PC2";
};
chan_13 {
label = "SUP_ADC_READER2_IO_2";
pin = "PC3";
};
chan_14 {
label = "CURR_MON_DC";
pin = "PC4";
};
chan_15 {
label = "BAT_V_LEVEL";
pin = "PC5";
};
chan_16 {
label = "CHIP_TEMPERATURE";
pin = "chp";
temperature;
};
};
fcd16999-wiegand0 {
compatible = "axis,fcd16999-wiegand";
interrupts = <0x00000003>;
id = <0x00000000>;
reader-control-gpios = <0x0000002d 0x00000051 0x00000000 0x0000002d 0x00000052 0x00000000 0x0000002d 0x0000004f 0x00000000 0x0000002d 0x00000050 0x00000000 0x0000002d 0x00000036 0x00000000>;
reader-control-values = <0x00000001 0x00000000 0x00000001 0x00000000 0x00000000>;
phandle = <0x00000084>;
};
fcd16999-wiegand1 {
compatible = "axis,fcd16999-wiegand";
interrupts = <0x00000004>;
id = <0x00000001>;
reader-control-gpios = <0x0000002d 0x0000003a 0x00000000 0x0000002d 0x0000003b 0x00000000 0x0000002d 0x00000038 0x00000000 0x0000002d 0x00000039 0x00000000 0x0000002d 0x00000037 0x00000000>;
reader-control-values = <0x00000001 0x00000000 0x00000001 0x00000000 0x00000000>;
phandle = <0x00000085>;
};
};
};
serial&commatec000 {
compatible = "fsl,imx6sx-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021ec000 0x00004000>;
interrupts = <0x00000000 0x0000001c 0x00000004>;
clocks = <0x00000002 0x000000cc 0x00000002 0x000000cd>;
clock-names = "ipg", "per";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x0000002e>;
fsl,uart-has-rtscts;
phandle = <0x00000086>;
};
serial&commatf0000 {
compatible = "fsl,imx6sx-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021f0000 0x00004000>;
interrupts = <0x00000000 0x0000001d 0x00000004>;
clocks = <0x00000002 0x000000cc 0x00000002 0x000000cd>;
clock-names = "ipg", "per";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x0000002f>;
fsl,uart-has-rtscts;
phandle = <0x00000087>;
};
serial&commatf4000 {
compatible = "fsl,imx6sx-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021f4000 0x00004000>;
interrupts = <0x00000000 0x0000001e 0x00000004>;
clocks = <0x00000002 0x000000cc 0x00000002 0x000000cd>;
clock-names = "ipg", "per";
dmas = <0x0000000e 0x00000021 0x00000004 0x00000000 0x0000000e 0x00000022 0x00000004 0x00000000>;
dma-names = "rx", "tx";
status = "disabled";
phandle = <0x00000088>;
};
i2c&commatf8000 {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
reg = <0x021f8000 0x00004000>;
interrupts = <0x00000000 0x00000023 0x00000004>;
clocks = <0x00000002 0x000000d9>;
status = "okay";
clock-frequency = <0x000186a0>;
pinctrl-names = "default";
pinctrl-0 = <0x00000030>;
phandle = <0x00000089>;
secure-element&commat {
compatible = "nxp,se050";
reg = <0x00000048>;
status = "okay";
};
};
qosc&commatfc000 {
compatible = "fsl,imx6sx-qosc";
reg = <0x021fc000 0x00004000>;
phandle = <0x0000008a>;
};
};
bus&commat00000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
reg = <0x02200000 0x00100000>;
ranges;
phandle = <0x0000008b>;
spba-bus&commat40000 {
compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
reg = <0x02240000 0x00040000>;
ranges;
csi&commat14000 {
compatible = "fsl,imx6s-csi";
reg = <0x02214000 0x00004000>;
interrupts = <0x00000000 0x00000007 0x00000004>;
clocks = <0x00000002 0x000000ad 0x00000002 0x0000009f 0x00000002 0x0000008e>;
clock-names = "disp-axi", "csi_mclk", "disp_dcic";
power-domains = <0x00000031>;
status = "disabled";
phandle = <0x0000008c>;
};
dcic&commat0c000 {
compatible = "fsl,imx6sx-dcic";
reg = <0x0220c000 0x00004000>;
interrupts = <0x00000000 0x0000007c 0x00000004>;
clocks = <0x00000002 0x0000008e 0x00000002 0x000000ad>;
clock-names = "dcic", "disp-axi";
gpr = <0x00000006>;
status = "disabled";
phandle = <0x0000008d>;
};
dcic&commat10000 {
compatible = "fsl,imx6sx-dcic";
reg = <0x02210000 0x00004000>;
interrupts = <0x00000000 0x0000007d 0x00000004>;
clocks = <0x00000002 0x0000008f 0x00000002 0x000000ad>;
clock-names = "dcic", "disp-axi";
gpr = <0x00000006>;
status = "disabled";
phandle = <0x0000008e>;
};
pxp&commat18000 {
compatible = "fsl,imx6sx-pxp-dma", "fsl,imx6sl-pxp-dma", "fsl,imx6dl-pxp-dma";
reg = <0x02218000 0x00004000>;
interrupts = <0x00000000 0x00000008 0x00000004>;
clocks = <0x00000002 0x000000aa 0x00000002 0x000000ad>;
clock-names = "pxp-axi", "disp-axi";
power-domains = <0x00000031>;
status = "disabled";
phandle = <0x0000008f>;
};
csi&commat1c000 {
compatible = "fsl,imx6s-csi";
reg = <0x0221c000 0x00004000>;
interrupts = <0x00000000 0x00000029 0x00000004>;
clocks = <0x00000002 0x000000ad 0x00000002 0x0000009f 0x00000002 0x0000008f>;
clock-names = "disp-axi", "csi_mclk", "dcic";
status = "disabled";
phandle = <0x00000090>;
};
lcdif&commat20000 {
compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif";
reg = <0x02220000 0x00004000>;
interrupts = <0x00000000 0x00000005 0x00000001>;
clocks = <0x00000002 0x000000af 0x00000002 0x000000a9 0x00000002 0x000000ad>;
clock-names = "pix", "axi", "disp_axi";
power-domains = <0x00000031>;
status = "disabled";
phandle = <0x00000091>;
};
lcdif&commat24000 {
compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif";
reg = <0x02224000 0x00004000>;
interrupts = <0x00000000 0x00000006 0x00000001>;
clocks = <0x00000002 0x000000ae 0x00000002 0x000000a9 0x00000002 0x000000ad>;
clock-names = "pix", "axi", "disp_axi";
power-domains = <0x00000031>;
status = "disabled";
phandle = <0x00000092>;
};
vadc&commat28000 {
compatible = "fsl,imx6sx-vadc";
reg = <0x02228000 0x00004000 0x0222c000 0x00004000>;
reg-names = "vadc-vafe", "vadc-vdec";
clocks = <0x00000002 0x000000d7 0x00000002 0x0000009f>;
clock-names = "vadc", "csi";
power-domains = <0x00000031>;
gpr = <0x00000006>;
status = "disabled";
phandle = <0x00000093>;
};
};
adc&commat80000 {
compatible = "fsl,imx6sx-adc", "fsl,vf610-adc";
reg = <0x02280000 0x00004000>;
interrupts = <0x00000000 0x00000064 0x00000004>;
clocks = <0x00000002 0x00000052>;
num-channels = <0x00000004>;
clock-names = "adc";
fsl,adck-max-frequency = <0x01c9c380 0x02625a00 0x01312d00>;
status = "okay";
vref-supply = <0x00000024>;
phandle = <0x00000094>;
};
adc&commat84000 {
compatible = "fsl,imx6sx-adc", "fsl,vf610-adc";
reg = <0x02284000 0x00004000>;
interrupts = <0x00000000 0x00000065 0x00000004>;
clocks = <0x00000002 0x00000052>;
num-channels = <0x00000004>;
clock-names = "adc";
fsl,adck-max-frequency = <0x01c9c380 0x02625a00 0x01312d00>;
status = "okay";
vref-supply = <0x00000024>;
phandle = <0x00000095>;
};
watchdog&commat88000 {
compatible = "fsl,imx6sx-wdt", "fsl,imx21-wdt";
reg = <0x02288000 0x00004000>;
interrupts = <0x00000000 0x0000000b 0x00000004>;
clocks = <0x00000002 0x00000052>;
status = "disabled";
phandle = <0x00000096>;
};
spi&commat8c000 {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi";
reg = <0x0228c000 0x00004000>;
interrupts = <0x00000000 0x00000012 0x00000004>;
clocks = <0x00000002 0x00000095 0x00000002 0x00000095>;
clock-names = "ipg", "per";
status = "disabled";
phandle = <0x00000097>;
};
sema4&commat90000 {
compatible = "fsl,imx6sx-sema4";
reg = <0x02290000 0x00004000>;
interrupts = <0x00000000 0x00000074 0x00000004>;
status = "okay";
phandle = <0x00000098>;
};
mu&commat94000 {
compatible = "fsl,imx6sx-mu";
reg = <0x02294000 0x00004000>;
interrupts = <0x00000000 0x0000005a 0x00000004>;
#mbox-cells = <0x00000002>;
status = "okay";
phandle = <0x00000033>;
};
mu_lp&commat94000 {
compatible = "fsl,imx6sx-mu-lp";
reg = <0x02294000 0x00004000>;
interrupts = <0x00000000 0x0000005a 0x00000004>;
status = "okay";
phandle = <0x00000099>;
};
serial&commata0000 {
compatible = "fsl,imx6sx-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x022a0000 0x00004000>;
interrupts = <0x00000000 0x00000011 0x00000004>;
clocks = <0x00000002 0x000000cc 0x00000002 0x000000cd>;
clock-names = "ipg", "per";
dmas = <0x0000000e 0x00000000 0x00000004 0x00000000 0x0000000e 0x0000002f 0x00000004 0x00000000>;
dma-names = "rx", "tx";
status = "disabled";
phandle = <0x0000009a>;
};
pwm&commata4000 {
compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
reg = <0x022a4000 0x00004000>;
interrupts = <0x00000000 0x00000053 0x00000004>;
clocks = <0x00000002 0x000000da 0x00000002 0x000000da>;
clock-names = "ipg", "per";
#pwm-cells = <0x00000002>;
phandle = <0x0000009b>;
};
pwm&commata8000 {
compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
reg = <0x022a8000 0x00004000>;
interrupts = <0x00000000 0x00000054 0x00000004>;
clocks = <0x00000002 0x000000db 0x00000002 0x000000db>;
clock-names = "ipg", "per";
#pwm-cells = <0x00000002>;
phandle = <0x0000009c>;
};
pwm&commatac000 {
compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
reg = <0x022ac000 0x00004000>;
interrupts = <0x00000000 0x00000055 0x00000004>;
clocks = <0x00000002 0x000000dc 0x00000002 0x000000dc>;
clock-names = "ipg", "per";
#pwm-cells = <0x00000002>;
phandle = <0x0000009d>;
};
pwm&commatb0000 {
compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
reg = <0x022b0000 0x00004000>;
interrupts = <0x00000000 0x00000056 0x00000004>;
clocks = <0x00000002 0x000000d6 0x00000002 0x000000d6>;
clock-names = "ipg", "per";
#pwm-cells = <0x00000002>;
phandle = <0x0000009e>;
};
};
pcie@8ffc000 {
compatible = "fsl,imx6sx-pcie", "snps,dw-pcie";
reg = <0x08ffc000 0x00004000 0x08f00000 0x00080000>;
reg-names = "dbi", "config";
#address-cells = <0x00000003>;
#size-cells = <0x00000002>;
device_type = "pci";
bus-range = <0x00000000 0x000000ff>;
ranges = <0x81000000 0x00000000 0x00000000 0x08f80000 0x00000000 0x00010000 0x82000000 0x00000000 0x08000000 0x08000000 0x00000000 0x00f00000>;
num-lanes = <0x00000001>;
interrupts = <0x00000000 0x00000078 0x00000004>;
interrupt-names = "msi";
#interrupt-cells = <0x00000001>;
interrupt-map-mask = <0x00000000 0x00000000 0x00000000 0x00000007>;
interrupt-map = <0x00000000 0x00000000 0x00000000 0x00000001 0x00000007 0x00000000 0x0000007b 0x00000004 0x00000000 0x00000000 0x00000000 0x00000002 0x00000007 0x00000000 0x0000007a 0x00000004 0x00000000 0x00000000 0x00000000 0x00000003 0x00000007 0x00000000 0x00000079 0x00000004 0x00000000 0x00000000 0x00000000 0x00000004 0x00000007 0x00000000 0x00000078 0x00000004>;
clocks = <0x00000002 0x000000b6 0x00000002 0x000000ea 0x00000002 0x00000010 0x00000002 0x000000ad>;
clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi";
power-domains = <0x00000031 0x00000032>;
power-domain-names = "pcie", "pcie_phy";
pcie-phy-supply = <0x0000001c>;
fsl,max-link-speed = <0x00000002>;
status = "disabled";
phandle = <0x0000009f>;
};
pcie_ep@8ffc000 {
compatible = "fsl,imx6sx-pcie-ep";
reg = <0x08ffc000 0x00004000 0x08000000 0x00f00000>;
reg-names = "regs", "addr_space";
num-lanes = <0x00000001>;
clocks = <0x00000002 0x000000b6 0x00000002 0x000000ea 0x00000002 0x00000010 0x00000002 0x000000ad>;
clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi";
power-domains = <0x00000031 0x00000032>;
power-domain-names = "pcie", "pcie_phy";
num-ib-windows = <0x00000004>;
num-ob-windows = <0x00000004>;
status = "disabled";
phandle = <0x000000a0>;
};
};
rpmsg {
compatible = "fsl,imx6sx-rpmsg";
mbox-names = "tx", "rx", "rxdb";
mboxes = <0x00000033 0x00000000 0x00000001 0x00000033 0x00000001 0x00000001 0x00000033 0x00000003 0x00000001>;
status = "disabled";
phandle = <0x000000a1>;
};
memory&commat000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>;
};
mcu-hwmon {
compatible = "iio-hwmon";
io-channels = <0x00000034 0x0000000e 0x00000034 0x0000000f 0x00000034 0x00000010>;
};
gpiomap {
compatible = "gpiomap";
control_button {
gpio = <0x0000002b 0x00000011 0x00000001>;
input;
};
reset_se {
gpio = <0x00000035 0x00000005 0x00000000>;
output-high;
};
poe_flt {
gpio = <0x00000036 0x0000000c 0x00000001>;
input;
};
poe_af {
gpio = <0x00000036 0x0000000d 0x00000000>;
input;
};
accelerometer_interrupt {
gpio = <0x0000002b 0x00000015 0x00000000>;
input;
};
mcu_boot0 {
gpio = <0x00000036 0x0000000b 0x00000000>;
output-low;
};
mcu_reset {
gpio = <0x00000036 0x0000000a 0x00000000>;
output-high;
};
};
gpiomap_io_expander {
compatible = "gpiomap";
relay_1 {
gpio = <0x0000002d 0x0000005b 0x00000000>;
dir_fixed;
asis;
};
relay_2 {
gpio = <0x0000002d 0x0000005c 0x00000000>;
dir_fixed;
asis;
};
sup_digin_door1_io_1 {
gpio = <0x0000002d 0x00000042 0x00000000>;
dir_fixed;
asis;
};
pu_door_1_io_1 {
gpio = <0x0000002d 0x00000063 0x00000001>;
dir_fixed;
asis;
};
pd_door_1_io_1 {
gpio = <0x0000002d 0x00000065 0x00000000>;
dir_fixed;
asis;
};
sup_digin_door1_io_2 {
gpio = <0x0000002d 0x00000043 0x00000000>;
dir_fixed;
asis;
};
pu_door_1_io_2 {
gpio = <0x0000002d 0x00000064 0x00000001>;
dir_fixed;
asis;
};
pd_door_1_io_2 {
gpio = <0x0000002d 0x00000066 0x00000000>;
dir_fixed;
asis;
};
sup_digin_door2_io_1 {
gpio = <0x0000002d 0x00000044 0x00000000>;
dir_fixed;
asis;
};
pu_door_2_io_1 {
gpio = <0x0000002d 0x00000068 0x00000001>;
dir_fixed;
asis;
};
pd_door_2_io_1 {
gpio = <0x0000002d 0x00000067 0x00000000>;
dir_fixed;
asis;
};
sup_digin_door2_io_2 {
gpio = <0x0000002d 0x00000045 0x00000000>;
dir_fixed;
asis;
};
pu_door_2_io_2 {
gpio = <0x0000002d 0x0000006a 0x00000001>;
dir_fixed;
asis;
};
pd_door_2_io_2 {
gpio = <0x0000002d 0x00000069 0x00000000>;
dir_fixed;
asis;
};
sup_digin_reader1_io_1 {
gpio = <0x0000002d 0x00000048 0x00000000>;
dir_fixed;
asis;
};
pu_reader_1_io_1 {
gpio = <0x0000002d 0x00000008 0x00000001>;
dir_fixed;
asis;
};
pd_reader_1_io_1 {
gpio = <0x0000002d 0x00000012 0x00000000>;
dir_fixed;
asis;
};
sup_digin_reader1_io_2 {
gpio = <0x0000002d 0x00000049 0x00000000>;
dir_fixed;
asis;
};
pu_reader_1_io_2 {
gpio = <0x0000002d 0x0000000f 0x00000001>;
dir_fixed;
asis;
};
pd_reader_1_io_2 {
gpio = <0x0000002d 0x00000014 0x00000000>;
dir_fixed;
asis;
};
reader_1_output_1 {
gpio = <0x0000002d 0x0000005f 0x00000000>;
dir_fixed;
asis;
};
reader_1_output_2 {
gpio = <0x0000002d 0x00000060 0x00000000>;
dir_fixed;
asis;
};
sup_digin_reader2_io_1 {
gpio = <0x0000002d 0x0000004a 0x00000000>;
dir_fixed;
asis;
};
pu_reader_2_io_1 {
gpio = <0x0000002d 0x0000002b 0x00000001>;
dir_fixed;
asis;
};
pd_reader_2_io_1 {
gpio = <0x0000002d 0x0000002d 0x00000000>;
dir_fixed;
asis;
};
sup_digin_reader2_io_2 {
gpio = <0x0000002d 0x0000004b 0x00000000>;
dir_fixed;
asis;
};
pu_reader_2_io_2 {
gpio = <0x0000002d 0x0000002c 0x00000001>;
dir_fixed;
asis;
};
pd_reader_2_io_2 {
gpio = <0x0000002d 0x0000002e 0x00000000>;
dir_fixed;
asis;
};
reader_2_output_1 {
gpio = <0x0000002d 0x00000061 0x00000000>;
dir_fixed;
asis;
};
reader_2_output_2 {
gpio = <0x0000002d 0x00000062 0x00000000>;
dir_fixed;
asis;
};
sup_digin_aux_io_1 {
gpio = <0x0000002d 0x0000003e 0x00000000>;
dir_fixed;
asis;
};
pu_aux_io_1 {
gpio = <0x0000002d 0x0000006c 0x00000001>;
dir_fixed;
asis;
};
pd_aux_io_1 {
gpio = <0x0000002d 0x0000006b 0x00000000>;
dir_fixed;
asis;
};
sup_digin_aux_io_2 {
gpio = <0x0000002d 0x0000003f 0x00000000>;
dir_fixed;
asis;
};
pu_aux_io_2 {
gpio = <0x0000002d 0x0000006e 0x00000001>;
dir_fixed;
asis;
};
pd_aux_io_2 {
gpio = <0x0000002d 0x0000006d 0x00000000>;
dir_fixed;
asis;
};
sup_digin_aux_io_3 {
gpio = <0x0000002d 0x00000040 0x00000000>;
dir_fixed;
asis;
};
pu_aux_io_3 {
gpio = <0x0000002d 0x00000070 0x00000001>;
dir_fixed;
asis;
};
pd_aux_io_3 {
gpio = <0x0000002d 0x0000006f 0x00000000>;
dir_fixed;
asis;
};
sup_digin_aux_io_4 {
gpio = <0x0000002d 0x00000041 0x00000000>;
dir_fixed;
asis;
};
pu_aux_io_4 {
gpio = <0x0000002d 0x00000072 0x00000001>;
dir_fixed;
asis;
};
pd_aux_io_4 {
gpio = <0x0000002d 0x00000071 0x00000000>;
dir_fixed;
asis;
};
sup_digin_fire_io_1 {
gpio = <0x0000002d 0x00000046 0x00000000>;
dir_fixed;
asis;
};
pu_fire_io_1 {
gpio = <0x0000002d 0x00000017 0x00000001>;
dir_fixed;
asis;
};
pd_fire_io_1 {
gpio = <0x0000002d 0x00000018 0x00000000>;
dir_fixed;
asis;
};
sup_digin_fire_io_2 {
gpio = <0x0000002d 0x00000047 0x00000000>;
dir_fixed;
asis;
};
pu_fire_io_2 {
gpio = <0x0000002d 0x00000019 0x00000001>;
dir_fixed;
asis;
};
pd_fire_io_2 {
gpio = <0x0000002d 0x0000001a 0x00000000>;
dir_fixed;
asis;
};
tampering {
gpio = <0x0000002d 0x0000004c 0x00000001>;
dir_fixed;
asis;
};
reader_en {
gpio = <0x0000002d 0x00000058 0x00000000>;
dir_fixed;
asis;
};
fault_lock {
gpio = <0x0000002d 0x00000053 0x00000001>;
dir_fixed;
asis;
};
fault_reader {
gpio = <0x0000002d 0x00000054 0x00000001>;
dir_fixed;
asis;
};
fault_dc {
gpio = <0x0000002d 0x00000055 0x00000001>;
dir_fixed;
asis;
};
fault_battery {
gpio = <0x0000002d 0x00000056 0x00000001>;
dir_fixed;
asis;
};
};
3v3 {
compatible = "regulator-fixed";
regulator-name = "+3V3";
regulator-min-microvolt = <0x002dc6c0>;
regulator-max-microvolt = <0x002dc6c0>;
regulator-always-on;
phandle = <0x00000027>;
};
regulator {
compatible = "regulator-fixed";
regulator-name = "vref-3v3";
regulator-min-microvolt = <0x00325aa0>;
regulator-max-microvolt = <0x00325aa0>;
phandle = <0x00000024>;
};
psu_5v0 {
compatible = "regulator-fixed";
regulator-name = "PSU-5V0";
regulator-min-microvolt = <0x004c4b40>;
regulator-max-microvolt = <0x004c4b40>;
regulator-boot-on;
phandle = <0x000000a2>;
};
usb_otg1_vbus {
compatible = "regulator-fixed";
regulator-name = "vbus";
regulator-min-microvolt = <0x004c4b40>;
regulator-max-microvolt = <0x004c4b40>;
gpio = <0x0000002b 0x00000013 0x00000001>;
enable-active-high;
phandle = <0x00000020>;
};
leds {
compatible = "gpio-leds";
status-red {
label = "status:green";
gpios = <0x0000002b 0x0000000e 0x00000000>;
default-state = "on";
};
status-green {
label = "status:red";
gpios = <0x0000002b 0x0000000d 0x00000000>;
default-state = "on";
};
power-red {
label = "power:red";
gpios = <0x0000002b 0x0000000c 0x00000000>;
default-state = "on";
};
network-red {
label = "network:green";
gpios = <0x0000002b 0x00000010 0x00000000>;
default-state = "on";
};
network-green {
label = "network:red";
gpios = <0x0000002b 0x0000000f 0x00000000>;
default-state = "on";
};
};
__symbols__ {
cpu0 = "/cpus/cpu@0";
ckil = "/clock-ckil";
osc = "/clock-osc";
ipp_di0 = "/clock-ipp-di0";
ipp_di1 = "/clock-ipp-di1";
anaclk1 = "/clock-anaclk1";
anaclk2 = "/clock-anaclk2";
mqs = "/mqs";
usbphynop1 = "/usbphynop1";
busfreq = "/soc/busfreq&commatc80f0";
ocrams = "/soc/sram@8f8000";
ocrams_ddr = "/soc/sram&commat0000";
ocram = "/soc/sram&commat1000";
ocram_mf = "/soc/sram-mf&commat0000";
ocram_optee = "/soc/sram-optee@8f8000";
intc = "/soc/interrupt-controller@a01000";
L2 = "/soc/cache-controller@a02000";
dma_apbh = "/soc/dma-apbh&commat04000";
caam_sm = "/soc/caam-sm&commat0000";
nand0 = "/soc/nand-controller&commat06000";
gpmi = "/soc/nand-controller&commat06000";
aips1 = "/soc/bus&commat00000";
spdif = "/soc/bus&commat00000/spba-bus&commat00000/spdif&commat04000";
ecspi1 = "/soc/bus&commat00000/spba-bus&commat00000/spi&commat08000";
ecspi2 = "/soc/bus&commat00000/spba-bus&commat00000/spi&commat0c000";
ecspi3 = "/soc/bus&commat00000/spba-bus&commat00000/spi&commat10000";
ecspi4 = "/soc/bus&commat00000/spba-bus&commat00000/spi&commat14000";
uart1 = "/soc/bus&commat00000/spba-bus&commat00000/serial&commat20000";
esai = "/soc/bus&commat00000/spba-bus&commat00000/esai&commat24000";
ssi1 = "/soc/bus&commat00000/spba-bus&commat00000/ssi&commat28000";
ssi2 = "/soc/bus&commat00000/spba-bus&commat00000/ssi&commat2c000";
ssi3 = "/soc/bus&commat00000/spba-bus&commat00000/ssi&commat30000";
asrc = "/soc/bus&commat00000/spba-bus&commat00000/asrc&commat34000";
pwm1 = "/soc/bus&commat00000/pwm&commat80000";
pwm2 = "/soc/bus&commat00000/pwm&commat84000";
pwm3 = "/soc/bus&commat00000/pwm&commat88000";
pwm4 = "/soc/bus&commat00000/pwm&commat8c000";
flexcan1 = "/soc/bus&commat00000/can&commat90000";
flexcan2 = "/soc/bus&commat00000/can&commat94000";
gpt = "/soc/bus&commat00000/timer&commat98000";
gpio1 = "/soc/bus&commat00000/gpio&commat9c000";
gpio2 = "/soc/bus&commat00000/gpio&commata0000";
gpio3 = "/soc/bus&commat00000/gpio&commata4000";
gpio4 = "/soc/bus&commat00000/gpio&commata8000";
gpio5 = "/soc/bus&commat00000/gpio&commatac000";
gpio6 = "/soc/bus&commat00000/gpio&commatb0000";
gpio7 = "/soc/bus&commat00000/gpio&commatb4000";
kpp = "/soc/bus&commat00000/keypad&commatb8000";
wdog1 = "/soc/bus&commat00000/watchdog&commatbc000";
wdog2 = "/soc/bus&commat00000/watchdog&commatc0000";
clks = "/soc/bus&commat00000/clock-controller&commatc4000";
anatop = "/soc/bus&commat00000/anatop&commatc8000";
reg_vdd1p1 = "/soc/bus&commat00000/anatop&commatc8000/regulator-1p1";
reg_vdd3p0 = "/soc/bus&commat00000/anatop&commatc8000/regulator-3p0";
reg_vdd2p5 = "/soc/bus&commat00000/anatop&commatc8000/regulator-2p5";
reg_arm = "/soc/bus&commat00000/anatop&commatc8000/regulator-vddcore";
reg_pcie = "/soc/bus&commat00000/anatop&commatc8000/regulator-vddpcie";
reg_soc = "/soc/bus&commat00000/anatop&commatc8000/regulator-vddsoc";
tempmon = "/soc/bus&commat00000/anatop&commatc8000/tempmon";
usbphy1 = "/soc/bus&commat00000/usbphy&commatc9000";
usbphy2 = "/soc/bus&commat00000/usbphy&commatca000";
irq_sec_vio = "/soc/bus&commat00000/caam_secvio&commatb0400";
caam_snvs = "/soc/bus&commat00000/caam-snvs&commatcc000";
snvs = "/soc/bus&commat00000/snvs&commatcc000";
snvs_rtc = "/soc/bus&commat00000/snvs&commatcc000/snvs-rtc-lp";
snvs_poweroff = "/soc/bus&commat00000/snvs&commatcc000/snvs-poweroff";
snvs_pwrkey = "/soc/bus&commat00000/snvs&commatcc000/snvs-powerkey";
epit1 = "/soc/bus&commat00000/epit&commatd0000";
epit2 = "/soc/bus&commat00000/epit&commatd4000";
src = "/soc/bus&commat00000/reset-controller&commatd8000";
gpc = "/soc/bus&commat00000/gpc&commatdc000";
pd_disp = "/soc/bus&commat00000/gpc&commatdc000/pgc/power-domain@2";
pd_pci = "/soc/bus&commat00000/gpc&commatdc000/pgc/power-domain@3";
iomuxc = "/soc/bus&commat00000/pinctrl&commate0000";
pinctrl_enet1_mii = "/soc/bus&commat00000/pinctrl&commate0000/enet1/enet1-mii-grp";
pinctrl_enet1_rgmii = "/soc/bus&commat00000/pinctrl&commate0000/enet1/enet1-rgmii-grp";
pinctrl_gpmi_nand_1 = "/soc/bus&commat00000/pinctrl&commate0000/gpmi-nand/gpmi-nand-1";
pinctrl_i2c1 = "/soc/bus&commat00000/pinctrl&commate0000/i2c1/i2c1grp";
pinctrl_i2c2 = "/soc/bus&commat00000/pinctrl&commate0000/i2c2/i2c2grp";
pinctrl_i2c3 = "/soc/bus&commat00000/pinctrl&commate0000/i2c3/i2c3grp";
pinctrl_i2c4 = "/soc/bus&commat00000/pinctrl&commate0000/i2c4/i2c4grp";
pinctrl_ecspi4 = "/soc/bus&commat00000/pinctrl&commate0000/ecspi4/ecspi4";
pinctrl_sound = "/soc/bus&commat00000/pinctrl&commate0000/sound/soundgrp";
pinctrl_esai = "/soc/bus&commat00000/pinctrl&commate0000/esai/esaigrp";
pinctrl_spdif = "/soc/bus&commat00000/pinctrl&commate0000/spdif/spdifgrp";
pinctrl_uart1 = "/soc/bus&commat00000/pinctrl&commate0000/uart1/uart1grp";
pinctrl_uart2 = "/soc/bus&commat00000/pinctrl&commate0000/uart2/uart2grp";
pinctrl_usdhc4 = "/soc/bus&commat00000/pinctrl&commate0000/usdhc4/usdhc4grp";
pinctrl_hog = "/soc/bus&commat00000/pinctrl&commate0000/hog/hoggrp";
pinctrl_uart3 = "/soc/bus&commat00000/pinctrl&commate0000/uart3/uart3grp";
pinctrl_uart4 = "/soc/bus&commat00000/pinctrl&commate0000/uart4/uart4grp";
gpr = "/soc/bus&commat00000/iomuxc-gpr&commate4000";
ldb = "/soc/bus&commat00000/ldb&commate0014";
sdma = "/soc/bus&commat00000/sdma&commatec000";
aips2 = "/soc/bus&commat00000";
crypto = "/soc/bus&commat00000/crypto&commat00000";
sec_ctrl = "/soc/bus&commat00000/crypto&commat00000/ctrl@0";
sec_jr0 = "/soc/bus&commat00000/crypto&commat00000/jr&commat00";
sec_jr1 = "/soc/bus&commat00000/crypto&commat00000/jr&commat00";
usbotg1 = "/soc/bus&commat00000/usb&commat84000";
usbotg2 = "/soc/bus&commat00000/usb&commat84200";
usbh = "/soc/bus&commat00000/usb&commat84400";
usbmisc = "/soc/bus&commat00000/usbmisc&commat84800";
fec1 = "/soc/bus&commat00000/ethernet&commat88000";
ethphy0 = "/soc/bus&commat00000/ethernet&commat88000/mdio/ethernet-phy@1";
mlb = "/soc/bus&commat00000/mlb&commat8c000";
usdhc1 = "/soc/bus&commat00000/mmc&commat90000";
usdhc2 = "/soc/bus&commat00000/mmc&commat94000";
usdhc3 = "/soc/bus&commat00000/mmc&commat98000";
usdhc4 = "/soc/bus&commat00000/mmc&commat9c000";
i2c1 = "/soc/bus&commat00000/i2c&commata0000";
i2c2 = "/soc/bus&commat00000/i2c&commata4000";
i2c3 = "/soc/bus&commat00000/i2c&commata8000";
fec2 = "/soc/bus&commat00000/ethernet&commatb4000";
weim = "/soc/bus&commat00000/weim&commatb8000";
ocotp = "/soc/bus&commat00000/efuse&commatbc000";
cpu_speed_grade = "/soc/bus&commat00000/efuse&commatbc000/speed-grade&commat";
tempmon_calib = "/soc/bus&commat00000/efuse&commatbc000/calib&commat";
tempmon_temp_grade = "/soc/bus&commat00000/efuse&commatbc000/temp-grade&commat";
sai1 = "/soc/bus&commat00000/sai&commatd4000";
audmux = "/soc/bus&commat00000/audmux&commatd8000";
sai2 = "/soc/bus&commat00000/sai&commatdc000";
qspi1 = "/soc/bus&commat00000/spi&commate0000";
qspi2 = "/soc/bus&commat00000/spi&commate4000";
qspi_m4 = "/soc/bus&commat00000/qspi-m4&commate4000";
uart2 = "/soc/bus&commat00000/serial&commate8000";
fcd16999gpio = "/soc/bus&commat00000/serial&commate8000/fcd16999/fcd16999-gpio";
fcd16999adc = "/soc/bus&commat00000/serial&commate8000/fcd16999/fcd16999-adc";
fcd16999wiegand0 = "/soc/bus&commat00000/serial&commate8000/fcd16999/fcd16999-wiegand0";
fcd16999wiegand1 = "/soc/bus&commat00000/serial&commate8000/fcd16999/fcd16999-wiegand1";
uart3 = "/soc/bus&commat00000/serial&commatec000";
uart4 = "/soc/bus&commat00000/serial&commatf0000";
uart5 = "/soc/bus&commat00000/serial&commatf4000";
i2c4 = "/soc/bus&commat00000/i2c&commatf8000";
qosc = "/soc/bus&commat00000/qosc&commatfc000";
aips3 = "/soc/bus&commat00000";
csi1 = "/soc/bus&commat00000/spba-bus&commat40000/csi&commat14000";
dcic1 = "/soc/bus&commat00000/spba-bus&commat40000/dcic&commat0c000";
dcic2 = "/soc/bus&commat00000/spba-bus&commat40000/dcic&commat10000";
pxp = "/soc/bus&commat00000/spba-bus&commat40000/pxp&commat18000";
csi2 = "/soc/bus&commat00000/spba-bus&commat40000/csi&commat1c000";
lcdif1 = "/soc/bus&commat00000/spba-bus&commat40000/lcdif&commat20000";
lcdif2 = "/soc/bus&commat00000/spba-bus&commat40000/lcdif&commat24000";
vadc = "/soc/bus&commat00000/spba-bus&commat40000/vadc&commat28000";
adc1 = "/soc/bus&commat00000/adc&commat80000";
adc2 = "/soc/bus&commat00000/adc&commat84000";
wdog3 = "/soc/bus&commat00000/watchdog&commat88000";
ecspi5 = "/soc/bus&commat00000/spi&commat8c000";
sema4 = "/soc/bus&commat00000/sema4&commat90000";
mu = "/soc/bus&commat00000/mu&commat94000";
mu_lp = "/soc/bus&commat00000/mu_lp&commat94000";
uart6 = "/soc/bus&commat00000/serial&commata0000";
pwm5 = "/soc/bus&commat00000/pwm&commata4000";
pwm6 = "/soc/bus&commat00000/pwm&commata8000";
pwm7 = "/soc/bus&commat00000/pwm&commatac000";
pwm8 = "/soc/bus&commat00000/pwm&commatb0000";
pcie = "/soc/pcie@8ffc000";
pcie_ep = "/soc/pcie_ep@8ffc000";
rpmsg = "/rpmsg";
reg_3v3 = "/3v3";
reg_vref_3v3 = "/regulator";
reg_psu_5v = "/psu_5v0";
reg_usb_otg1_vbus = "/usb_otg1_vbus";
};
};
